| /dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/bfin/include/ |
| H A D | cdefBF538.h | 493 #define pTWI1_INT_MASK ((volatile unsigned short *)TWI1_INT_MASK)
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| H A D | defBF539.h | 742 #define TWI1_INT_MASK 0xFFC02224 /* TWI1 Master Interrupt Mask Register */ macro
753 #define TWI1_INT_ENABLE TWI1_INT_MASK
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| H A D | cdefBF539.h | 221 #define pTWI1_INT_MASK ((volatile unsigned short *)TWI1_INT_MASK)
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| H A D | defBF549.h | 133 #define TWI1_INT_MASK 0xffc02224 /* TWI Interrupt Mask Register */ macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF547-extended_cdef.h | 2682 #define pTWI1_INT_MASK ((uint16_t volatile *)TWI1_INT_MASK) /* TWI Interrupt Mask R…
2683 #define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
2684 #define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF547-extended_cdef.h | 2682 #define pTWI1_INT_MASK ((uint16_t volatile *)TWI1_INT_MASK) /* TWI Interrupt Mask R…
2683 #define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
2684 #define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF547-extended_cdef.h | 2682 #define pTWI1_INT_MASK ((uint16_t volatile *)TWI1_INT_MASK) /* TWI Interrupt Mask R…
2683 #define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
2684 #define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF547-extended_cdef.h | 2682 #define pTWI1_INT_MASK ((uint16_t volatile *)TWI1_INT_MASK) /* TWI Interrupt Mask R…
2683 #define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
2684 #define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1620 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1736 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-bf548/ |
| H A D | ADSP-EDN-BF548-extended_def.h | 1624 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| H A D | ADSP-EDN-BF549-extended_def.h | 1740 #define TWI1_INT_MASK 0xFFC02224 /* TWI Interrupt Mask Register */ macro
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| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/include/asm/mach-bf538/ |
| H A D | BF538_cdef.h | 1269 #define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
1270 #define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
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