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Searched refs:CORE_CLK_SRC_DPLL (Results 1 – 12 of 12) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-omap2/
H A Dclkt2xxx_dpllcore.c80 if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */ in omap2_dpllcore_round_rate()
121 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_reprogram_dpllcore()
150 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
152 done_rate = CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
H A Dclkt2xxx_virt_prcm_set.c126 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_select_table_rate()
139 done_rate = CORE_CLK_SRC_DPLL; in omap2_select_table_rate()
H A Dclock.h45 #define CORE_CLK_SRC_DPLL 0x1 macro
H A Dsdrc2xxx.c88 if (level == CORE_CLK_SRC_DPLL) in omap2xxx_sdrc_reprogram()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-omap2/
H A Dclkt2xxx_dpllcore.c80 if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */ in omap2_dpllcore_round_rate()
121 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_reprogram_dpllcore()
150 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
152 done_rate = CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
H A Dclkt2xxx_virt_prcm_set.c126 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_select_table_rate()
139 done_rate = CORE_CLK_SRC_DPLL; in omap2_select_table_rate()
H A Dclock.h45 #define CORE_CLK_SRC_DPLL 0x1 macro
H A Dsdrc2xxx.c88 if (level == CORE_CLK_SRC_DPLL) in omap2xxx_sdrc_reprogram()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-omap2/
H A Dclkt2xxx_dpllcore.c80 if (core_clk_src == CORE_CLK_SRC_DPLL) { /* DPLL clockout */ in omap2_dpllcore_round_rate()
121 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_reprogram_dpllcore()
150 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
152 done_rate = CORE_CLK_SRC_DPLL; in omap2_reprogram_dpllcore()
H A Dclkt2xxx_virt_prcm_set.c126 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); in omap2_select_table_rate()
139 done_rate = CORE_CLK_SRC_DPLL; in omap2_select_table_rate()
H A Dclock.h45 #define CORE_CLK_SRC_DPLL 0x1 macro
H A Dsdrc2xxx.c88 if (level == CORE_CLK_SRC_DPLL) in omap2xxx_sdrc_reprogram()