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Searched refs:DMI_SERCS_SERIAL (Results 1 – 3 of 3) sorted by relevance

/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/fesvr/
H A Ddebug_defines.h985 #define DMI_SERCS_SERIAL (0x7 << DMI_SERCS_SERIAL_OFFSET) macro
/dports/devel/openocd/openocd-0.11.0/src/target/riscv/
H A Ddebug_defines.h1831 #define DMI_SERCS_SERIAL (0x7U << DMI_SERCS_SERIAL_OFFSET) macro
/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/
H A Ddebug_defines.h1748 #define DMI_SERCS_SERIAL (0x7U << DMI_SERCS_SERIAL_OFFSET) macro