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Searched refs:SD1_OTAPDLYSEL_MASK (Results 1 – 25 of 62) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c45 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
97 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
100 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
134 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
137 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
179 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
182 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
195 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr50()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c45 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
97 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
100 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
134 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
137 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
179 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
182 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
195 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr50()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c45 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
97 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
100 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
134 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
137 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
179 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
182 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
195 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr50()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c45 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
97 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
100 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
134 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
137 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
179 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
182 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
195 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr50()
/dports/sysutils/u-boot-tools/u-boot-2020.07/board/xilinx/zynqmp/
H A Dtap_delays.c46 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
98 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
101 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
135 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
138 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
180 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
183 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
196 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr50()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/xilinx/zynqmp/
H A Dtap_delays.c45 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
97 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
100 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr104()
134 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
137 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_hs()
179 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
182 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_ddr50()
195 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_tap_sdr50()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-chip/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/xilinx/zynqmp/
H A Dtap_delays.c32 #define SD1_OTAPDLYSEL_MASK 0x003F0000 macro
93 zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, in arasan_zynqmp_set_tapdelay()

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