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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/include/asm/
H A Dunwind_hints.h11 UNWIND_HINT sp_reg=ORC_REG_UNDEFINED type=UNWIND_HINT_TYPE_CALL end=1
17 .set sp_reg, ORC_REG_SP_INDIRECT
19 .set sp_reg, ORC_REG_SP
22 .set sp_reg, ORC_REG_BP
24 .set sp_reg, ORC_REG_DI
26 .set sp_reg, ORC_REG_DX
28 .set sp_reg, ORC_REG_R10
44 UNWIND_HINT sp_reg=sp_reg sp_offset=sp_offset type=type
52 UNWIND_HINT sp_reg=ORC_REG_SP sp_offset=8 type=UNWIND_HINT_TYPE_FUNC
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/include/asm/
H A Dunwind_hints.h11 UNWIND_HINT sp_reg=ORC_REG_UNDEFINED type=UNWIND_HINT_TYPE_CALL end=1
17 .set sp_reg, ORC_REG_SP_INDIRECT
19 .set sp_reg, ORC_REG_SP
22 .set sp_reg, ORC_REG_BP
24 .set sp_reg, ORC_REG_DI
26 .set sp_reg, ORC_REG_DX
28 .set sp_reg, ORC_REG_R10
44 UNWIND_HINT sp_reg=sp_reg sp_offset=sp_offset type=type
52 UNWIND_HINT sp_reg=ORC_REG_SP sp_offset=8 type=UNWIND_HINT_TYPE_FUNC
/dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/include/asm/
H A Dunwind_hints.h11 UNWIND_HINT sp_reg=ORC_REG_UNDEFINED type=UNWIND_HINT_TYPE_CALL end=1
17 .set sp_reg, ORC_REG_SP_INDIRECT
19 .set sp_reg, ORC_REG_SP
22 .set sp_reg, ORC_REG_BP
24 .set sp_reg, ORC_REG_DI
26 .set sp_reg, ORC_REG_DX
28 .set sp_reg, ORC_REG_R10
44 UNWIND_HINT sp_reg=sp_reg sp_offset=sp_offset type=type
52 UNWIND_HINT sp_reg=ORC_REG_SP sp_offset=8 type=UNWIND_HINT_TYPE_FUNC
/dports/multimedia/v4l_compat/linux-5.13-rc2/tools/include/linux/
H A Dobjtool.h16 u8 sp_reg; member
45 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ argument
51 ".byte " __stringify(sp_reg) "\n\t" \
102 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
108 .byte \sp_reg
127 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \
132 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
/dports/multimedia/libv4l/linux-5.13-rc2/tools/include/linux/
H A Dobjtool.h16 u8 sp_reg; member
45 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ argument
51 ".byte " __stringify(sp_reg) "\n\t" \
102 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
108 .byte \sp_reg
127 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \
132 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
/dports/multimedia/libv4l/linux-5.13-rc2/include/linux/
H A Dobjtool.h16 u8 sp_reg; member
45 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ argument
51 ".byte " __stringify(sp_reg) "\n\t" \
102 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
108 .byte \sp_reg
127 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \
132 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
/dports/multimedia/v4l_compat/linux-5.13-rc2/include/linux/
H A Dobjtool.h16 u8 sp_reg; member
45 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ argument
51 ".byte " __stringify(sp_reg) "\n\t" \
102 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
108 .byte \sp_reg
127 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \
132 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
/dports/multimedia/v4l-utils/linux-5.13-rc2/include/linux/
H A Dobjtool.h16 u8 sp_reg; member
45 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ argument
51 ".byte " __stringify(sp_reg) "\n\t" \
102 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
108 .byte \sp_reg
127 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \
132 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
/dports/multimedia/v4l-utils/linux-5.13-rc2/tools/include/linux/
H A Dobjtool.h16 u8 sp_reg; member
45 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \ argument
51 ".byte " __stringify(sp_reg) "\n\t" \
102 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
108 .byte \sp_reg
127 #define UNWIND_HINT(sp_reg, sp_offset, type, end) \
132 .macro UNWIND_HINT sp_reg:req sp_offset=0 type:req end=0
/dports/multimedia/v4l_compat/linux-5.13-rc2/tools/objtool/
H A Dorc_gen.c26 orc->sp_reg = ORC_REG_UNDEFINED; in init_orc_entry()
32 orc->sp_reg = ORC_REG_SP; in init_orc_entry()
35 orc->sp_reg = ORC_REG_SP_INDIRECT; in init_orc_entry()
38 orc->sp_reg = ORC_REG_BP; in init_orc_entry()
41 orc->sp_reg = ORC_REG_BP_INDIRECT; in init_orc_entry()
44 orc->sp_reg = ORC_REG_R10; in init_orc_entry()
47 orc->sp_reg = ORC_REG_R13; in init_orc_entry()
50 orc->sp_reg = ORC_REG_DI; in init_orc_entry()
53 orc->sp_reg = ORC_REG_DX; in init_orc_entry()
145 .sp_reg = ORC_REG_UNDEFINED, in orc_create()
/dports/multimedia/libv4l/linux-5.13-rc2/tools/objtool/
H A Dorc_gen.c26 orc->sp_reg = ORC_REG_UNDEFINED; in init_orc_entry()
32 orc->sp_reg = ORC_REG_SP; in init_orc_entry()
35 orc->sp_reg = ORC_REG_SP_INDIRECT; in init_orc_entry()
38 orc->sp_reg = ORC_REG_BP; in init_orc_entry()
41 orc->sp_reg = ORC_REG_BP_INDIRECT; in init_orc_entry()
44 orc->sp_reg = ORC_REG_R10; in init_orc_entry()
47 orc->sp_reg = ORC_REG_R13; in init_orc_entry()
50 orc->sp_reg = ORC_REG_DI; in init_orc_entry()
53 orc->sp_reg = ORC_REG_DX; in init_orc_entry()
145 .sp_reg = ORC_REG_UNDEFINED, in orc_create()
/dports/multimedia/v4l-utils/linux-5.13-rc2/tools/objtool/
H A Dorc_gen.c26 orc->sp_reg = ORC_REG_UNDEFINED; in init_orc_entry()
32 orc->sp_reg = ORC_REG_SP; in init_orc_entry()
35 orc->sp_reg = ORC_REG_SP_INDIRECT; in init_orc_entry()
38 orc->sp_reg = ORC_REG_BP; in init_orc_entry()
41 orc->sp_reg = ORC_REG_BP_INDIRECT; in init_orc_entry()
44 orc->sp_reg = ORC_REG_R10; in init_orc_entry()
47 orc->sp_reg = ORC_REG_R13; in init_orc_entry()
50 orc->sp_reg = ORC_REG_DI; in init_orc_entry()
53 orc->sp_reg = ORC_REG_DX; in init_orc_entry()
145 .sp_reg = ORC_REG_UNDEFINED, in orc_create()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dregbankselect-dyn-stackalloc.mir23 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
30 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
53 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
60 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
83 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
90 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
113 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
120 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
143 ; WAVE64: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
150 ; WAVE32: [[COPY1:%[0-9]+]]:sgpr(p5) = COPY $sp_reg
[all …]
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/libgloss/spu/
H A Dsbrk.c45 vector unsigned int sp_reg, sp_delta; in sbrk() local
70 sp_reg = *sp_ptr; in sbrk()
71 *sp_ptr = (vector unsigned int) spu_sub (sp_reg, sp_delta); in sbrk()
73 while ((sp_ptr = (vector unsigned int *) spu_extract (sp_reg, 0))); in sbrk()
/dports/devel/gdb/gdb-11.1/gdb/testsuite/gdb.guile/
H A Dscm-ports.exp107 set sp_reg [get_valueof /u "\$sp" 0]
117 "= $sp_reg" \
140 "= $sp_reg" \

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