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Searched refs:getNode (Results 1 – 25 of 206) sorted by relevance

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/openbsd/gnu/llvm/llvm/lib/Target/VE/
H A DVECustomDAG.cpp219 if (MemSDNode *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getNodeChain()
231 if (auto *MemN = dyn_cast<MemSDNode>(Op.getNode())) in getMemoryPtr()
305 if (isa<MemSDNode>(Op.getNode())) { in getLoadStoreStride()
338 if (auto *StoreN = dyn_cast<StoreSDNode>(Op.getNode())) in getStoredValue()
354 if (auto *N = dyn_cast<MaskedLoadSDNode>(Op.getNode())) in getNodePassthru()
465 Scalar = getNode(VEISD::REPL_F32, MVT::i64, Scalar); in getBroadcast()
467 Scalar = getNode(VEISD::REPL_I32, MVT::i64, Scalar); in getBroadcast()
487 return DAG.getNode(OC, DL, DestVT, Vec, AVL); in getUnpack()
504 NewAVL = getNode(ISD::ADD, MVT::i32, {RawAVL, OneV}); in getTargetSplitMask()
507 NewAVL = getNode(ISD::SRL, MVT::i32, {NewAVL, OneV}); in getTargetSplitMask()
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H A DVVPISelLowering.cpp33 auto LoRes = CDAG.getNode(Opc, MVT::v256i1, {LoA, LoB}); in splitMaskArithmetic()
34 auto HiRes = CDAG.getNode(Opc, MVT::v256i1, {HiA, HiB}); in splitMaskArithmetic()
59 EVT OpVecVT = *getIdiomaticVectorType(Op.getNode()); in lowerToVVP()
86 return CDAG.getNode(VVPOpcode, LegalVecVT, in lowerToVVP()
140 auto DataVT = *getIdiomaticVectorType(Op.getNode()); in lowerVVP_LOAD_STORE()
162 SDValue DataV = CDAG.getNode(VEISD::VVP_SELECT, DataVT, in lowerVVP_LOAD_STORE()
164 SDValue NewLoadChainV = SDValue(NewLoadV.getNode(), 1); in lowerVVP_LOAD_STORE()
172 return CDAG.getNode(VEISD::VVP_STORE, Op.getNode()->getVTList(), in lowerVVP_LOAD_STORE()
265 EVT DataVT = *getIdiomaticVectorType(Op.getNode()); in lowerVVP_GATHER_SCATTER()
294 return CDAG.getNode(VEISD::VVP_SCATTER, MVT::Other, in lowerVVP_GATHER_SCATTER()
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/openbsd/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1542 SDValue Hi = DAG.getNode( in splitVector()
1596 Join = DAG.getNode( in SplitVectorLoad()
2044 Z = DAG.getNode(ISD::ADD, DL, VT, Z, in LowerUDIVREM()
2050 DAG.getNode(ISD::SUB, DL, VT, X, DAG.getNode(ISD::MUL, DL, VT, Q, Y)); in LowerUDIVREM()
2472 SDValue OppositeSign = DAG.getNode( in LowerINT_TO_FP32()
3154 DCI.AddToWorklist(Lo.getNode()); in splitBinaryBitConstantOpImpl()
3155 DCI.AddToWorklist(Hi.getNode()); in splitBinaryBitConstantOpImpl()
3283 return DAG.getNode( in performSrlCombine()
3549 DCI.AddToWorklist(Mulhi.getNode()); in performMulhsCombine()
3582 DCI.AddToWorklist(Mulhi.getNode()); in performMulhuCombine()
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H A DAMDGPUHSAMetadataStreamer.cpp613 Dims.push_back(Dims.getDocument()->getNode( in getWorkGroupDimensions()
633 Printf.push_back(Printf.getDocument()->getNode( in emitPrintf()
650 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
652 LanguageVersion.push_back(Kern.getDocument()->getNode( in emitKernelLanguage()
665 Kern[".vec_type_hint"] = Kern.getDocument()->getNode( in emitKernelAttrs()
677 Kern[".kind"] = Kern.getDocument()->getNode("init"); in emitKernelAttrs()
679 Kern[".kind"] = Kern.getDocument()->getNode("fini"); in emitKernelAttrs()
767 Arg[".size"] = Arg.getDocument()->getNode(Size); in emitKernelArg()
769 Arg[".offset"] = Arg.getDocument()->getNode(Offset); in emitKernelArg()
890 Kern.getDocument()->getNode(ProgramInfo.LDSSize); in getHSAKernelProps()
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H A DR600ISelLowering.cpp414 assert((!Result.getNode() || in LowerOperation()
694 DAG.getNode(ISD::FADD, DL, VT, in LowerTrig()
746 return DAG.getNode( in lowerFP_TO_UINT()
756 return DAG.getNode( in lowerFP_TO_SINT()
1862 if (LHS.getOperand(2).getNode() != True.getNode() || in PerformDAGCombine()
1863 LHS.getOperand(3).getNode() != False.getNode() || in PerformDAGCombine()
1864 RHS.getNode() != False.getNode()) { in PerformDAGCombine()
1961 if (!Neg.getNode()) in FoldOperand()
1967 if (!Abs.getNode()) in FoldOperand()
1976 if (!Sel.getNode()) in FoldOperand()
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/openbsd/gnu/llvm/llvm/lib/BinaryFormat/
H A DMsgPackDocument.cpp80 *this = getDocument()->getNode(Val); in operator =()
84 *this = getDocument()->getNode(Val); in operator =()
88 *this = getDocument()->getNode(Val); in operator =()
92 *this = getDocument()->getNode(Val); in operator =()
96 *this = getDocument()->getNode(Val); in operator =()
153 Node = getNode(); in readFromBlob()
156 Node = getNode(Obj.Int); in readFromBlob()
159 Node = getNode(Obj.UInt); in readFromBlob()
162 Node = getNode(Obj.Bool); in readFromBlob()
165 Node = getNode(Obj.Float); in readFromBlob()
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/openbsd/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp285 if (Res.getNode()) in PromoteIntegerResult()
509 return DAG.getNode(ISD::SRL, dl, NVT, DAG.getNode(ISD::BSWAP, dl, NVT, Op), in PromoteIntRes_BSWAP()
579 return DAG.getNode( in PromoteIntRes_CTLZ()
1752 if (Res.getNode() == N) in PromoteIntegerOperand()
2576 if (Lo.getNode()) in ExpandIntegerResult()
3370 Lo = DAG.getNode(ISD::ADD, dl, NVT, DAG.getNode(ISD::CTPOP, dl, NVT, Lo), in ExpandIntRes_CTPOP()
3681 Lo = DAG.getNode( in ExpandIntRes_LOAD()
4381 Hi = DAG.getNode( in ExpandIntRes_SIGN_EXTEND()
4944 if (!LoCmp.getNode()) in IntegerExpandSetCCOperands()
4951 if (!HiCmp.getNode()) in IntegerExpandSetCCOperands()
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H A DTargetLowering.cpp1051 DAG.getNode(AVGOpc, DL, NVT, DAG.getNode(ISD::TRUNCATE, DL, NVT, ExtOpA), in combineShiftToAVG()
7097 assert((LL.getNode() && LH.getNode() && RL.getNode() && RH.getNode()) || in expandMUL_LOHI()
7098 (!LL.getNode() && !LH.getNode() && !RL.getNode() && !RH.getNode())); in expandMUL_LOHI()
7118 if (!LL.getNode() && !RL.getNode() && in expandMUL_LOHI()
7124 if (!LL.getNode()) in expandMUL_LOHI()
7158 if (!LH.getNode() && !RH.getNode() && in expandMUL_LOHI()
7167 if (!LH.getNode()) in expandMUL_LOHI()
7361 LL = DAG.getNode( in expandDIVREMByConstant()
7651 DAG.getNode(HsOpc, DL, VT, DAG.getNode(HsOpc, DL, VT, Op0, One), HsAmt); in expandROT()
8269 Op = DAG.getNode(ISD::ADD, dl, VT, DAG.getNode(ISD::AND, dl, VT, Op, Mask33), in expandCTPOP()
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H A DDAGCombiner.cpp1335 ReplaceLoadWithPromotedLoad(Op.getNode(), NewOp.getNode()); in SExtPromoteOperand()
3267 if (Carry1.getNode()->isOperandOf(Carry0.getNode())) in combineCarryDiamond()
4924 if (LoOpt.getNode() && LoOpt.getNode() != Lo.getNode() && in SimplifyNodeWithTwoResults()
7761 if (LHSMask.getNode() || RHSMask.getNode()) { in MatchRotate()
7854 if (LHSMask.getNode() || RHSMask.getNode()) in MatchRotate()
12469 if (NarrowLoad.getNode() != N0.getNode()) { in visitSIGN_EXTEND()
12621 if (NewXor.getNode() == N0.getNode()) { in visitSIGN_EXTEND()
12768 if (NarrowLoad.getNode() != N0.getNode()) { in visitZERO_EXTEND()
13021 if (NarrowLoad.getNode() != N0.getNode()) { in visitANY_EXTEND()
16751 if (Tmp.getNode() == N.getNode()) in rebuildSetCC()
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H A DLegalizeTypesGeneric.cpp58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
139 Vals.push_back(DAG.getNode( in ExpandRes_BITCAST()
229 SDValue NewVec = DAG.getNode( in ExpandRes_EXTRACT_VECTOR_ELT()
422 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, in ExpandOp_INSERT_VECTOR_ELT()
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H A DResourcePriorityQueue.cpp74 const SDNode *ScegN = PredSU->getNode(); in numberRCValPredInSU()
112 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
239 if (!SU || !SU->getNode()) in isResourceAvailable()
244 if (SU->getNode()->getGluedNode()) in isResourceAvailable()
249 if (SU->getNode()->isMachineOpcode()) in isResourceAvailable()
289 if (SU->getNode() && SU->getNode()->isMachineOpcode()) { in reserveResources()
293 SU->getNode()->getMachineOpcode())); in reserveResources()
321 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) in rawRegPressureDelta()
336 if (isa<ConstantSDNode>(Op.getNode())) in rawRegPressureDelta()
355 if (!SU || !SU->getNode() || !SU->getNode()->isMachineOpcode()) in regPressureDelta()
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H A DLegalizeDAG.cpp587 Hi = DAG.getNode( in LegalizeStoreOps()
598 Hi = DAG.getNode( in LegalizeStoreOps()
810 Hi = DAG.getNode( in LegalizeLoadOps()
838 Hi = DAG.getNode( in LegalizeLoadOps()
1403 if (!Ch.getNode()) { in ExpandExtractFromVectorThroughStack()
1930 if (!Value1.getNode()) in ExpandBUILD_VECTOR()
2921 Op = DAG.getNode( in ExpandNode()
2937 Op = DAG.getNode( in ExpandNode()
3552 Tmp2 = DAG.getNode( in ExpandNode()
4541 Tmp1 = DAG.getNode( in PromoteNode()
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H A DLegalizeVectorTypes.cpp197 if (R.getNode()) in ScalarizeVectorResult()
557 Src = DAG.getNode( in ScalarizeVecRes_FP_TO_XINT_SAT()
711 if (Res.getNode() == N) in ScalarizeVectorOperand()
1161 if (Lo.getNode()) in SplitVectorResult()
1389 Hi = DAG.getNode( in SplitVecRes_EXTRACT_SUBVECTOR()
1685 SDNode *LoNode = DAG.getNode(Opcode, dl, LoVTs, LoLHS, LoRHS).getNode(); in SplitVecRes_OverflowOp()
1686 SDNode *HiNode = DAG.getNode(Opcode, dl, HiVTs, HiLHS, HiRHS).getNode(); in SplitVecRes_OverflowOp()
2915 if (Res.getNode() == N) in SplitVectorOperand()
4140 if (Res.getNode()) in WidenVectorResult()
5876 if (Res.getNode() == N) in WidenVectorOperand()
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H A DLegalizeFloatTypes.cpp154 if (R.getNode()) { in SoftenFloatResult()
868 if (Res.getNode() == N) in SoftenFloatOperand()
933 if (!NewRHS.getNode()) { in SoftenFloatOp_BR_CC()
1044 if (NewRHS.getNode()) { in SoftenFloatOp_SETCC()
1281 if (Lo.getNode()) in ExpandFloatResult()
1819 if (Res.getNode() == N) in ExpandFloatOperand()
2124 if (R.getNode()) in PromoteFloatOperand()
2315 if (R.getNode()) in PromoteFloatResult()
2534 return DAG.getNode( in PromoteFloatRes_XINT_TO_FP()
2679 if (R.getNode()) in SoftPromoteHalfResult()
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H A DSelectionDAGBuilder.cpp284 return DAG.getNode( in getCopyFromParts()
1284 if (Val.getNode()) { in resolveDanglingDebugInfo()
1423 if (N.getNode()) { in handleDebugValue()
1552 if (N.getNode()) return N; in getValue()
1571 if (N.getNode()) { in getNonRegisterValue()
4957 SDValue t1 = DAG.getNode( in GetExponent()
5677 if (!Op && N.getNode()) { in EmitFuncArgumentDbgValue()
6157 if (N.getNode()) { in visitIntrinsicCall()
6452 Result = DAG.getNode( in visitIntrinsicCall()
7874 assert((Result.second.getNode() || !Result.first.getNode()) && in lowerInvokable()
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H A DLegalizeVectorOps.cpp516 if (!Res.getNode()) in LowerOperationWrapper()
598 Res = DAG.getNode(ISD::FP_ROUND, dl, VT, Res, in Promote()
601 Res = DAG.getNode(ISD::BITCAST, dl, VT, Res); in Promote()
1071 return DAG.getNode( in ExpandANY_EXTEND_VECTOR_INREG()
1092 return DAG.getNode(ISD::SRA, DL, VT, in ExpandSIGN_EXTEND_VECTOR_INREG()
1132 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
1160 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
1272 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
1273 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); in ExpandVSELECT()
1545 if (CC.getNode()) { in ExpandSETCC()
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/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp727 return DAG.getNode(ISD::SHL, dl, MVT::i32, in convertToByteIndex()
814 if (!SplatV.getNode()) in buildHvxVectorReg()
830 assert(SplatV.getNode()); in buildHvxVectorReg()
873 if (Vec.getNode() != nullptr && T.getNode() != Vec.getNode()) in buildHvxVectorReg()
1677 for (SDValue V : Op.getNode()->ops()) in LowerHvxConcatVectors()
1727 ArrayRef<SDUse> U(Op.getNode()->ops()); in LowerHvxConcatVectors()
1893 return DAG.getNode(ISD::SUB, dl, ResTy, in LowerHvxCttz()
2100 DAG.getNode(ISD::AND, dl, MVT::i32, in LowerHvxFunnelShift()
2103 DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerHvxFunnelShift()
2123 return DAG.getNode(MOpc, dl, ty(Op), in LowerHvxFunnelShift()
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H A DHexagonISelDAGToDAG.cpp277 SDNode *C = Ch.getNode(); in tryLoadOfLoadIntrinsic()
305 if (C->getNumOperands() < 4 || Loc.getNode() != C->getOperand(3).getNode()) in tryLoadOfLoadIntrinsic()
1119 ReplaceNode(T0.getNode(), NewShl.getNode()); in ppAddrReorderAddShl()
1195 ReplaceNode(T0.getNode(), NewShl.getNode()); in ppAddrRewriteAndSrl()
1721 assert(A.Value.getNode() && B.Value.getNode()); in Compare()
1967 if ((!isOpcodeHandled(Op0.getNode()) || RootWeights.count(Op0.getNode())) && in balanceSubTree()
1968 (!isOpcodeHandled(Op1.getNode()) || RootWeights.count(Op1.getNode()))) { in balanceSubTree()
2032 if (Child.getNode() != N && RootWeights.count(Child.getNode())) { in balanceSubTree()
2197 if (GA.Value.getNode()) in balanceSubTree()
2228 if ((RootWeights.count(V0.getNode()) && RootWeights[V0.getNode()] == -2) || in balanceSubTree()
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/openbsd/gnu/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp3314 if (Flag.getNode()) in LowerReturn()
5151 if (True.getNode() && False.getNode()) { in LowerSELECT()
12480 if (!IsVUZPShuffleNode(N0.getNode()) || N0.getNode() != N1.getNode() || in AddCombineToVPADD()
12518 if (!IsVUZPShuffleNode(N00.getNode()) || N00.getNode() != N10.getNode() || in AddCombineVUZPToVPADDL()
12781 if (AddcSubcOp0.getNode() == AddcSubcOp1.getNode()) in AddCombineTo64bitMLAL()
12802 if (AddeSubeOp0.getNode() == AddeSubeOp1.getNode()) in AddCombineTo64bitMLAL()
14317 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) || in PerformORCombineToSMULWBT()
14990 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
15392 DCI.CombineTo(OtherExt.getNode(), SDValue(VMOVRRD.getNode(), 1)); in PerformExtractEltToVMOVRRD()
18093 DAG.ReplaceAllUsesWith(Int.getNode(), LoopDec.getNode()); in PerformHWLoopCombine()
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/openbsd/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp3920 return DAG.getNode( in LowerVectorFP_TO_INT()
3993 return DAG.getNode( in LowerFP_TO_INT()
4225 return DAG.getNode( in LowerINT_TO_FP()
4811 return DAG.getNode( in LowerINTRINSIC_VOID()
4817 return DAG.getNode( in LowerINTRINSIC_VOID()
7874 if (Flag.getNode()) in LowerReturn()
7931 return DAG.getNode( in getAddrLarge()
8687 Val = DAG.getNode( in LowerCTPOP_PARITY()
13178 if (!Cmp.getNode()) in LowerVSETCC()
20018 N = NV.getNode(); in performBRCONDCombine()
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/openbsd/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp547 SDValue Lo(Hi.getNode(), 1); in LowerSMUL_LOHI()
564 SDValue Lo(Hi.getNode(), 1); in LowerUMUL_LOHI()
661 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
669 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
680 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
721 SDValue Carry(Lo.getNode(), 1); in ExpandADDSUB()
725 SDValue Ignored(Hi.getNode(), 1); in ExpandADDSUB()
735 SDNode *Node = Op.getNode(); in LowerVAARG()
1211 if (InFlag.getNode()) in LowerCCCCallTo()
1505 if (Flag.getNode()) in LowerReturn()
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/openbsd/gnu/llvm/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp3355 if (Flag.getNode()) in LowerReturn()
4907 if (InFlag.getNode()) in LowerCall()
9149 if (!V1.getNode()) in LowerBuildVectorv4x32()
11302 assert(!VarElt.getNode() && !InsIndex.getNode() && in LowerBUILD_VECTOR()
11408 if (Op.getNode()->isOnlyUserOf(Item.getNode())) in LowerBUILD_VECTOR()
23501 Res = DAG.getNode( in LowerFP_TO_FP16()
24505 if (!Src.getNode()) in LowerAndToBT()
31350 M = DAG.getNode( in LowerRotate()
31360 M = DAG.getNode( in LowerRotate()
31370 M = DAG.getNode( in LowerRotate()
[all …]
/openbsd/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp350 if (Result.getNode()) { in LowerAsmOperandForConstraint()
591 if (Flag.getNode()) in LowerReturn()
595 return DAG.getNode(Opc, DL, MVT::Other, in LowerReturn()
695 if (StackPtr.getNode() == nullptr) in LowerCCCCallTo()
756 if (InFlag.getNode()) in LowerCCCCallTo()
947 Res = DAG.getNode(ISD::SHL, DL, VT, V, in LowerMUL()
1140 return DAG.getNode(ISD::OR, DL, MVT::i32, in LowerConstantPool()
1305 SDValue NegatedPlus32 = DAG.getNode( in LowerSRL_PARTS()
1446 if (N0.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
1449 if (N1.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
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/openbsd/gnu/llvm/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp665 if (!StackPtr.getNode()) { in LowerCall()
723 if (!StackPtr.getNode()) { in LowerCall()
821 if (InFlag.getNode()) in LowerCall()
1136 if (Flag.getNode()) in LowerReturn()
1412 SDNode *N = Op.getNode(); in LowerXALUO()
1515 if (LHS.getNode()) in LowerAndToBTST()
1578 if (ISD::isNON_EXTLoad(LHS.getNode()) && !ISD::isNON_EXTLoad(RHS.getNode())) { in TranslateM68kCC()
1821 return SDValue(Op.getNode(), 1); in EmitTest()
1877 return SDValue(New.getNode(), 1); in EmitTest()
2874 if (Result.getNode()) { in LowerAsmOperandForConstraint()
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/openbsd/gnu/llvm/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp330 if (Flag.getNode()) in LowerReturn_32()
409 if (Flag.getNode()) in LowerReturn_64()
1061 if (InFlag.getNode()) in LowerCall_32()
1380 if (InGlue.getNode()) in LowerCall_64()
1426 if (!RV.getNode()) { in LowerCall_64()
2270 return DAG.getNode(ISD::ADD, DL, PtrVT, in LowerGlobalTLSAddress()
2656 return DAG.getNode( in LowerSELECT_CC()
2701 SDNode *Node = Op.getNode(); in LowerVAARG()
2791 SDValue Chain = DAG.getNode(SPISD::FLUSHW, in getFLUSHW()
2864 SDValue Ptr = DAG.getNode(ISD::ADD, in LowerRETURNADDR()
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