| /openbsd/sys/dev/ |
| H A D | spdmem.c | 375 int num_banks, per_chip; in spdmem_sdram_decode() local
385 num_banks = s->sm_data[SPDMEM_SDR_BANKS]; in spdmem_sdram_decode()
389 dimm_size = (1 << (rows + cols - 17)) * num_banks * per_chip; in spdmem_sdram_decode()
474 int i, num_banks, per_chip; in spdmem_ddr_decode() local
482 num_banks = s->sm_data[SPDMEM_SDR_BANKS]; in spdmem_ddr_decode()
486 dimm_size = (1 << (rows + cols - 17)) * num_banks * per_chip; in spdmem_ddr_decode()
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| /openbsd/sys/dev/pci/drm/amd/amdgpu/ |
| H A D | amdgpu_socbb.h | 68 uint32_t num_banks; member
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| H A D | amdgpu_gfx.h | 181 uint8_t num_banks; member
210 unsigned num_banks; member
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| H A D | gfx_v9_4_2.c | 51 uint32_t num_banks; member
1613 blk->num_banks * blk->num_ways * blk->num_mem_blocks; in gfx_v9_4_2_query_utc_edc_count()
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| H A D | dce_v6_0.c | 1939 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
1945 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v6_0_crtc_do_set_base()
1947 fb_format |= GRPH_NUM_BANKS(num_banks); in dce_v6_0_crtc_do_set_base()
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| H A D | dce_v8_0.c | 1908 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1914 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v8_0_crtc_do_set_base()
1916 fb_format |= (num_banks << GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT); in dce_v8_0_crtc_do_set_base()
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| H A D | dce_v10_0.c | 1983 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1989 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v10_0_crtc_do_set_base()
1991 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_NUM_BANKS, num_banks); in dce_v10_0_crtc_do_set_base()
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| H A D | amdgpu_amdkfd_gpuvm.c | 3027 config->num_banks = adev->gfx.config.num_banks; in amdgpu_amdkfd_get_tile_config()
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| /openbsd/sys/dev/pci/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 186 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in fill_gfx8_tiling_info_from_flags() local
192 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in fill_gfx8_tiling_info_from_flags()
195 tiling_info->gfx8.num_banks = num_banks; in fill_gfx8_tiling_info_from_flags()
219 tiling_info->gfx9.num_banks = in fill_gfx9_tiling_info_from_device()
220 adev->gfx.config.gb_addr_config_fields.num_banks; in fill_gfx9_tiling_info_from_device()
256 tiling_info->gfx9.num_banks = 1u << mod_bank_xor_bits; in fill_gfx9_tiling_info_from_modifier()
410 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in add_gfx9_modifiers()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn10/ |
| H A D | dcn10_fpu.c | 119 .num_banks = 8,
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| /openbsd/sys/dev/pci/drm/amd/display/dc/core/ |
| H A D | dc_debug.c | 141 plane_state->tiling_info.gfx8.num_banks, in pre_surface_trace()
233 update->plane_info->tiling_info.gfx8.num_banks, in update_surface_trace()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 331 unsigned int num_banks; member
393 unsigned int num_banks; member
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce/ |
| H A D | dce_mem_input.c | 438 GRPH_NUM_BANKS, log_2(info->gfx9.num_banks), in program_tiling()
451 GRPH_NUM_BANKS, info->gfx8.num_banks, in program_tiling()
468 GRPH_NUM_BANKS, info->gfx8.num_banks, in program_tiling()
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| /openbsd/sys/dev/pci/drm/amd/amdkfd/ |
| H A D | kfd_crat.h | 112 uint8_t num_banks; member
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| /openbsd/sys/dev/pci/drm/amd/include/ |
| H A D | kgd_kfd_interface.h | 165 uint32_t num_banks; member
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 152 .num_banks = 8,
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 230 unsigned int num_banks; member
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 151 .num_banks = 8,
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| /openbsd/sys/dev/pci/drm/radeon/ |
| H A D | atombios_crtc.c | 1270 unsigned index, num_banks; in dce4_crtc_do_set_base() local
1290 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; in dce4_crtc_do_set_base()
1305 num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3; in dce4_crtc_do_set_base()
1308 fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks); in dce4_crtc_do_set_base()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 201 .num_banks = 8,
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| /openbsd/sys/dev/pci/drm/include/uapi/linux/ |
| H A D | kfd_ioctl.h | 375 __u32 num_banks; /* from KFD */ member
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 317 .num_banks = 8,
428 .num_banks = 8,
539 .num_banks = 8,
753 .num_banks = 8,
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dce110/ |
| H A D | dce110_mem_input_v.c | 172 set_reg_field_value(value, info->gfx8.num_banks, in program_tiling()
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 164 .num_banks = 8,
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| /openbsd/sys/dev/pci/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_resource.c | 225 .num_banks = 8,
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