1 #ifndef Z80_H 2 #define Z80_H 3 4 #include "cpuintrf.h" 5 #include "osd_cpu.h" 6 7 #undef VERBOSE 8 #define VERBOSE 0 9 10 #if VERBOSE 11 #define LOG(x) logerror x 12 #else 13 #define LOG(x) 14 #endif 15 16 /* execute main opcodes inside a big switch statement */ 17 #ifndef BIG_SWITCH 18 #define BIG_SWITCH 1 19 #endif 20 21 /* big flags array for ADD/ADC/SUB/SBC/CP results */ 22 #define BIG_FLAGS_ARRAY 1 23 24 /* Set to 1 for a more exact (but somewhat slower) Z80 emulation */ 25 #define Z80_EXACT 1 26 27 /* on JP and JR opcodes check for tight loops */ 28 #define BUSY_LOOP_HACKS 1 29 30 /* check for delay loops counting down BC */ 31 #define TIME_LOOP_HACKS 1 32 33 #ifdef X86_ASM 34 #undef BIG_FLAGS_ARRAY 35 #define BIG_FLAGS_ARRAY 0 36 #endif 37 38 enum { 39 Z80_PC=1, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL, 40 Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2, 41 Z80_R, Z80_I, Z80_IM, Z80_IFF1, Z80_IFF2, Z80_HALT, 42 Z80_NMI_STATE, Z80_IRQ_STATE, Z80_DC0, Z80_DC1, Z80_DC2, Z80_DC3 43 }; 44 45 enum { 46 Z80_TABLE_op, 47 Z80_TABLE_cb, 48 Z80_TABLE_ed, 49 Z80_TABLE_xy, 50 Z80_TABLE_xycb, 51 Z80_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */ 52 }; 53 54 /****************************************************************************/ 55 /* The Z80 registers. HALT is set to 1 when the CPU is halted, the refresh */ 56 /* register is calculated as follows: refresh=(Regs.R&127)|(Regs.R2&128) */ 57 /****************************************************************************/ 58 typedef struct { 59 /* 00 */ PAIR PREPC,PC,SP,AF,BC,DE,HL,IX,IY; 60 /* 24 */ PAIR AF2,BC2,DE2,HL2; 61 /* 34 */ UINT8 R,R2,IFF1,IFF2,HALT,IM,I; 62 /* 3B */ UINT8 irq_max; /* number of daisy chain devices */ 63 /* 3C */ INT8 request_irq; /* daisy chain next request device */ 64 /* 3D */ INT8 service_irq; /* daisy chain next reti handling device */ 65 /* 3E */ UINT8 nmi_state; /* nmi line state */ 66 /* 3F */ UINT8 irq_state; /* irq line state */ 67 /* 40 */ UINT8 int_state[Z80_MAXDAISY]; 68 /* 44 */ Z80_DaisyChain irq[Z80_MAXDAISY]; 69 /* 84 */ int (*irq_callback)(int irqline); 70 /* 88 */ int extra_cycles; /* extra cycles for interrupts */ 71 } Z80_Regs; 72 73 74 typedef struct { 75 int z80_ICount; /* T-state count */ 76 Z80_Regs Z80; 77 UINT32 EA; 78 int after_EI; 79 80 UINT8 SZ[256]; /* zero and sign flags */ 81 UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */ 82 UINT8 SZP[256]; /* zero, sign and parity flags */ 83 UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */ 84 UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */ 85 86 #if BIG_FLAGS_ARRAY 87 UINT8 *SZHVC_add; 88 UINT8 *SZHVC_sub; 89 #endif 90 91 void *userdata; 92 } z80_state_t; 93 94 z80_state_t *z80_init(void); 95 void z80_free (z80_state_t *z80); 96 void z80_reset (z80_state_t *z80, void *param); 97 void z80_exit (z80_state_t *z80); 98 int z80_execute(z80_state_t *z80, int cycles); 99 void z80_burn(z80_state_t *z80, int cycles); 100 unsigned z80_get_context (z80_state_t *z80, void *dst); 101 void z80_set_context (z80_state_t *z80, void *src); 102 const void *z80_get_cycle_table (z80_state_t *z80, int which); 103 void z80_set_cycle_table (z80_state_t *z80, int which, void *new_tbl); 104 unsigned z80_get_reg (z80_state_t *z80, int regnum); 105 void z80_set_reg (z80_state_t *z80, int regnum, unsigned val); 106 void z80_set_irq_line(z80_state_t *z80, int irqline, int state); 107 void z80_set_irq_callback(z80_state_t *z80, int (*irq_callback)(int)); 108 const char *z80_info(z80_state_t *z80, void *context, int regnum); 109 unsigned z80_dasm(z80_state_t *z80, char *buffer, unsigned pc); 110 111 #ifdef MAME_DEBUG 112 unsigned DasmZ80(z80_state_t *z80, char *buffer, unsigned pc); 113 #endif 114 115 void cps1_decode(unsigned char *rom, int swap_key1,int swap_key2,int addr_key,int xor_key); 116 #endif 117 118