1 /* 2 AC101 - a AC101 Codec driver library for ESP-IDF 3 ported to esp-idf by Thomas Hopman from the Arduino driver made by Ivo Pullens 4 5 AC101 - An AC101 Codec driver library for Arduino 6 Copyright (C) 2019, Ivo Pullens, Emmission 7 8 Inspired by: 9 https://github.com/donny681/esp-adf/tree/master/components/audio_hal/driver/AC101 10 11 This program is free software: you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation, either version 3 of the License, or 14 (at your option) any later version. 15 16 This program is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program. If not, see <http://www.gnu.org/licenses/>. 23 */ 24 25 #ifndef AC101_H 26 #define AC101_H 27 28 #include <stdio.h> 29 #include <stdint.h> 30 #include "esp_types.h" 31 #include "esp_err.h" 32 33 #define AC101_TAG "AC101" 34 35 // I2C 36 #define I2C_MASTER_NUM 1 /*!< I2C port number for master dev */ 37 #define I2C_MASTER_SCL_IO 32 38 #define I2C_MASTER_SDA_IO 33 39 #define I2C_MASTER_FREQ_HZ 100000 40 #define I2C_MASTER_TX_BUF_DISABLE 0 41 #define I2C_MASTER_RX_BUF_DISABLE 0 42 43 #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */ 44 #define READ_BIT I2C_MASTER_READ /*!< I2C master read */ 45 #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/ 46 #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */ 47 48 #define ACK_VAL (i2c_ack_type_t) 0x0 /*!< I2C ack value */ 49 #define NACK_VAL (i2c_ack_type_t) 0x1 /*!< I2C nack value */ 50 51 // PA GPIO 52 #define GPIO_PA_EN GPIO_NUM_21 53 #define GPIO_SEL_PA_EN GPIO_SEL_21 54 55 // Device address 56 #define AC101_ADDR 0x1A 57 58 // Register Adresses 59 #define CHIP_AUDIO_RS 0x00 60 #define PLL_CTRL1 0x01 61 #define PLL_CTRL2 0x02 62 #define SYSCLK_CTRL 0x03 63 #define MOD_CLK_ENA 0x04 64 #define MOD_RST_CTRL 0x05 65 #define I2S_SR_CTRL 0x06 66 #define I2S1LCK_CTRL 0x10 67 #define I2S1_SDOUT_CTRL 0x11 68 #define I2S1_SDIN_CTRL 0x12 69 #define I2S1_MXR_SRC 0x13 70 #define I2S1_VOL_CTRL1 0x14 71 #define I2S1_VOL_CTRL2 0x15 72 #define I2S1_VOL_CTRL3 0x16 73 #define I2S1_VOL_CTRL4 0x17 74 #define I2S1_MXR_GAIN 0x18 75 #define ADC_DIG_CTRL 0x40 76 #define ADC_VOL_CTRL 0x41 77 #define HMIC_CTRL1 0x44 78 #define HMIC_CTRL2 0x45 79 #define HMIC_STATUS 0x46 80 #define DAC_DIG_CTRL 0x48 81 #define DAC_VOL_CTRL 0x49 82 #define DAC_MXR_SRC 0x4C 83 #define DAC_MXR_GAIN 0x4D 84 #define ADC_APC_CTRL 0x50 85 #define ADC_SRC 0x51 86 #define ADC_SRCBST_CTRL 0x52 87 #define OMIXER_DACA_CTRL 0x53 88 #define OMIXER_SR 0x54 89 #define OMIXER_BST1_CTRL 0x55 90 #define HPOUT_CTRL 0x56 91 #define SPKOUT_CTRL 0x58 92 #define AC_DAC_DAPCTRL 0xA0 93 #define AC_DAC_DAPHHPFC 0xA1 94 #define AC_DAC_DAPLHPFC 0xA2 95 #define AC_DAC_DAPLHAVC 0xA3 96 #define AC_DAC_DAPLLAVC 0xA4 97 #define AC_DAC_DAPRHAVC 0xA5 98 #define AC_DAC_DAPRLAVC 0xA6 99 #define AC_DAC_DAPHGDEC 0xA7 100 #define AC_DAC_DAPLGDEC 0xA8 101 #define AC_DAC_DAPHGATC 0xA9 102 #define AC_DAC_DAPLGATC 0xAA 103 #define AC_DAC_DAPHETHD 0xAB 104 #define AC_DAC_DAPLETHD 0xAC 105 #define AC_DAC_DAPHGKPA 0xAD 106 #define AC_DAC_DAPLGKPA 0xAE 107 #define AC_DAC_DAPHGOPA 0xAF 108 #define AC_DAC_DAPLGOPA 0xB0 109 #define AC_DAC_DAPOPT 0xB1 110 #define DAC_DAP_ENA 0xB5 111 112 #define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) 113 114 const uint8_t regs[] = { 115 CHIP_AUDIO_RS , 116 PLL_CTRL1 , 117 PLL_CTRL2 , 118 SYSCLK_CTRL , 119 MOD_CLK_ENA , 120 MOD_RST_CTRL , 121 I2S_SR_CTRL , 122 I2S1LCK_CTRL , 123 I2S1_SDOUT_CTRL , 124 I2S1_SDIN_CTRL , 125 I2S1_MXR_SRC , 126 I2S1_VOL_CTRL1 , 127 I2S1_VOL_CTRL2 , 128 I2S1_VOL_CTRL3 , 129 I2S1_VOL_CTRL4 , 130 I2S1_MXR_GAIN , 131 ADC_DIG_CTRL , 132 ADC_VOL_CTRL , 133 HMIC_CTRL1 , 134 HMIC_CTRL2 , 135 HMIC_STATUS , 136 DAC_DIG_CTRL , 137 DAC_VOL_CTRL , 138 DAC_MXR_SRC , 139 DAC_MXR_GAIN , 140 ADC_APC_CTRL , 141 ADC_SRC , 142 ADC_SRCBST_CTRL , 143 OMIXER_DACA_CTRL , 144 OMIXER_SR , 145 OMIXER_BST1_CTRL , 146 HPOUT_CTRL , 147 SPKOUT_CTRL , 148 AC_DAC_DAPCTRL , 149 AC_DAC_DAPHHPFC , 150 AC_DAC_DAPLHPFC , 151 AC_DAC_DAPLHAVC , 152 AC_DAC_DAPLLAVC , 153 AC_DAC_DAPRHAVC , 154 AC_DAC_DAPRLAVC , 155 AC_DAC_DAPHGDEC , 156 AC_DAC_DAPLGDEC , 157 AC_DAC_DAPHGATC , 158 AC_DAC_DAPLGATC , 159 AC_DAC_DAPHETHD , 160 AC_DAC_DAPLETHD , 161 AC_DAC_DAPHGKPA , 162 AC_DAC_DAPLGKPA , 163 AC_DAC_DAPHGOPA , 164 AC_DAC_DAPLGOPA , 165 AC_DAC_DAPOPT , 166 DAC_DAP_ENA 167 }; 168 169 class AC101 170 { 171 public: 172 typedef enum { 173 SAMPLE_RATE_8000 = 0x0000, 174 SAMPLE_RATE_11052 = 0x1000, 175 SAMPLE_RATE_12000 = 0x2000, 176 SAMPLE_RATE_16000 = 0x3000, 177 SAMPLE_RATE_22050 = 0x4000, 178 SAMPLE_RATE_24000 = 0x5000, 179 SAMPLE_RATE_32000 = 0x6000, 180 SAMPLE_RATE_44100 = 0x7000, 181 SAMPLE_RATE_48000 = 0x8000, 182 SAMPLE_RATE_96000 = 0x9000, 183 SAMPLE_RATE_192000 = 0xa000, 184 } I2sSampleRate_t; 185 186 typedef enum { 187 MODE_MASTER = 0x00, 188 MODE_SLAVE = 0x01, 189 } I2sMode_t; 190 191 typedef enum { 192 WORD_SIZE_8_BITS = 0x00, 193 WORD_SIZE_16_BITS = 0x01, 194 WORD_SIZE_20_BITS = 0x02, 195 WORD_SIZE_24_BITS = 0x03, 196 } I2sWordSize_t; 197 198 typedef enum { 199 DATA_FORMAT_I2S = 0x00, 200 DATA_FORMAT_LEFT = 0x01, 201 DATA_FORMAT_RIGHT = 0x02, 202 DATA_FORMAT_DSP = 0x03, 203 } I2sFormat_t; 204 205 typedef enum { 206 BCLK_DIV_1 = 0x0, 207 BCLK_DIV_2 = 0x1, 208 BCLK_DIV_4 = 0x2, 209 BCLK_DIV_6 = 0x3, 210 BCLK_DIV_8 = 0x4, 211 BCLK_DIV_12 = 0x5, 212 BCLK_DIV_16 = 0x6, 213 BCLK_DIV_24 = 0x7, 214 BCLK_DIV_32 = 0x8, 215 BCLK_DIV_48 = 0x9, 216 BCLK_DIV_64 = 0xa, 217 BCLK_DIV_96 = 0xb, 218 BCLK_DIV_128 = 0xc, 219 BCLK_DIV_192 = 0xd, 220 } I2sBitClockDiv_t; 221 222 typedef enum { 223 LRCK_DIV_16 = 0x0, 224 LRCK_DIV_32 = 0x1, 225 LRCK_DIV_64 = 0x2, 226 LRCK_DIV_128 = 0x3, 227 LRCK_DIV_256 = 0x4, 228 } I2sLrClockDiv_t; 229 230 231 typedef enum { 232 MODE_ADC, 233 MODE_DAC, 234 MODE_ADC_DAC, 235 MODE_LINE 236 } Mode_t; 237 238 // Constructor. 239 AC101(); 240 241 // Initialize the I2C interface 242 esp_err_t InitI2C(void); 243 244 // AC101 begin 245 // Initialize codec, using provided I2C pins and bus frequency. 246 // sets up 24 bit 48Khz sample-rate 247 // enables line input, line (headphone) output and turns on the speaker outputs 248 // @return false on success, true on failure. 249 esp_err_t begin(); 250 251 // Get speaker volume. 252 // @return Speaker volume, [63..0] for [0..-43.5] [dB], in increments of 2. 253 uint8_t GetVolumeSpeaker(); 254 255 // Set speaker volume. 256 // @param volume Target volume, [63..0] for [0..-43.5] [dB], in increments of 2. 257 // @return false on success, true on failure. 258 esp_err_t SetVolumeSpeaker(uint8_t volume); 259 260 // Get headphone volume. 261 // @return Headphone volume, [63..0] for [0..-62] [dB] 262 uint8_t GetVolumeHeadphone(); 263 264 // Set headphone volume 265 // @param volume Target volume, [63..0] for [0..-62] [dB] 266 // @return false on success, true on failure. 267 esp_err_t SetVolumeHeadphone(uint8_t volume); 268 269 // Configure I2S samplerate. 270 // @param rate Samplerate. 271 // @return false on success, true on failure. 272 esp_err_t SetI2sSampleRate(I2sSampleRate_t rate); 273 274 // Configure I2S mode (master/slave). 275 // @param mode Mode. 276 // @return false on success, true on failure. 277 esp_err_t SetI2sMode(I2sMode_t mode); 278 279 // Configure I2S word size (8/16/20/24 bits). 280 // @param size Word size. 281 // @return false on success, true on failure. 282 esp_err_t SetI2sWordSize(I2sWordSize_t size); 283 284 // Configure I2S format (I2S/Left/Right/Dsp). 285 // @param format I2S format. 286 // @return false on success, true on failure. 287 esp_err_t SetI2sFormat(I2sFormat_t format); 288 289 // Configure I2S clock. 290 // @param bitClockDiv I2S1CLK/BCLK1 ratio. 291 // @param bitClockInv I2S1 BCLK Polarity. 292 // @param lrClockDiv BCLK1/LRCK ratio. 293 // @param lrClockInv I2S1 LRCK Polarity. 294 // @return false on success, true on failure. 295 esp_err_t SetI2sClock(I2sBitClockDiv_t bitClockDiv, bool bitClockInv, I2sLrClockDiv_t lrClockDiv, bool lrClockInv); 296 297 // Configure the mode (Adc/Dac/Adc+Dac/Line) 298 // @param mode Operating mode. 299 // @return false on success, true on failure. 300 esp_err_t SetMode(Mode_t mode); 301 302 // AC101 DumpRegister 303 // prints out contents of the AC101 registers in hex 304 void DumpRegisters(); 305 306 // AC101 PA Power 307 // enables or disables the speaker outputs 308 void ac101_pa_power(bool enable); 309 310 // printBits 311 // print out any value in binary format. Used for debugging 312 void printBits(size_t const size, void const * const ptr); 313 314 // printRead 315 // print out the contents of any ac101 register. Used for debugging 316 void printRead(uint8_t reg); 317 318 protected: 319 320 // Write to a register of the AC101 321 // reg: Register Address 322 // val: Value to be written 323 // @return false on success, true on failure. 324 esp_err_t WriteReg(uint8_t reg, uint16_t val); 325 326 // Read a register of the AC101 327 // reg: Register Address to be read 328 // @return: uint16_t value of register. 329 uint16_t ReadReg(uint8_t reg); 330 331 // AC101 read register full 332 // Reads the value of the AC101 register Address 333 // reg: Register Address 334 // data_rd: Pointer to return value 335 // size: size of data to be read 336 // @return false on success, true on failure. 337 esp_err_t ReadReg_Full(uint8_t reg, uint8_t* data_rd, size_t size); 338 339 }; 340 341 #endif 342