1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_delayblock.c
4 * @author MCD Application Team
5 * @brief DelayBlock Low Layer HAL module driver.
6 *
7 * This file provides firmware functions to manage the following
8 * functionalities of the Delay Block peripheral:
9 * + input clock frequency range 25MHz to 208MHz
10 * + up to 12 oversampling phases
11 *
12 @verbatim
13 ==============================================================================
14 ##### DelayBlock peripheral features #####
15 ==============================================================================
16 [..] The Delay block is used to generate an Output clock which is de-phased from the Input
17 clock. The phase of the Output clock is programmed by FW. The Output clock is then used
18 to clock the receive data in i.e. a SDMMC or QSPI interface.
19 The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
20 and recenter the Output clock phase to the receive data.
21
22 [..] The Delay Block features include the following:
23 (+) Input clock frequency range 25MHz to 208MHz.
24 (+) Up to 12 oversampling phases.
25
26 ##### How to use this driver #####
27 ==============================================================================
28 [..]
29 This driver is a considered as a driver of service for external devices drivers
30 that interfaces with the DELAY peripheral.
31 The DelayBlock_Enable() function, enables the DelayBlock instance, configure the delay line length
32 and configure the Output clock phase.
33 The DelayBlock_Disable() function, disables the DelayBlock instance by setting DEN flag to 0.
34
35
36 @endverbatim
37 ******************************************************************************
38 * @attention
39 *
40 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
41 * All rights reserved.</center></h2>
42 *
43 * This software component is licensed by ST under BSD 3-Clause license,
44 * the "License"; You may not use this file except in compliance with the
45 * License. You may obtain a copy of the License at:
46 * opensource.org/licenses/BSD-3-Clause
47 *
48 ******************************************************************************
49 */
50
51 /* Includes ------------------------------------------------------------------*/
52 #include "stm32h7xx_hal.h"
53
54 /** @addtogroup STM32H7xx_HAL_Driver
55 * @{
56 */
57
58 /** @defgroup DELAYBLOCK_LL DELAYBLOCK_LL
59 * @brief Low layer module for Delay Block
60 * @{
61 */
62
63 #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_QSPI_MODULE_ENABLED)
64
65 /* Private typedef -----------------------------------------------------------*/
66 /* Private define ------------------------------------------------------------*/
67 /* Private macro -------------------------------------------------------------*/
68 /* Private variables ---------------------------------------------------------*/
69 /* Private function prototypes -----------------------------------------------*/
70 /* Exported functions --------------------------------------------------------*/
71
72 /** @defgroup DelayBlock_LL_Exported_Functions Delay Block Low Layer Exported Functions
73 * @{
74 */
75
76 /** @defgroup HAL_DELAY_LL_Group1 Initialization de-initialization functions
77 * @brief Initialization and Configuration functions
78 *
79 @verbatim
80 ===============================================================================
81 ##### Initialization and de-initialization functions #####
82 ===============================================================================
83 [..] This section provides functions allowing to:
84
85 @endverbatim
86 * @{
87 */
88
89
90 /**
91 * @brief Enable the Delay Block instance.
92 * @param DLYBx: Pointer to DLYB instance.
93 * @retval HAL status
94 */
DelayBlock_Enable(DLYB_TypeDef * DLYBx)95 HAL_StatusTypeDef DelayBlock_Enable(DLYB_TypeDef *DLYBx)
96 {
97 uint32_t i=0,N, lng, tuningOn = 1;
98 uint32_t length_valid;
99 uint32_t length_value;
100 assert_param(IS_DLYB_ALL_INSTANCE(DLYBx));
101
102 DLYBx->CR = DLYB_CR_DEN | DLYB_CR_SEN;
103
104 while((tuningOn != 0U) && (i < DLYB_MAX_UNIT))
105 {
106
107 DLYBx->CFGR = 12U | (i << 8U);
108 HAL_Delay(1);
109
110 length_valid = DLYBx->CFGR & DLYB_CFGR_LNGF;
111 length_value = DLYBx->CFGR & DLYB_CFGR_LNG;
112
113 if((length_valid != 0U)
114 && (length_value != 0U)
115 && (length_value != (DLYB_CFGR_LNG_11 | DLYB_CFGR_LNG_10)))
116 {
117 tuningOn = 0;
118 }
119 i++;
120
121 }
122
123 if(DLYB_MAX_UNIT != i)
124 {
125
126 lng = (DLYBx->CFGR & DLYB_CFGR_LNG) >> 16;
127 N = 10;
128 while((N>0U) && ((lng >> N) == 0U))
129 {
130 N--;
131 }
132 if(0U != N)
133 {
134 MODIFY_REG(DLYBx->CFGR, DLYB_CFGR_SEL, ((N/2U)+1U));
135
136 /* Disable Selection phase */
137 DLYBx->CR = DLYB_CR_DEN;
138 return HAL_OK;
139 }
140 }
141
142 /* Disable DLYB */
143 (void) DelayBlock_Disable(DLYBx);
144 return HAL_ERROR;
145
146 }
147
148 /**
149 * @brief Disable the Delay Block instance.
150 * @param DLYBx: Pointer to DLYB instance.
151 * @retval HAL status
152 */
DelayBlock_Disable(DLYB_TypeDef * DLYBx)153 HAL_StatusTypeDef DelayBlock_Disable(DLYB_TypeDef *DLYBx)
154 {
155 /* Disable DLYB */
156 DLYBx->CR = 0;
157 return HAL_OK;
158 }
159
160 /**
161 * @}
162 */
163
164 /**
165 * @}
166 */
167
168 #endif /* (HAL_SD_MODULE_ENABLED) & (HAL_QSPI_MODULE_ENABLED)*/
169 /**
170 * @}
171 */
172
173 /**
174 * @}
175 */
176
177 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
178