1 // Copyright 2013 Emilie Gillet.
2 //
3 // Author: Emilie Gillet (emilie.o.gillet@gmail.com)
4 //
5 // Permission is hereby granted, free of charge, to any person obtaining a copy
6 // of this software and associated documentation files (the "Software"), to deal
7 // in the Software without restriction, including without limitation the rights
8 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 // copies of the Software, and to permit persons to whom the Software is
10 // furnished to do so, subject to the following conditions:
11 //
12 // The above copyright notice and this permission notice shall be included in
13 // all copies or substantial portions of the Software.
14 //
15 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 // THE SOFTWARE.
22 //
23 // See http://creativecommons.org/licenses/MIT/ for more information.
24 //
25 // -----------------------------------------------------------------------------
26 //
27 // System level initialization.
28
29 #include "streams/drivers/system.h"
30
31 #include <stm32f10x_conf.h>
32
33 namespace streams {
34
Init(bool application)35 void System::Init(bool application) {
36 SystemInit();
37 if (application) {
38 NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x4000);
39 }
40
41 NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); // 2.2 priority split.
42
43 if (application) {
44 NVIC_InitTypeDef adc_interrupt;
45 adc_interrupt.NVIC_IRQChannel = DMA1_Channel1_IRQn;
46 adc_interrupt.NVIC_IRQChannelPreemptionPriority = 0;
47 adc_interrupt.NVIC_IRQChannelSubPriority = 0;
48 adc_interrupt.NVIC_IRQChannelCmd = ENABLE;
49 NVIC_Init(&adc_interrupt);
50 } else {
51 RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
52 TIM_TimeBaseInitTypeDef timer_init;
53 timer_init.TIM_Period = F_CPU / 48000 - 1;
54 timer_init.TIM_Prescaler = 0;
55 timer_init.TIM_ClockDivision = TIM_CKD_DIV1;
56 timer_init.TIM_CounterMode = TIM_CounterMode_Up;
57 timer_init.TIM_RepetitionCounter = 0;
58 TIM_InternalClockConfig(TIM2);
59 TIM_TimeBaseInit(TIM2, &timer_init);
60 TIM_Cmd(TIM2, ENABLE);
61
62 NVIC_InitTypeDef timer_interrupt;
63 timer_interrupt.NVIC_IRQChannel = TIM2_IRQn;
64 timer_interrupt.NVIC_IRQChannelPreemptionPriority = 0;
65 timer_interrupt.NVIC_IRQChannelSubPriority = 0;
66 timer_interrupt.NVIC_IRQChannelCmd = ENABLE;
67 NVIC_Init(&timer_interrupt);
68 }
69 }
70
StartTimers()71 void System::StartTimers() {
72 SysTick_Config(F_CPU / 4000);
73 }
74
75 } // namespace streams
76