1 /*
2 * Copyright (C) 2013-2015 Nuke.YKT(Alexey Khokholov)
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2.1 of the License, or (at your option) any later version.
8 *
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
13 *
14 * You should have received a copy of the GNU Lesser General Public
15 * License along with this library; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18
19 /*
20 Nuked Yamaha YMF262(aka OPL3) emulator.
21 Thanks:
22 MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
23 Feedback and Rhythm part calculation information.
24 forums.submarine.org.uk(carbon14, opl3):
25 Tremolo and phase generator calculation information.
26 OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
27 OPL2 ROMs.
28 */
29
30 //version 1.6
31
32 /* Changelog:
33 v1.1:
34 Vibrato's sign fix.
35 v1.2:
36 Operator key fix.
37 Corrected 4-operator mode.
38 Corrected rhythm mode.
39 Some small fixes.
40 v1.2.1:
41 Small envelope generator fix.
42 v1.3:
43 Complete rewrite.
44 v1.4:
45 New envelope and waveform generator.
46 Some small fixes.
47 v1.4.1:
48 Envelope generator rate calculation fix.
49 v1.4.2:
50 Version for ZDoom.
51 v1.5:
52 Optimizations.
53 v1.6:
54 Improved emulation output.
55 */
56
57 #include <stdlib.h>
58 #include <string.h>
59 #include "nukedopl3.h"
60
61 //
62 // Envelope generator
63 //
64
65 namespace NukedOPL3
66 {
67
68 typedef Bit16s(*envelope_sinfunc)(Bit16u phase, Bit16u envelope);
69 typedef void(*envelope_genfunc)(opl_slot *slott);
70
envelope_calcexp(Bit32u level)71 Bit16s envelope_calcexp(Bit32u level) {
72 if (level > 0x1fff) {
73 level = 0x1fff;
74 }
75 return ((exprom[(level & 0xff) ^ 0xff] | 0x400) << 1) >> (level >> 8);
76 }
77
envelope_calcsin0(Bit16u phase,Bit16u envelope)78 Bit16s envelope_calcsin0(Bit16u phase, Bit16u envelope) {
79 phase &= 0x3ff;
80 Bit16u out = 0;
81 Bit16u neg = 0;
82 if (phase & 0x200) {
83 neg = ~0;
84 }
85 if (phase & 0x100) {
86 out = logsinrom[(phase & 0xff) ^ 0xff];
87 }
88 else {
89 out = logsinrom[phase & 0xff];
90 }
91 return envelope_calcexp(out + (envelope << 3)) ^ neg;
92 }
93
envelope_calcsin1(Bit16u phase,Bit16u envelope)94 Bit16s envelope_calcsin1(Bit16u phase, Bit16u envelope) {
95 phase &= 0x3ff;
96 Bit16u out = 0;
97 if (phase & 0x200) {
98 out = 0x1000;
99 }
100 else if (phase & 0x100) {
101 out = logsinrom[(phase & 0xff) ^ 0xff];
102 }
103 else {
104 out = logsinrom[phase & 0xff];
105 }
106 return envelope_calcexp(out + (envelope << 3));
107 }
108
envelope_calcsin2(Bit16u phase,Bit16u envelope)109 Bit16s envelope_calcsin2(Bit16u phase, Bit16u envelope) {
110 phase &= 0x3ff;
111 Bit16u out = 0;
112 if (phase & 0x100) {
113 out = logsinrom[(phase & 0xff) ^ 0xff];
114 }
115 else {
116 out = logsinrom[phase & 0xff];
117 }
118 return envelope_calcexp(out + (envelope << 3));
119 }
120
envelope_calcsin3(Bit16u phase,Bit16u envelope)121 Bit16s envelope_calcsin3(Bit16u phase, Bit16u envelope) {
122 phase &= 0x3ff;
123 Bit16u out = 0;
124 if (phase & 0x100) {
125 out = 0x1000;
126 }
127 else {
128 out = logsinrom[phase & 0xff];
129 }
130 return envelope_calcexp(out + (envelope << 3));
131 }
132
envelope_calcsin4(Bit16u phase,Bit16u envelope)133 Bit16s envelope_calcsin4(Bit16u phase, Bit16u envelope) {
134 phase &= 0x3ff;
135 Bit16u out = 0;
136 Bit16u neg = 0;
137 if ((phase & 0x300) == 0x100) {
138 neg = ~0;
139 }
140 if (phase & 0x200) {
141 out = 0x1000;
142 }
143 else if (phase & 0x80) {
144 out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
145 }
146 else {
147 out = logsinrom[(phase << 1) & 0xff];
148 }
149 return envelope_calcexp(out + (envelope << 3)) ^ neg;
150 }
151
envelope_calcsin5(Bit16u phase,Bit16u envelope)152 Bit16s envelope_calcsin5(Bit16u phase, Bit16u envelope) {
153 phase &= 0x3ff;
154 Bit16u out = 0;
155 if (phase & 0x200) {
156 out = 0x1000;
157 }
158 else if (phase & 0x80) {
159 out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
160 }
161 else {
162 out = logsinrom[(phase << 1) & 0xff];
163 }
164 return envelope_calcexp(out + (envelope << 3));
165 }
166
envelope_calcsin6(Bit16u phase,Bit16u envelope)167 Bit16s envelope_calcsin6(Bit16u phase, Bit16u envelope) {
168 phase &= 0x3ff;
169 Bit16u neg = 0;
170 if (phase & 0x200) {
171 neg = ~0;
172 }
173 return envelope_calcexp(envelope << 3) ^ neg;
174 }
175
envelope_calcsin7(Bit16u phase,Bit16u envelope)176 Bit16s envelope_calcsin7(Bit16u phase, Bit16u envelope) {
177 phase &= 0x3ff;
178 Bit16u out = 0;
179 Bit16u neg = 0;
180 if (phase & 0x200) {
181 neg = ~0;
182 phase = (phase & 0x1ff) ^ 0x1ff;
183 }
184 out = phase << 3;
185 return envelope_calcexp(out + (envelope << 3)) ^ neg;
186 }
187
188 envelope_sinfunc envelope_sin[8] = {
189 envelope_calcsin0,
190 envelope_calcsin1,
191 envelope_calcsin2,
192 envelope_calcsin3,
193 envelope_calcsin4,
194 envelope_calcsin5,
195 envelope_calcsin6,
196 envelope_calcsin7
197 };
198
199 void envelope_gen_off(opl_slot *slott);
200 void envelope_gen_attack(opl_slot *slott);
201 void envelope_gen_decay(opl_slot *slott);
202 void envelope_gen_sustain(opl_slot *slott);
203 void envelope_gen_release(opl_slot *slott);
204
205 envelope_genfunc envelope_gen[5] = {
206 envelope_gen_off,
207 envelope_gen_attack,
208 envelope_gen_decay,
209 envelope_gen_sustain,
210 envelope_gen_release
211 };
212
213 enum envelope_gen_num {
214 envelope_gen_num_off = 0,
215 envelope_gen_num_attack = 1,
216 envelope_gen_num_decay = 2,
217 envelope_gen_num_sustain = 3,
218 envelope_gen_num_release = 4,
219 envelope_gen_num_change = 5
220 };
221
envelope_calc_rate(opl_slot * slot,Bit8u reg_rate)222 Bit8u envelope_calc_rate(opl_slot *slot, Bit8u reg_rate) {
223 if (reg_rate == 0x00) {
224 return 0x00;
225 }
226 Bit8u rate = (reg_rate << 2) + (slot->reg_ksr ? slot->channel->ksv : (slot->channel->ksv >> 2));
227 if (rate > 0x3c) {
228 rate = 0x3c;
229 }
230 return rate;
231 }
232
envelope_update_ksl(opl_slot * slot)233 void envelope_update_ksl(opl_slot *slot) {
234 Bit16s ksl = (kslrom[slot->channel->f_num >> 6] << 2) - ((0x08 - slot->channel->block) << 5);
235 if (ksl < 0) {
236 ksl = 0;
237 }
238 slot->eg_ksl = (Bit8u)ksl;
239 }
240
envelope_update_rate(opl_slot * slot)241 void envelope_update_rate(opl_slot *slot) {
242 switch (slot->eg_gen) {
243 case envelope_gen_num_off:
244 slot->eg_rate = 0;
245 break;
246 case envelope_gen_num_attack:
247 slot->eg_rate = envelope_calc_rate(slot, slot->reg_ar);
248 break;
249 case envelope_gen_num_decay:
250 slot->eg_rate = envelope_calc_rate(slot, slot->reg_dr);
251 break;
252 case envelope_gen_num_sustain:
253 case envelope_gen_num_release:
254 slot->eg_rate = envelope_calc_rate(slot, slot->reg_rr);
255 break;
256 }
257 }
258
envelope_gen_off(opl_slot * slot)259 void envelope_gen_off(opl_slot *slot) {
260 slot->eg_rout = 0x1ff;
261 }
262
envelope_gen_attack(opl_slot * slot)263 void envelope_gen_attack(opl_slot *slot) {
264 if (slot->eg_rout == 0x00) {
265 slot->eg_gen = envelope_gen_num_decay;
266 envelope_update_rate(slot);
267 return;
268 }
269 slot->eg_rout += ((~slot->eg_rout) *slot->eg_inc) >> 3;
270 if (slot->eg_rout < 0x00) {
271 slot->eg_rout = 0x00;
272 }
273 }
274
envelope_gen_decay(opl_slot * slot)275 void envelope_gen_decay(opl_slot *slot) {
276 if (slot->eg_rout >= slot->reg_sl << 4) {
277 slot->eg_gen = envelope_gen_num_sustain;
278 envelope_update_rate(slot);
279 return;
280 }
281 slot->eg_rout += slot->eg_inc;
282 }
283
envelope_gen_sustain(opl_slot * slot)284 void envelope_gen_sustain(opl_slot *slot) {
285 if (!slot->reg_type) {
286 envelope_gen_release(slot);
287 }
288 }
289
envelope_gen_release(opl_slot * slot)290 void envelope_gen_release(opl_slot *slot) {
291 if (slot->eg_rout >= 0x1ff) {
292 slot->eg_gen = envelope_gen_num_off;
293 slot->eg_rout = 0x1ff;
294 envelope_update_rate(slot);
295 return;
296 }
297 slot->eg_rout += slot->eg_inc;
298 }
299
envelope_calc(opl_slot * slot)300 void envelope_calc(opl_slot *slot) {
301 Bit8u rate_h, rate_l;
302 rate_h = slot->eg_rate >> 2;
303 rate_l = slot->eg_rate & 3;
304 Bit8u inc = 0;
305 if (eg_incsh[rate_h] > 0) {
306 if ((slot->chip->timer & ((1 << eg_incsh[rate_h]) - 1)) == 0) {
307 inc = eg_incstep[eg_incdesc[rate_h]][rate_l][((slot->chip->timer) >> eg_incsh[rate_h]) & 0x07];
308 }
309 }
310 else {
311 inc = eg_incstep[eg_incdesc[rate_h]][rate_l][slot->chip->timer & 0x07] << (-eg_incsh[rate_h]);
312 }
313 slot->eg_inc = inc;
314 slot->eg_out = slot->eg_rout + (slot->reg_tl << 2) + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem;
315 envelope_gen[slot->eg_gen](slot);
316 }
317
eg_keyon(opl_slot * slot,Bit8u type)318 void eg_keyon(opl_slot *slot, Bit8u type) {
319 if (!slot->key) {
320 slot->eg_gen = envelope_gen_num_attack;
321 envelope_update_rate(slot);
322 if ((slot->eg_rate >> 2) == 0x0f) {
323 slot->eg_gen = envelope_gen_num_decay;
324 envelope_update_rate(slot);
325 slot->eg_rout = 0x00;
326 }
327 slot->pg_phase = 0x00;
328 }
329 slot->key |= type;
330 }
331
eg_keyoff(opl_slot * slot,Bit8u type)332 void eg_keyoff(opl_slot *slot, Bit8u type) {
333 if (slot->key) {
334 slot->key &= (~type);
335 if (!slot->key) {
336 slot->eg_gen = envelope_gen_num_release;
337 envelope_update_rate(slot);
338 }
339 }
340 }
341
342 //
343 // Phase Generator
344 //
345
pg_generate(opl_slot * slot)346 void pg_generate(opl_slot *slot) {
347 Bit16u f_num = slot->channel->f_num;
348 if (slot->reg_vib) {
349 Bit8u f_num_high = f_num >> (7 + vib_table[(slot->chip->timer >> 10) & 0x07] + (0x01 - slot->chip->dvb));
350 f_num += f_num_high * vibsgn_table[(slot->chip->timer >> 10) & 0x07];
351 }
352 slot->pg_phase += (((f_num << slot->channel->block) >> 1) * mt[slot->reg_mult]) >> 1;
353 }
354
355 //
356 // Noise Generator
357 //
358
n_generate(opl_chip * chip)359 void n_generate(opl_chip *chip) {
360 if (chip->noise & 0x01) {
361 chip->noise ^= 0x800302;
362 }
363 chip->noise >>= 1;
364 }
365
366 //
367 // Slot
368 //
369
slot_write20(opl_slot * slot,Bit8u data)370 void slot_write20(opl_slot *slot, Bit8u data) {
371 if ((data >> 7) & 0x01) {
372 slot->trem = &slot->chip->tremval;
373 }
374 else {
375 slot->trem = (Bit8u*)&slot->chip->zeromod;
376 }
377 slot->reg_vib = (data >> 6) & 0x01;
378 slot->reg_type = (data >> 5) & 0x01;
379 slot->reg_ksr = (data >> 4) & 0x01;
380 slot->reg_mult = data & 0x0f;
381 envelope_update_rate(slot);
382 }
383
slot_write40(opl_slot * slot,Bit8u data)384 void slot_write40(opl_slot *slot, Bit8u data) {
385 slot->reg_ksl = (data >> 6) & 0x03;
386 slot->reg_tl = data & 0x3f;
387 envelope_update_ksl(slot);
388 }
389
slot_write60(opl_slot * slot,Bit8u data)390 void slot_write60(opl_slot *slot, Bit8u data) {
391 slot->reg_ar = (data >> 4) & 0x0f;
392 slot->reg_dr = data & 0x0f;
393 envelope_update_rate(slot);
394 }
395
slot_write80(opl_slot * slot,Bit8u data)396 void slot_write80(opl_slot *slot, Bit8u data) {
397 slot->reg_sl = (data >> 4) & 0x0f;
398 if (slot->reg_sl == 0x0f) {
399 slot->reg_sl = 0x1f;
400 }
401 slot->reg_rr = data & 0x0f;
402 envelope_update_rate(slot);
403 }
404
slot_writee0(opl_slot * slot,Bit8u data)405 void slot_writee0(opl_slot *slot, Bit8u data) {
406 slot->reg_wf = data & 0x07;
407 if (slot->chip->newm == 0x00) {
408 slot->reg_wf &= 0x03;
409 }
410 }
411
slot_generatephase(opl_slot * slot,Bit16u phase)412 void slot_generatephase(opl_slot *slot, Bit16u phase) {
413 slot->out = envelope_sin[slot->reg_wf](phase, slot->eg_out);
414 }
415
slot_generate(opl_slot * slot)416 void slot_generate(opl_slot *slot) {
417 slot->out = envelope_sin[slot->reg_wf]((Bit16u)(slot->pg_phase >> 9) + (*slot->mod), slot->eg_out);
418 }
419
slot_generatezm(opl_slot * slot)420 void slot_generatezm(opl_slot *slot) {
421 slot->out = envelope_sin[slot->reg_wf]((Bit16u)(slot->pg_phase >> 9), slot->eg_out);
422 }
423
slot_calcfb(opl_slot * slot)424 void slot_calcfb(opl_slot *slot) {
425 slot->prout[1] = slot->prout[0];
426 slot->prout[0] = slot->out;
427 if (slot->channel->fb != 0x00) {
428 slot->fbmod = (slot->prout[0] + slot->prout[1]) >> (0x09 - slot->channel->fb);
429 }
430 else {
431 slot->fbmod = 0;
432 }
433 }
434
435 //
436 // Channel
437 //
438
439 void chan_setupalg(opl_channel *channel);
440
chan_updaterhythm(opl_chip * chip,Bit8u data)441 void chan_updaterhythm(opl_chip *chip, Bit8u data) {
442 chip->rhy = data & 0x3f;
443 if (chip->rhy & 0x20) {
444 opl_channel *channel6 = &chip->channel[6];
445 opl_channel *channel7 = &chip->channel[7];
446 opl_channel *channel8 = &chip->channel[8];
447 channel6->out[0] = &channel6->slots[1]->out;
448 channel6->out[1] = &channel6->slots[1]->out;
449 channel6->out[2] = &chip->zeromod;
450 channel6->out[3] = &chip->zeromod;
451 channel7->out[0] = &channel7->slots[0]->out;
452 channel7->out[1] = &channel7->slots[0]->out;
453 channel7->out[2] = &channel7->slots[1]->out;
454 channel7->out[3] = &channel7->slots[1]->out;
455 channel8->out[0] = &channel8->slots[0]->out;
456 channel8->out[1] = &channel8->slots[0]->out;
457 channel8->out[2] = &channel8->slots[1]->out;
458 channel8->out[3] = &channel8->slots[1]->out;
459 for (Bit8u chnum = 6; chnum < 9; chnum++) {
460 chip->channel[chnum].chtype = ch_drum;
461 }
462 chan_setupalg(channel6);
463 //hh
464 if (chip->rhy & 0x01) {
465 eg_keyon(channel7->slots[0], egk_drum);
466 }
467 else {
468 eg_keyoff(channel7->slots[0], egk_drum);
469 }
470 //tc
471 if (chip->rhy & 0x02) {
472 eg_keyon(channel8->slots[1], egk_drum);
473 }
474 else {
475 eg_keyoff(channel8->slots[1], egk_drum);
476 }
477 //tom
478 if (chip->rhy & 0x04) {
479 eg_keyon(channel8->slots[0], egk_drum);
480 }
481 else {
482 eg_keyoff(channel8->slots[0], egk_drum);
483 }
484 //sd
485 if (chip->rhy & 0x08) {
486 eg_keyon(channel7->slots[1], egk_drum);
487 }
488 else {
489 eg_keyoff(channel7->slots[1], egk_drum);
490 }
491 //bd
492 if (chip->rhy & 0x10) {
493 eg_keyon(channel6->slots[0], egk_drum);
494 eg_keyon(channel6->slots[1], egk_drum);
495 }
496 else {
497 eg_keyoff(channel6->slots[0], egk_drum);
498 eg_keyoff(channel6->slots[1], egk_drum);
499 }
500 }
501 else {
502 for (Bit8u chnum = 6; chnum < 9; chnum++) {
503 chip->channel[chnum].chtype = ch_2op;
504 chan_setupalg(&chip->channel[chnum]);
505 }
506 }
507 }
508
chan_writea0(opl_channel * channel,Bit8u data)509 void chan_writea0(opl_channel *channel, Bit8u data) {
510 if (channel->chip->newm && channel->chtype == ch_4op2) {
511 return;
512 }
513 channel->f_num = (channel->f_num & 0x300) | data;
514 channel->ksv = (channel->block << 1) | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
515 envelope_update_ksl(channel->slots[0]);
516 envelope_update_ksl(channel->slots[1]);
517 envelope_update_rate(channel->slots[0]);
518 envelope_update_rate(channel->slots[1]);
519 if (channel->chip->newm && channel->chtype == ch_4op) {
520 channel->pair->f_num = channel->f_num;
521 channel->pair->ksv = channel->ksv;
522 envelope_update_ksl(channel->pair->slots[0]);
523 envelope_update_ksl(channel->pair->slots[1]);
524 envelope_update_rate(channel->pair->slots[0]);
525 envelope_update_rate(channel->pair->slots[1]);
526 }
527 }
528
chan_writeb0(opl_channel * channel,Bit8u data)529 void chan_writeb0(opl_channel *channel, Bit8u data) {
530 if (channel->chip->newm && channel->chtype == ch_4op2) {
531 return;
532 }
533 channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8);
534 channel->block = (data >> 2) & 0x07;
535 channel->ksv = (channel->block << 1) | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
536 envelope_update_ksl(channel->slots[0]);
537 envelope_update_ksl(channel->slots[1]);
538 envelope_update_rate(channel->slots[0]);
539 envelope_update_rate(channel->slots[1]);
540 if (channel->chip->newm && channel->chtype == ch_4op) {
541 channel->pair->f_num = channel->f_num;
542 channel->pair->block = channel->block;
543 channel->pair->ksv = channel->ksv;
544 envelope_update_ksl(channel->pair->slots[0]);
545 envelope_update_ksl(channel->pair->slots[1]);
546 envelope_update_rate(channel->pair->slots[0]);
547 envelope_update_rate(channel->pair->slots[1]);
548 }
549 }
550
chan_setupalg(opl_channel * channel)551 void chan_setupalg(opl_channel *channel) {
552 if (channel->chtype == ch_drum) {
553 switch (channel->alg & 0x01) {
554 case 0x00:
555 channel->slots[0]->mod = &channel->slots[0]->fbmod;
556 channel->slots[1]->mod = &channel->slots[0]->out;
557 break;
558 case 0x01:
559 channel->slots[0]->mod = &channel->slots[0]->fbmod;
560 channel->slots[1]->mod = &channel->chip->zeromod;
561 break;
562 }
563 return;
564 }
565 if (channel->alg & 0x08) {
566 return;
567 }
568 if (channel->alg & 0x04) {
569 channel->pair->out[0] = &channel->chip->zeromod;
570 channel->pair->out[1] = &channel->chip->zeromod;
571 channel->pair->out[2] = &channel->chip->zeromod;
572 channel->pair->out[3] = &channel->chip->zeromod;
573 switch (channel->alg & 0x03) {
574 case 0x00:
575 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
576 channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
577 channel->slots[0]->mod = &channel->pair->slots[1]->out;
578 channel->slots[1]->mod = &channel->slots[0]->out;
579 channel->out[0] = &channel->slots[1]->out;
580 channel->out[1] = &channel->chip->zeromod;
581 channel->out[2] = &channel->chip->zeromod;
582 channel->out[3] = &channel->chip->zeromod;
583 break;
584 case 0x01:
585 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
586 channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
587 channel->slots[0]->mod = &channel->chip->zeromod;
588 channel->slots[1]->mod = &channel->slots[0]->out;
589 channel->out[0] = &channel->pair->slots[1]->out;
590 channel->out[1] = &channel->slots[1]->out;
591 channel->out[2] = &channel->chip->zeromod;
592 channel->out[3] = &channel->chip->zeromod;
593 break;
594 case 0x02:
595 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
596 channel->pair->slots[1]->mod = &channel->chip->zeromod;
597 channel->slots[0]->mod = &channel->pair->slots[1]->out;
598 channel->slots[1]->mod = &channel->slots[0]->out;
599 channel->out[0] = &channel->pair->slots[0]->out;
600 channel->out[1] = &channel->slots[1]->out;
601 channel->out[2] = &channel->chip->zeromod;
602 channel->out[3] = &channel->chip->zeromod;
603 break;
604 case 0x03:
605 channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
606 channel->pair->slots[1]->mod = &channel->chip->zeromod;
607 channel->slots[0]->mod = &channel->pair->slots[1]->out;
608 channel->slots[1]->mod = &channel->chip->zeromod;
609 channel->out[0] = &channel->pair->slots[0]->out;
610 channel->out[1] = &channel->slots[0]->out;
611 channel->out[2] = &channel->slots[1]->out;
612 channel->out[3] = &channel->chip->zeromod;
613 break;
614 }
615 }
616 else {
617 switch (channel->alg & 0x01) {
618 case 0x00:
619 channel->slots[0]->mod = &channel->slots[0]->fbmod;
620 channel->slots[1]->mod = &channel->slots[0]->out;
621 channel->out[0] = &channel->slots[1]->out;
622 channel->out[1] = &channel->chip->zeromod;
623 channel->out[2] = &channel->chip->zeromod;
624 channel->out[3] = &channel->chip->zeromod;
625 break;
626 case 0x01:
627 channel->slots[0]->mod = &channel->slots[0]->fbmod;
628 channel->slots[1]->mod = &channel->chip->zeromod;
629 channel->out[0] = &channel->slots[0]->out;
630 channel->out[1] = &channel->slots[1]->out;
631 channel->out[2] = &channel->chip->zeromod;
632 channel->out[3] = &channel->chip->zeromod;
633 break;
634 }
635 }
636 }
637
chan_writec0(opl_channel * channel,Bit8u data)638 void chan_writec0(opl_channel *channel, Bit8u data) {
639 channel->fb = (data & 0x0e) >> 1;
640 channel->con = data & 0x01;
641 channel->alg = channel->con;
642 if (channel->chip->newm) {
643 if (channel->chtype == ch_4op) {
644 channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con);
645 channel->alg = 0x08;
646 chan_setupalg(channel->pair);
647 }
648 else if (channel->chtype == ch_4op2) {
649 channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con);
650 channel->pair->alg = 0x08;
651 chan_setupalg(channel);
652 }
653 else {
654 chan_setupalg(channel);
655 }
656 }
657 else {
658 chan_setupalg(channel);
659 }
660 if (channel->chip->newm) {
661 channel->cha = ((data >> 4) & 0x01) ? ~0 : 0;
662 channel->chb = ((data >> 5) & 0x01) ? ~0 : 0;
663 }
664 else {
665 channel->cha = channel->chb = ~0;
666 }
667 }
668
chan_generaterhythm1(opl_chip * chip)669 void chan_generaterhythm1(opl_chip *chip) {
670 opl_channel *channel6 = &chip->channel[6];
671 opl_channel *channel7 = &chip->channel[7];
672 opl_channel *channel8 = &chip->channel[8];
673 slot_generate(channel6->slots[0]);
674 Bit16u phase14 = (channel7->slots[0]->pg_phase >> 9) & 0x3ff;
675 Bit16u phase17 = (channel8->slots[1]->pg_phase >> 9) & 0x3ff;
676 Bit16u phase = 0x00;
677 //hh tc phase bit
678 Bit16u phasebit = ((phase14 & 0x08) | (((phase14 >> 5) ^ phase14) & 0x04) | (((phase17 >> 2) ^ phase17) & 0x08)) ? 0x01 : 0x00;
679 //hh
680 phase = (phasebit << 9) | (0x34 << ((phasebit ^ (chip->noise & 0x01) << 1)));
681 slot_generatephase(channel7->slots[0], phase);
682 //tt
683 slot_generatezm(channel8->slots[0]);
684 }
685
chan_generaterhythm2(opl_chip * chip)686 void chan_generaterhythm2(opl_chip *chip) {
687 opl_channel *channel6 = &chip->channel[6];
688 opl_channel *channel7 = &chip->channel[7];
689 opl_channel *channel8 = &chip->channel[8];
690 slot_generate(channel6->slots[1]);
691 Bit16u phase14 = (channel7->slots[0]->pg_phase >> 9) & 0x3ff;
692 Bit16u phase17 = (channel8->slots[1]->pg_phase >> 9) & 0x3ff;
693 Bit16u phase = 0x00;
694 //hh tc phase bit
695 Bit16u phasebit = ((phase14 & 0x08) | (((phase14 >> 5) ^ phase14) & 0x04) | (((phase17 >> 2) ^ phase17) & 0x08)) ? 0x01 : 0x00;
696 //sd
697 phase = (0x100 << ((phase14 >> 8) & 0x01)) ^ ((chip->noise & 0x01) << 8);
698 slot_generatephase(channel7->slots[1], phase);
699 //tc
700 phase = 0x100 | (phasebit << 9);
701 slot_generatephase(channel8->slots[1], phase);
702 }
703
chan_enable(opl_channel * channel)704 void chan_enable(opl_channel *channel) {
705 if (channel->chip->newm) {
706 if (channel->chtype == ch_4op) {
707 eg_keyon(channel->slots[0], egk_norm);
708 eg_keyon(channel->slots[1], egk_norm);
709 eg_keyon(channel->pair->slots[0], egk_norm);
710 eg_keyon(channel->pair->slots[1], egk_norm);
711 }
712 else if (channel->chtype == ch_2op || channel->chtype == ch_drum) {
713 eg_keyon(channel->slots[0], egk_norm);
714 eg_keyon(channel->slots[1], egk_norm);
715 }
716 }
717 else {
718 eg_keyon(channel->slots[0], egk_norm);
719 eg_keyon(channel->slots[1], egk_norm);
720 }
721 }
722
chan_disable(opl_channel * channel)723 void chan_disable(opl_channel *channel) {
724 if (channel->chip->newm) {
725 if (channel->chtype == ch_4op) {
726 eg_keyoff(channel->slots[0], egk_norm);
727 eg_keyoff(channel->slots[1], egk_norm);
728 eg_keyoff(channel->pair->slots[0], egk_norm);
729 eg_keyoff(channel->pair->slots[1], egk_norm);
730 }
731 else if (channel->chtype == ch_2op || channel->chtype == ch_drum) {
732 eg_keyoff(channel->slots[0], egk_norm);
733 eg_keyoff(channel->slots[1], egk_norm);
734 }
735 }
736 else {
737 eg_keyoff(channel->slots[0], egk_norm);
738 eg_keyoff(channel->slots[1], egk_norm);
739 }
740 }
741
chan_set4op(opl_chip * chip,Bit8u data)742 void chan_set4op(opl_chip *chip, Bit8u data) {
743 for (Bit8u bit = 0; bit < 6; bit++) {
744 Bit8u chnum = bit;
745 if (bit >= 3) {
746 chnum += 9 - 3;
747 }
748 if ((data >> bit) & 0x01) {
749 chip->channel[chnum].chtype = ch_4op;
750 chip->channel[chnum + 3].chtype = ch_4op2;
751 }
752 else {
753 chip->channel[chnum].chtype = ch_2op;
754 chip->channel[chnum + 3].chtype = ch_2op;
755 }
756 }
757 }
758
limshort(Bit32s a)759 Bit16s limshort(Bit32s a) {
760 if (a > 32767) {
761 a = 32767;
762 }
763 else if (a < -32768) {
764 a = -32768;
765 }
766 return (Bit16s)a;
767 }
768
chip_generate(opl_chip * chip,Bit16s * buff)769 void chip_generate(opl_chip *chip, Bit16s *buff) {
770 buff[1] = limshort(chip->mixbuff[1]);
771
772 for (Bit8u ii = 0; ii < 12; ii++) {
773 slot_calcfb(&chip->slot[ii]);
774 pg_generate(&chip->slot[ii]);
775 envelope_calc(&chip->slot[ii]);
776 slot_generate(&chip->slot[ii]);
777 }
778
779 for (Bit8u ii = 12; ii < 15; ii++) {
780 slot_calcfb(&chip->slot[ii]);
781 pg_generate(&chip->slot[ii]);
782 envelope_calc(&chip->slot[ii]);
783 }
784
785 if (chip->rhy & 0x20) {
786 chan_generaterhythm1(chip);
787 }
788 else {
789 slot_generate(&chip->slot[12]);
790 slot_generate(&chip->slot[13]);
791 slot_generate(&chip->slot[14]);
792 }
793
794 chip->mixbuff[0] = 0;
795 for (Bit8u ii = 0; ii < 18; ii++) {
796 Bit16s accm = 0;
797 for (Bit8u jj = 0; jj < 4; jj++) {
798 accm += *chip->channel[ii].out[jj];
799 }
800 if (chip->FullPan) {
801 chip->mixbuff[0] += (Bit16s)(accm * chip->channel[ii].fcha);
802 }
803 else {
804 chip->mixbuff[0] += (Bit16s)(accm & chip->channel[ii].cha);
805 }
806 }
807
808 for (Bit8u ii = 15; ii < 18; ii++) {
809 slot_calcfb(&chip->slot[ii]);
810 pg_generate(&chip->slot[ii]);
811 envelope_calc(&chip->slot[ii]);
812 }
813
814 if (chip->rhy & 0x20) {
815 chan_generaterhythm2(chip);
816 }
817 else {
818 slot_generate(&chip->slot[15]);
819 slot_generate(&chip->slot[16]);
820 slot_generate(&chip->slot[17]);
821 }
822
823 buff[0] = limshort(chip->mixbuff[0]);
824
825 for (Bit8u ii = 18; ii < 33; ii++) {
826 slot_calcfb(&chip->slot[ii]);
827 pg_generate(&chip->slot[ii]);
828 envelope_calc(&chip->slot[ii]);
829 slot_generate(&chip->slot[ii]);
830 }
831
832 chip->mixbuff[1] = 0;
833 for (Bit8u ii = 0; ii < 18; ii++) {
834 Bit16s accm = 0;
835 for (Bit8u jj = 0; jj < 4; jj++) {
836 accm += *chip->channel[ii].out[jj];
837 }
838 if (chip->FullPan) {
839 chip->mixbuff[1] += (Bit16s)(accm * chip->channel[ii].fchb);
840 }
841 else {
842 chip->mixbuff[1] += (Bit16s)(accm & chip->channel[ii].chb);
843 }
844 }
845
846 for (Bit8u ii = 33; ii < 36; ii++) {
847 slot_calcfb(&chip->slot[ii]);
848 pg_generate(&chip->slot[ii]);
849 envelope_calc(&chip->slot[ii]);
850 slot_generate(&chip->slot[ii]);
851 }
852
853 n_generate(chip);
854
855 if ((chip->timer & 0x3f) == 0x3f) {
856 if (!chip->tremdir) {
857 if (chip->tremtval == 105) {
858 chip->tremtval--;
859 chip->tremdir = 1;
860 }
861 else {
862 chip->tremtval++;
863 }
864 }
865 else {
866 if (chip->tremtval == 0) {
867 chip->tremtval++;
868 chip->tremdir = 0;
869 }
870 else {
871 chip->tremtval--;
872 }
873 }
874 chip->tremval = (chip->tremtval >> 2) >> ((1 - chip->dam) << 1);
875 }
876
877 chip->timer++;
878 }
879
Reset()880 void NukedOPL3::Reset() {
881 memset(&opl3, 0, sizeof(opl_chip));
882 for (Bit8u slotnum = 0; slotnum < 36; slotnum++) {
883 opl3.slot[slotnum].chip = &opl3;
884 opl3.slot[slotnum].mod = &opl3.zeromod;
885 opl3.slot[slotnum].eg_rout = 0x1ff;
886 opl3.slot[slotnum].eg_out = 0x1ff;
887 opl3.slot[slotnum].eg_gen = envelope_gen_num_off;
888 opl3.slot[slotnum].trem = (Bit8u*)&opl3.zeromod;
889 }
890 for (Bit8u channum = 0; channum < 18; channum++) {
891 opl3.channel[channum].slots[0] = &opl3.slot[ch_slot[channum]];
892 opl3.channel[channum].slots[1] = &opl3.slot[ch_slot[channum] + 3];
893 opl3.slot[ch_slot[channum]].channel = &opl3.channel[channum];
894 opl3.slot[ch_slot[channum] + 3].channel = &opl3.channel[channum];
895 if ((channum % 9) < 3) {
896 opl3.channel[channum].pair = &opl3.channel[channum + 3];
897 }
898 else if ((channum % 9) < 6) {
899 opl3.channel[channum].pair = &opl3.channel[channum - 3];
900 }
901 opl3.channel[channum].chip = &opl3;
902 opl3.channel[channum].out[0] = &opl3.zeromod;
903 opl3.channel[channum].out[1] = &opl3.zeromod;
904 opl3.channel[channum].out[2] = &opl3.zeromod;
905 opl3.channel[channum].out[3] = &opl3.zeromod;
906 opl3.channel[channum].chtype = ch_2op;
907 opl3.channel[channum].cha = ~0;
908 opl3.channel[channum].chb = ~0;
909 opl3.channel[channum].fcha = 1.0;
910 opl3.channel[channum].fchb = 1.0;
911 chan_setupalg(&opl3.channel[channum]);
912 }
913 opl3.noise = 0x306600;
914 opl3.timer = 0;
915 opl3.FullPan = FullPan;
916 }
917
WriteReg(int reg,int v)918 void NukedOPL3::WriteReg(int reg, int v) {
919 v &= 0xff;
920 reg &= 0x1ff;
921 Bit8u high = (reg >> 8) & 0x01;
922 Bit8u regm = reg & 0xff;
923 switch (regm & 0xf0) {
924 case 0x00:
925 if (high) {
926 switch (regm & 0x0f) {
927 case 0x04:
928 chan_set4op(&opl3, v);
929 break;
930 case 0x05:
931 opl3.newm = v & 0x01;
932 break;
933 }
934 }
935 else {
936 switch (regm & 0x0f) {
937 case 0x08:
938 opl3.nts = (v >> 6) & 0x01;
939 break;
940 }
941 }
942 break;
943 case 0x20:
944 case 0x30:
945 if (ad_slot[regm & 0x1f] >= 0) {
946 slot_write20(&opl3.slot[18 * high + ad_slot[regm & 0x1f]], v);
947 }
948 break;
949 case 0x40:
950 case 0x50:
951 if (ad_slot[regm & 0x1f] >= 0) {
952 slot_write40(&opl3.slot[18 * high + ad_slot[regm & 0x1f]], v);
953 }
954 break;
955 case 0x60:
956 case 0x70:
957 if (ad_slot[regm & 0x1f] >= 0) {
958 slot_write60(&opl3.slot[18 * high + ad_slot[regm & 0x1f]], v);
959 }
960 break;
961 case 0x80:
962 case 0x90:
963 if (ad_slot[regm & 0x1f] >= 0) {
964 slot_write80(&opl3.slot[18 * high + ad_slot[regm & 0x1f]], v);;
965 }
966 break;
967 case 0xe0:
968 case 0xf0:
969 if (ad_slot[regm & 0x1f] >= 0) {
970 slot_writee0(&opl3.slot[18 * high + ad_slot[regm & 0x1f]], v);
971 }
972 break;
973 case 0xa0:
974 if ((regm & 0x0f) < 9) {
975 chan_writea0(&opl3.channel[9 * high + (regm & 0x0f)], v);
976 }
977 break;
978 case 0xb0:
979 if (regm == 0xbd && !high) {
980 opl3.dam = v >> 7;
981 opl3.dvb = (v >> 6) & 0x01;
982 chan_updaterhythm(&opl3, v);
983 }
984 else if ((regm & 0x0f) < 9) {
985 chan_writeb0(&opl3.channel[9 * high + (regm & 0x0f)], v);
986 if (v & 0x20) {
987 chan_enable(&opl3.channel[9 * high + (regm & 0x0f)]);
988 }
989 else {
990 chan_disable(&opl3.channel[9 * high + (regm & 0x0f)]);
991 }
992 }
993 break;
994 case 0xc0:
995 if ((regm & 0x0f) < 9) {
996 chan_writec0(&opl3.channel[9 * high + (regm & 0x0f)], v);
997 }
998 break;
999 }
1000 }
1001
Update(float * sndptr,int numsamples)1002 void NukedOPL3::Update(float* sndptr, int numsamples) {
1003 Bit16s buffer[2];
1004 for (Bit32u i = 0; i < (Bit32u)numsamples; i++) {
1005 chip_generate(&opl3, buffer);
1006 *sndptr++ += (float)(buffer[0] / 10240.0);
1007 *sndptr++ += (float)(buffer[1] / 10240.0);
1008 }
1009 }
1010
SetPanning(int c,float left,float right)1011 void NukedOPL3::SetPanning(int c, float left, float right) {
1012 if (FullPan) {
1013 opl3.channel[c].fcha = left;
1014 opl3.channel[c].fchb = right;
1015 }
1016 }
1017
NukedOPL3(bool stereo)1018 NukedOPL3::NukedOPL3(bool stereo) {
1019 FullPan = stereo;
1020 Reset();
1021 }
1022
1023 } // namespace NukedOPL3
1024
NukedOPL3Create(bool stereo)1025 OPLEmul *NukedOPL3Create(bool stereo) {
1026 return new NukedOPL3::NukedOPL3(stereo);
1027 }
1028