1 /* SPDX-License-Identifier: MIT
2 *
3 * Permission is hereby granted, free of charge, to any person
4 * obtaining a copy of this software and associated documentation
5 * files (the "Software"), to deal in the Software without
6 * restriction, including without limitation the rights to use, copy,
7 * modify, merge, publish, distribute, sublicense, and/or sell copies
8 * of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be
12 * included in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Copyright:
24 * 2020 Evan Nemerson <evan@nemerson.com>
25 * 2020 Christopher Moore <moore@free.fr>
26 */
27
28 #if !defined(SIMDE_ARM_NEON_CLE_H)
29 #define SIMDE_ARM_NEON_CLE_H
30
31 #include "types.h"
32
33 HEDLEY_DIAGNOSTIC_PUSH
34 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
35 SIMDE_BEGIN_DECLS_
36
37 SIMDE_FUNCTION_ATTRIBUTES
38 simde_uint32x4_t
simde_vcleq_f32(simde_float32x4_t a,simde_float32x4_t b)39 simde_vcleq_f32(simde_float32x4_t a, simde_float32x4_t b) {
40 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
41 return vcleq_f32(a, b);
42 #elif defined(SIMDE_X86_SSE2_NATIVE)
43 return _mm_castps_si128(_mm_cmple_ps(a, b));
44 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
45 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_cmple(a, b));
46 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
47 return wasm_f32x4_le(a, b);
48 #else
49 simde_float32x4_private
50 a_ = simde_float32x4_to_private(a),
51 b_ = simde_float32x4_to_private(b);
52 simde_uint32x4_private r_;
53
54 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
55 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
56 #else
57 SIMDE_VECTORIZE
58 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
59 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT32_MAX : 0;
60 }
61 #endif
62
63 return simde_uint32x4_from_private(r_);
64 #endif
65 }
66 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
67 #undef vcleq_f32
68 #define vcleq_f32(a, b) simde_vcleq_f32((a), (b))
69 #endif
70
71 SIMDE_FUNCTION_ATTRIBUTES
72 simde_uint64x2_t
simde_vcleq_f64(simde_float64x2_t a,simde_float64x2_t b)73 simde_vcleq_f64(simde_float64x2_t a, simde_float64x2_t b) {
74 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
75 return vcleq_f64(a, b);
76 #elif defined(SIMDE_X86_SSE2_NATIVE)
77 return _mm_castpd_si128(_mm_cmple_pd(a, b));
78 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
79 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_cmple(a, b));
80 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
81 return wasm_f64x2_le(a, b);
82 #else
83 simde_float64x2_private
84 a_ = simde_float64x2_to_private(a),
85 b_ = simde_float64x2_to_private(b);
86 simde_uint64x2_private r_;
87
88 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
89 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
90 #else
91 SIMDE_VECTORIZE
92 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
93 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT64_MAX : 0;
94 }
95 #endif
96
97 return simde_uint64x2_from_private(r_);
98 #endif
99 }
100 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
101 #undef vcleq_f64
102 #define vcleq_f64(a, b) simde_vcleq_f64((a), (b))
103 #endif
104
105 SIMDE_FUNCTION_ATTRIBUTES
106 simde_uint8x16_t
simde_vcleq_s8(simde_int8x16_t a,simde_int8x16_t b)107 simde_vcleq_s8(simde_int8x16_t a, simde_int8x16_t b) {
108 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
109 return vcleq_s8(a, b);
110 #elif defined(SIMDE_X86_SSE2_NATIVE)
111 return _mm_or_si128(_mm_cmpgt_epi8(b, a), _mm_cmpeq_epi8(a, b));
112 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
113 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_cmple(a, b));
114 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
115 return wasm_i8x16_le(a, b);
116 #else
117 simde_int8x16_private
118 a_ = simde_int8x16_to_private(a),
119 b_ = simde_int8x16_to_private(b);
120 simde_uint8x16_private r_;
121
122 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
123 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
124 #else
125 SIMDE_VECTORIZE
126 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
127 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT8_MAX : 0;
128 }
129 #endif
130
131 return simde_uint8x16_from_private(r_);
132 #endif
133 }
134 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
135 #undef vcleq_s8
136 #define vcleq_s8(a, b) simde_vcleq_s8((a), (b))
137 #endif
138
139 SIMDE_FUNCTION_ATTRIBUTES
140 simde_uint16x8_t
simde_vcleq_s16(simde_int16x8_t a,simde_int16x8_t b)141 simde_vcleq_s16(simde_int16x8_t a, simde_int16x8_t b) {
142 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
143 return vcleq_s16(a, b);
144 #elif defined(SIMDE_X86_SSE2_NATIVE)
145 return _mm_or_si128(_mm_cmpgt_epi16(b, a), _mm_cmpeq_epi16(a, b));
146 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
147 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), vec_cmple(a, b));
148 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
149 return wasm_i16x8_le(a, b);
150 #else
151 simde_int16x8_private
152 a_ = simde_int16x8_to_private(a),
153 b_ = simde_int16x8_to_private(b);
154 simde_uint16x8_private r_;
155
156 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
157 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
158 #else
159 SIMDE_VECTORIZE
160 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
161 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT16_MAX : 0;
162 }
163 #endif
164
165 return simde_uint16x8_from_private(r_);
166 #endif
167 }
168 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
169 #undef vcleq_s16
170 #define vcleq_s16(a, b) simde_vcleq_s16((a), (b))
171 #endif
172
173 SIMDE_FUNCTION_ATTRIBUTES
174 simde_uint32x4_t
simde_vcleq_s32(simde_int32x4_t a,simde_int32x4_t b)175 simde_vcleq_s32(simde_int32x4_t a, simde_int32x4_t b) {
176 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
177 return vcleq_s32(a, b);
178 #elif defined(SIMDE_X86_SSE2_NATIVE)
179 return _mm_or_si128(_mm_cmpgt_epi32(b, a), _mm_cmpeq_epi32(a, b));
180 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
181 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_cmple(a, b));
182 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
183 return wasm_i32x4_le(a, b);
184 #else
185 simde_int32x4_private
186 a_ = simde_int32x4_to_private(a),
187 b_ = simde_int32x4_to_private(b);
188 simde_uint32x4_private r_;
189
190 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
191 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
192 #else
193 SIMDE_VECTORIZE
194 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
195 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT32_MAX : 0;
196 }
197 #endif
198
199 return simde_uint32x4_from_private(r_);
200 #endif
201 }
202 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
203 #undef vcleq_s32
204 #define vcleq_s32(a, b) simde_vcleq_s32((a), (b))
205 #endif
206
207 SIMDE_FUNCTION_ATTRIBUTES
208 simde_uint64x2_t
simde_vcleq_s64(simde_int64x2_t a,simde_int64x2_t b)209 simde_vcleq_s64(simde_int64x2_t a, simde_int64x2_t b) {
210 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
211 return vcleq_s64(a, b);
212 #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
213 return vreinterpretq_u64_s32(vmvnq_s32(vreinterpretq_s32_s64(vshrq_n_s64(vqsubq_s64(b, a), 63))));
214 #elif defined(SIMDE_X86_SSE4_2_NATIVE)
215 return _mm_or_si128(_mm_cmpgt_epi64(b, a), _mm_cmpeq_epi64(a, b));
216 #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
217 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_cmple(a, b));
218 #else
219 simde_int64x2_private
220 a_ = simde_int64x2_to_private(a),
221 b_ = simde_int64x2_to_private(b);
222 simde_uint64x2_private r_;
223
224 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
225 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
226 #else
227 SIMDE_VECTORIZE
228 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
229 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT64_MAX : 0;
230 }
231 #endif
232
233 return simde_uint64x2_from_private(r_);
234 #endif
235 }
236 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
237 #undef vcleq_s64
238 #define vcleq_s64(a, b) simde_vcleq_s64((a), (b))
239 #endif
240
241 SIMDE_FUNCTION_ATTRIBUTES
242 simde_uint8x16_t
simde_vcleq_u8(simde_uint8x16_t a,simde_uint8x16_t b)243 simde_vcleq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
244 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
245 return vcleq_u8(a, b);
246 #elif defined(SIMDE_X86_SSE2_NATIVE)
247 __m128i sign_bits = _mm_set1_epi8(INT8_MIN);
248 return _mm_or_si128(_mm_cmpgt_epi8(_mm_xor_si128(b, sign_bits), _mm_xor_si128(a, sign_bits)), _mm_cmpeq_epi8(a, b));
249 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
250 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned char), vec_cmple(a, b));
251 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
252 return wasm_u8x16_le(a, b);
253 #else
254 simde_uint8x16_private
255 r_,
256 a_ = simde_uint8x16_to_private(a),
257 b_ = simde_uint8x16_to_private(b);
258
259 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
260 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
261 #else
262 SIMDE_VECTORIZE
263 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
264 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT8_MAX : 0;
265 }
266 #endif
267
268 return simde_uint8x16_from_private(r_);
269 #endif
270 }
271 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
272 #undef vcleq_u8
273 #define vcleq_u8(a, b) simde_vcleq_u8((a), (b))
274 #endif
275
276 SIMDE_FUNCTION_ATTRIBUTES
277 simde_uint16x8_t
simde_vcleq_u16(simde_uint16x8_t a,simde_uint16x8_t b)278 simde_vcleq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
279 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
280 return vcleq_u16(a, b);
281 #elif defined(SIMDE_X86_SSE2_NATIVE)
282 __m128i sign_bits = _mm_set1_epi16(INT16_MIN);
283 return _mm_or_si128(_mm_cmpgt_epi16(_mm_xor_si128(b, sign_bits), _mm_xor_si128(a, sign_bits)), _mm_cmpeq_epi16(a, b));
284 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
285 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned short), vec_cmple(a, b));
286 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
287 return wasm_u16x8_le(a, b);
288 #else
289 simde_uint16x8_private
290 r_,
291 a_ = simde_uint16x8_to_private(a),
292 b_ = simde_uint16x8_to_private(b);
293
294 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
295 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
296 #else
297 SIMDE_VECTORIZE
298 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
299 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT16_MAX : 0;
300 }
301 #endif
302
303 return simde_uint16x8_from_private(r_);
304 #endif
305 }
306 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
307 #undef vcleq_u16
308 #define vcleq_u16(a, b) simde_vcleq_u16((a), (b))
309 #endif
310
311 SIMDE_FUNCTION_ATTRIBUTES
312 simde_uint32x4_t
simde_vcleq_u32(simde_uint32x4_t a,simde_uint32x4_t b)313 simde_vcleq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
314 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
315 return vcleq_u32(a, b);
316 #elif defined(SIMDE_X86_SSE2_NATIVE)
317 __m128i sign_bits = _mm_set1_epi32(INT32_MIN);
318 return _mm_or_si128(_mm_cmpgt_epi32(_mm_xor_si128(b, sign_bits), _mm_xor_si128(a, sign_bits)), _mm_cmpeq_epi32(a, b));
319 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
320 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned int), vec_cmple(a, b));
321 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
322 return wasm_u32x4_le(a, b);
323 #else
324 simde_uint32x4_private
325 r_,
326 a_ = simde_uint32x4_to_private(a),
327 b_ = simde_uint32x4_to_private(b);
328
329 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
330 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
331 #else
332 SIMDE_VECTORIZE
333 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
334 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT32_MAX : 0;
335 }
336 #endif
337
338 return simde_uint32x4_from_private(r_);
339 #endif
340 }
341 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
342 #undef vcleq_u32
343 #define vcleq_u32(a, b) simde_vcleq_u32((a), (b))
344 #endif
345
346 SIMDE_FUNCTION_ATTRIBUTES
347 simde_uint64x2_t
simde_vcleq_u64(simde_uint64x2_t a,simde_uint64x2_t b)348 simde_vcleq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
349 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
350 return vcleq_u64(a, b);
351 #elif defined(SIMDE_X86_SSE4_2_NATIVE)
352 __m128i sign_bits = _mm_set1_epi64x(INT64_MIN);
353 return _mm_or_si128(_mm_cmpgt_epi64(_mm_xor_si128(b, sign_bits), _mm_xor_si128(a, sign_bits)), _mm_cmpeq_epi64(a, b));
354 #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
355 return HEDLEY_REINTERPRET_CAST(SIMDE_POWER_ALTIVEC_VECTOR(unsigned long long), vec_cmple(a, b));
356 #else
357 simde_uint64x2_private
358 r_,
359 a_ = simde_uint64x2_to_private(a),
360 b_ = simde_uint64x2_to_private(b);
361
362 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
363 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
364 #else
365 SIMDE_VECTORIZE
366 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
367 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT64_MAX : 0;
368 }
369 #endif
370
371 return simde_uint64x2_from_private(r_);
372 #endif
373 }
374 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
375 #undef vcleq_u64
376 #define vcleq_u64(a, b) simde_vcleq_u64((a), (b))
377 #endif
378
379 SIMDE_FUNCTION_ATTRIBUTES
380 simde_uint32x2_t
simde_vcle_f32(simde_float32x2_t a,simde_float32x2_t b)381 simde_vcle_f32(simde_float32x2_t a, simde_float32x2_t b) {
382 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
383 return vcle_f32(a, b);
384 #else
385 simde_float32x2_private
386 a_ = simde_float32x2_to_private(a),
387 b_ = simde_float32x2_to_private(b);
388 simde_uint32x2_private r_;
389
390 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
391 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
392 #else
393 SIMDE_VECTORIZE
394 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
395 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT32_MAX : 0;
396 }
397 #endif
398
399 return simde_uint32x2_from_private(r_);
400 #endif
401 }
402 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
403 #undef vcle_f32
404 #define vcle_f32(a, b) simde_vcle_f32((a), (b))
405 #endif
406
407 SIMDE_FUNCTION_ATTRIBUTES
408 simde_uint64x1_t
simde_vcle_f64(simde_float64x1_t a,simde_float64x1_t b)409 simde_vcle_f64(simde_float64x1_t a, simde_float64x1_t b) {
410 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
411 return vcle_f64(a, b);
412 #else
413 simde_float64x1_private
414 a_ = simde_float64x1_to_private(a),
415 b_ = simde_float64x1_to_private(b);
416 simde_uint64x1_private r_;
417
418 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
419 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
420 #else
421 SIMDE_VECTORIZE
422 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
423 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT64_MAX : 0;
424 }
425 #endif
426
427 return simde_uint64x1_from_private(r_);
428 #endif
429 }
430 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
431 #undef vcle_f64
432 #define vcle_f64(a, b) simde_vcle_f64((a), (b))
433 #endif
434
435 SIMDE_FUNCTION_ATTRIBUTES
436 simde_uint8x8_t
simde_vcle_s8(simde_int8x8_t a,simde_int8x8_t b)437 simde_vcle_s8(simde_int8x8_t a, simde_int8x8_t b) {
438 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
439 return vcle_s8(a, b);
440 #elif defined(SIMDE_X86_MMX_NATIVE)
441 return _mm_or_si64(_mm_cmpgt_pi8(b, a), _mm_cmpeq_pi8(a, b));
442 #else
443 simde_int8x8_private
444 a_ = simde_int8x8_to_private(a),
445 b_ = simde_int8x8_to_private(b);
446 simde_uint8x8_private r_;
447
448 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
449 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
450 #else
451 SIMDE_VECTORIZE
452 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
453 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT8_MAX : 0;
454 }
455 #endif
456
457 return simde_uint8x8_from_private(r_);
458 #endif
459 }
460 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
461 #undef vcle_s8
462 #define vcle_s8(a, b) simde_vcle_s8((a), (b))
463 #endif
464
465 SIMDE_FUNCTION_ATTRIBUTES
466 simde_uint16x4_t
simde_vcle_s16(simde_int16x4_t a,simde_int16x4_t b)467 simde_vcle_s16(simde_int16x4_t a, simde_int16x4_t b) {
468 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
469 return vcle_s16(a, b);
470 #elif defined(SIMDE_X86_MMX_NATIVE)
471 return _mm_or_si64(_mm_cmpgt_pi16(b, a), _mm_cmpeq_pi16(a, b));
472 #else
473 simde_int16x4_private
474 a_ = simde_int16x4_to_private(a),
475 b_ = simde_int16x4_to_private(b);
476 simde_uint16x4_private r_;
477
478 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
479 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
480 #else
481 SIMDE_VECTORIZE
482 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
483 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT16_MAX : 0;
484 }
485 #endif
486
487 return simde_uint16x4_from_private(r_);
488 #endif
489 }
490 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
491 #undef vcle_s16
492 #define vcle_s16(a, b) simde_vcle_s16((a), (b))
493 #endif
494
495 SIMDE_FUNCTION_ATTRIBUTES
496 simde_uint32x2_t
simde_vcle_s32(simde_int32x2_t a,simde_int32x2_t b)497 simde_vcle_s32(simde_int32x2_t a, simde_int32x2_t b) {
498 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
499 return vcle_s32(a, b);
500 #elif defined(SIMDE_X86_MMX_NATIVE)
501 return _mm_or_si64(_mm_cmpgt_pi32(b, a), _mm_cmpeq_pi32(a, b));
502 #else
503 simde_int32x2_private
504 a_ = simde_int32x2_to_private(a),
505 b_ = simde_int32x2_to_private(b);
506 simde_uint32x2_private r_;
507
508 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
509 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
510 #else
511 SIMDE_VECTORIZE
512 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
513 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT32_MAX : 0;
514 }
515 #endif
516
517 return simde_uint32x2_from_private(r_);
518 #endif
519 }
520 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
521 #undef vcle_s32
522 #define vcle_s32(a, b) simde_vcle_s32((a), (b))
523 #endif
524
525 SIMDE_FUNCTION_ATTRIBUTES
526 simde_uint64x1_t
simde_vcle_s64(simde_int64x1_t a,simde_int64x1_t b)527 simde_vcle_s64(simde_int64x1_t a, simde_int64x1_t b) {
528 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
529 return vcle_s64(a, b);
530 #else
531 simde_int64x1_private
532 a_ = simde_int64x1_to_private(a),
533 b_ = simde_int64x1_to_private(b);
534 simde_uint64x1_private r_;
535
536 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
537 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
538 #else
539 SIMDE_VECTORIZE
540 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
541 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT64_MAX : 0;
542 }
543 #endif
544
545 return simde_uint64x1_from_private(r_);
546 #endif
547 }
548 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
549 #undef vcle_s64
550 #define vcle_s64(a, b) simde_vcle_s64((a), (b))
551 #endif
552
553 SIMDE_FUNCTION_ATTRIBUTES
554 simde_uint8x8_t
simde_vcle_u8(simde_uint8x8_t a,simde_uint8x8_t b)555 simde_vcle_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
556 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
557 return vcle_u8(a, b);
558 #elif defined(SIMDE_X86_MMX_NATIVE)
559 __m64 sign_bits = _mm_set1_pi8(INT8_MIN);
560 return _mm_or_si64(_mm_cmpgt_pi8(_mm_xor_si64(b, sign_bits), _mm_xor_si64(a, sign_bits)), _mm_cmpeq_pi8(a, b));
561 #else
562 simde_uint8x8_private
563 r_,
564 a_ = simde_uint8x8_to_private(a),
565 b_ = simde_uint8x8_to_private(b);
566
567 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
568 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
569 #else
570 SIMDE_VECTORIZE
571 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
572 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT8_MAX : 0;
573 }
574 #endif
575
576 return simde_uint8x8_from_private(r_);
577 #endif
578 }
579 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
580 #undef vcle_u8
581 #define vcle_u8(a, b) simde_vcle_u8((a), (b))
582 #endif
583
584 SIMDE_FUNCTION_ATTRIBUTES
585 simde_uint16x4_t
simde_vcle_u16(simde_uint16x4_t a,simde_uint16x4_t b)586 simde_vcle_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
587 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
588 return vcle_u16(a, b);
589 #elif defined(SIMDE_X86_MMX_NATIVE)
590 __m64 sign_bits = _mm_set1_pi16(INT16_MIN);
591 return _mm_or_si64(_mm_cmpgt_pi16(_mm_xor_si64(b, sign_bits), _mm_xor_si64(a, sign_bits)), _mm_cmpeq_pi16(a, b));
592 #else
593 simde_uint16x4_private
594 r_,
595 a_ = simde_uint16x4_to_private(a),
596 b_ = simde_uint16x4_to_private(b);
597
598 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
599 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
600 #else
601 SIMDE_VECTORIZE
602 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
603 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT16_MAX : 0;
604 }
605 #endif
606
607 return simde_uint16x4_from_private(r_);
608 #endif
609 }
610 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
611 #undef vcle_u16
612 #define vcle_u16(a, b) simde_vcle_u16((a), (b))
613 #endif
614
615 SIMDE_FUNCTION_ATTRIBUTES
616 simde_uint32x2_t
simde_vcle_u32(simde_uint32x2_t a,simde_uint32x2_t b)617 simde_vcle_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
618 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
619 return vcle_u32(a, b);
620 #elif defined(SIMDE_X86_MMX_NATIVE)
621 __m64 sign_bits = _mm_set1_pi32(INT32_MIN);
622 return _mm_or_si64(_mm_cmpgt_pi32(_mm_xor_si64(b, sign_bits), _mm_xor_si64(a, sign_bits)), _mm_cmpeq_pi32(a, b));
623 #else
624 simde_uint32x2_private
625 r_,
626 a_ = simde_uint32x2_to_private(a),
627 b_ = simde_uint32x2_to_private(b);
628
629 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
630 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
631 #else
632 SIMDE_VECTORIZE
633 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
634 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT32_MAX : 0;
635 }
636 #endif
637
638 return simde_uint32x2_from_private(r_);
639 #endif
640 }
641 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
642 #undef vcle_u32
643 #define vcle_u32(a, b) simde_vcle_u32((a), (b))
644 #endif
645
646 SIMDE_FUNCTION_ATTRIBUTES
647 simde_uint64x1_t
simde_vcle_u64(simde_uint64x1_t a,simde_uint64x1_t b)648 simde_vcle_u64(simde_uint64x1_t a, simde_uint64x1_t b) {
649 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
650 return vcle_u64(a, b);
651 #else
652 simde_uint64x1_private
653 r_,
654 a_ = simde_uint64x1_to_private(a),
655 b_ = simde_uint64x1_to_private(b);
656
657 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
658 r_.values = HEDLEY_REINTERPRET_CAST(__typeof__(r_.values), a_.values <= b_.values);
659 #else
660 SIMDE_VECTORIZE
661 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
662 r_.values[i] = (a_.values[i] <= b_.values[i]) ? UINT64_MAX : 0;
663 }
664 #endif
665
666 return simde_uint64x1_from_private(r_);
667 #endif
668 }
669 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
670 #undef vcle_u64
671 #define vcle_u64(a, b) simde_vcle_u64((a), (b))
672 #endif
673
674 SIMDE_END_DECLS_
675 HEDLEY_DIAGNOSTIC_POP
676
677 #endif /* !defined(SIMDE_ARM_NEON_CLE_H) */
678