1 /* SPDX-License-Identifier: MIT
2 *
3 * Permission is hereby granted, free of charge, to any person
4 * obtaining a copy of this software and associated documentation
5 * files (the "Software"), to deal in the Software without
6 * restriction, including without limitation the rights to use, copy,
7 * modify, merge, publish, distribute, sublicense, and/or sell copies
8 * of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be
12 * included in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Copyright:
24 * 2020 Evan Nemerson <evan@nemerson.com>
25 */
26
27 #if !defined(SIMDE_ARM_NEON_ADD_H)
28 #define SIMDE_ARM_NEON_ADD_H
29
30 #include "types.h"
31
32 HEDLEY_DIAGNOSTIC_PUSH
33 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
34 SIMDE_BEGIN_DECLS_
35
36 SIMDE_FUNCTION_ATTRIBUTES
37 simde_float32x2_t
simde_vsub_f32(simde_float32x2_t a,simde_float32x2_t b)38 simde_vsub_f32(simde_float32x2_t a, simde_float32x2_t b) {
39 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
40 return vsub_f32(a, b);
41 #else
42 simde_float32x2_private
43 r_,
44 a_ = simde_float32x2_to_private(a),
45 b_ = simde_float32x2_to_private(b);
46
47 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
48 r_.values = a_.values - b_.values;
49 #else
50 SIMDE_VECTORIZE
51 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
52 r_.values[i] = a_.values[i] - b_.values[i];
53 }
54 #endif
55
56 return simde_float32x2_from_private(r_);
57 #endif
58 }
59 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
60 #undef vsub_f32
61 #define vsub_f32(a, b) simde_vsub_f32((a), (b))
62 #endif
63
64 SIMDE_FUNCTION_ATTRIBUTES
65 simde_float64x1_t
simde_vsub_f64(simde_float64x1_t a,simde_float64x1_t b)66 simde_vsub_f64(simde_float64x1_t a, simde_float64x1_t b) {
67 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
68 return vsub_f64(a, b);
69 #else
70 simde_float64x1_private
71 r_,
72 a_ = simde_float64x1_to_private(a),
73 b_ = simde_float64x1_to_private(b);
74
75 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
76 r_.values = a_.values - b_.values;
77 #else
78 SIMDE_VECTORIZE
79 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
80 r_.values[i] = a_.values[i] - b_.values[i];
81 }
82 #endif
83
84 return simde_float64x1_from_private(r_);
85 #endif
86 }
87 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
88 #undef vsub_f64
89 #define vsub_f64(a, b) simde_vsub_f64((a), (b))
90 #endif
91
92 SIMDE_FUNCTION_ATTRIBUTES
93 simde_int8x8_t
simde_vsub_s8(simde_int8x8_t a,simde_int8x8_t b)94 simde_vsub_s8(simde_int8x8_t a, simde_int8x8_t b) {
95 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
96 return vsub_s8(a, b);
97 #elif defined(SIMDE_X86_MMX_NATIVE)
98 return _mm_sub_pi8(a, b);
99 #else
100 simde_int8x8_private
101 r_,
102 a_ = simde_int8x8_to_private(a),
103 b_ = simde_int8x8_to_private(b);
104
105 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
106 r_.values = a_.values - b_.values;
107 #else
108 SIMDE_VECTORIZE
109 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
110 r_.values[i] = a_.values[i] - b_.values[i];
111 }
112 #endif
113
114 return simde_int8x8_from_private(r_);
115 #endif
116 }
117 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
118 #undef vsub_s8
119 #define vsub_s8(a, b) simde_vsub_s8((a), (b))
120 #endif
121
122 SIMDE_FUNCTION_ATTRIBUTES
123 simde_int16x4_t
simde_vsub_s16(simde_int16x4_t a,simde_int16x4_t b)124 simde_vsub_s16(simde_int16x4_t a, simde_int16x4_t b) {
125 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
126 return vsub_s16(a, b);
127 #elif defined(SIMDE_X86_MMX_NATIVE)
128 return _mm_sub_pi16(a, b);
129 #else
130 simde_int16x4_private
131 r_,
132 a_ = simde_int16x4_to_private(a),
133 b_ = simde_int16x4_to_private(b);
134
135 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
136 r_.values = a_.values - b_.values;
137 #else
138 SIMDE_VECTORIZE
139 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
140 r_.values[i] = a_.values[i] - b_.values[i];
141 }
142 #endif
143
144 return simde_int16x4_from_private(r_);
145 #endif
146 }
147 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
148 #undef vsub_s16
149 #define vsub_s16(a, b) simde_vsub_s16((a), (b))
150 #endif
151
152 SIMDE_FUNCTION_ATTRIBUTES
153 simde_int32x2_t
simde_vsub_s32(simde_int32x2_t a,simde_int32x2_t b)154 simde_vsub_s32(simde_int32x2_t a, simde_int32x2_t b) {
155 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
156 return vsub_s32(a, b);
157 #elif defined(SIMDE_X86_MMX_NATIVE)
158 return _mm_sub_pi32(a, b);
159 #else
160 simde_int32x2_private
161 r_,
162 a_ = simde_int32x2_to_private(a),
163 b_ = simde_int32x2_to_private(b);
164
165 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
166 r_.values = a_.values - b_.values;
167 #else
168 SIMDE_VECTORIZE
169 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
170 r_.values[i] = a_.values[i] - b_.values[i];
171 }
172 #endif
173
174 return simde_int32x2_from_private(r_);
175 #endif
176 }
177 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
178 #undef vsub_s32
179 #define vsub_s32(a, b) simde_vsub_s32((a), (b))
180 #endif
181
182 SIMDE_FUNCTION_ATTRIBUTES
183 simde_int64x1_t
simde_vsub_s64(simde_int64x1_t a,simde_int64x1_t b)184 simde_vsub_s64(simde_int64x1_t a, simde_int64x1_t b) {
185 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
186 return vsub_s64(a, b);
187 #else
188 simde_int64x1_private
189 r_,
190 a_ = simde_int64x1_to_private(a),
191 b_ = simde_int64x1_to_private(b);
192
193 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
194 r_.values = a_.values - b_.values;
195 #else
196 SIMDE_VECTORIZE
197 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
198 r_.values[i] = a_.values[i] - b_.values[i];
199 }
200 #endif
201
202 return simde_int64x1_from_private(r_);
203 #endif
204 }
205 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
206 #undef vsub_s64
207 #define vsub_s64(a, b) simde_vsub_s64((a), (b))
208 #endif
209
210 SIMDE_FUNCTION_ATTRIBUTES
211 simde_uint8x8_t
simde_vsub_u8(simde_uint8x8_t a,simde_uint8x8_t b)212 simde_vsub_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
213 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
214 return vsub_u8(a, b);
215 #elif defined(SIMDE_X86_MMX_NATIVE)
216 return _mm_sub_pi8(a, b);
217 #else
218 simde_uint8x8_private
219 r_,
220 a_ = simde_uint8x8_to_private(a),
221 b_ = simde_uint8x8_to_private(b);
222
223 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
224 r_.values = a_.values - b_.values;
225 #else
226 SIMDE_VECTORIZE
227 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
228 r_.values[i] = a_.values[i] - b_.values[i];
229 }
230 #endif
231
232 return simde_uint8x8_from_private(r_);
233 #endif
234 }
235 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
236 #undef vsub_u8
237 #define vsub_u8(a, b) simde_vsub_u8((a), (b))
238 #endif
239
240 SIMDE_FUNCTION_ATTRIBUTES
241 simde_uint16x4_t
simde_vsub_u16(simde_uint16x4_t a,simde_uint16x4_t b)242 simde_vsub_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
243 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
244 return vsub_u16(a, b);
245 #elif defined(SIMDE_X86_MMX_NATIVE)
246 return _mm_sub_pi16(a, b);
247 #else
248 simde_uint16x4_private
249 r_,
250 a_ = simde_uint16x4_to_private(a),
251 b_ = simde_uint16x4_to_private(b);
252
253 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
254 r_.values = a_.values - b_.values;
255 #else
256 SIMDE_VECTORIZE
257 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
258 r_.values[i] = a_.values[i] - b_.values[i];
259 }
260 #endif
261
262 return simde_uint16x4_from_private(r_);
263 #endif
264 }
265 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
266 #undef vsub_u16
267 #define vsub_u16(a, b) simde_vsub_u16((a), (b))
268 #endif
269
270 SIMDE_FUNCTION_ATTRIBUTES
271 simde_uint32x2_t
simde_vsub_u32(simde_uint32x2_t a,simde_uint32x2_t b)272 simde_vsub_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
273 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
274 return vsub_u32(a, b);
275 #elif defined(SIMDE_X86_MMX_NATIVE)
276 return _mm_sub_pi32(a, b);
277 #else
278 simde_uint32x2_private
279 r_,
280 a_ = simde_uint32x2_to_private(a),
281 b_ = simde_uint32x2_to_private(b);
282
283 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
284 r_.values = a_.values - b_.values;
285 #else
286 SIMDE_VECTORIZE
287 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
288 r_.values[i] = a_.values[i] - b_.values[i];
289 }
290 #endif
291
292 return simde_uint32x2_from_private(r_);
293 #endif
294 }
295 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
296 #undef vsub_u32
297 #define vsub_u32(a, b) simde_vsub_u32((a), (b))
298 #endif
299
300 SIMDE_FUNCTION_ATTRIBUTES
301 simde_uint64x1_t
simde_vsub_u64(simde_uint64x1_t a,simde_uint64x1_t b)302 simde_vsub_u64(simde_uint64x1_t a, simde_uint64x1_t b) {
303 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
304 return vsub_u64(a, b);
305 #else
306 simde_uint64x1_private
307 r_,
308 a_ = simde_uint64x1_to_private(a),
309 b_ = simde_uint64x1_to_private(b);
310
311 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
312 r_.values = a_.values - b_.values;
313 #else
314 SIMDE_VECTORIZE
315 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
316 r_.values[i] = a_.values[i] - b_.values[i];
317 }
318 #endif
319
320 return simde_uint64x1_from_private(r_);
321 #endif
322 }
323 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
324 #undef vsub_u64
325 #define vsub_u64(a, b) simde_vsub_u64((a), (b))
326 #endif
327
328 SIMDE_FUNCTION_ATTRIBUTES
329 simde_float32x4_t
simde_vsubq_f32(simde_float32x4_t a,simde_float32x4_t b)330 simde_vsubq_f32(simde_float32x4_t a, simde_float32x4_t b) {
331 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
332 return vsubq_f32(a, b);
333 #elif defined(SIMDE_X86_SSE_NATIVE)
334 return _mm_sub_ps(a, b);
335 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
336 SIMDE_POWER_ALTIVEC_VECTOR(float) a_ , b_, r_;
337 a_ = a;
338 b_ = b;
339 r_ = vec_sub(a_, b_);
340 return r_;
341 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
342 return wasm_f32x4_sub(a, b);
343 #else
344 simde_float32x4_private
345 r_,
346 a_ = simde_float32x4_to_private(a),
347 b_ = simde_float32x4_to_private(b);
348
349 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
350 r_.values = a_.values - b_.values;
351 #else
352 SIMDE_VECTORIZE
353 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
354 r_.values[i] = a_.values[i] - b_.values[i];
355 }
356 #endif
357
358 return simde_float32x4_from_private(r_);
359 #endif
360 }
361 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
362 #undef vsub_f32
363 #define vsub_f32(a, b) simde_vsub_f32((a), (b))
364 #endif
365
366 SIMDE_FUNCTION_ATTRIBUTES
367 simde_float64x2_t
simde_vsubq_f64(simde_float64x2_t a,simde_float64x2_t b)368 simde_vsubq_f64(simde_float64x2_t a, simde_float64x2_t b) {
369 #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
370 return vsubq_f64(a, b);
371 #elif defined(SIMDE_X86_SSE2_NATIVE)
372 return _mm_sub_pd(a, b);
373 #elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
374 return vec_sub(a, b);
375 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
376 return wasm_f64x2_sub(a, b);
377 #else
378 simde_float64x2_private
379 r_,
380 a_ = simde_float64x2_to_private(a),
381 b_ = simde_float64x2_to_private(b);
382
383 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
384 r_.values = a_.values - b_.values;
385 #else
386 SIMDE_VECTORIZE
387 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
388 r_.values[i] = a_.values[i] - b_.values[i];
389 }
390 #endif
391
392 return simde_float64x2_from_private(r_);
393 #endif
394 }
395 #if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
396 #undef vsub_f64
397 #define vsub_f64(a, b) simde_vsub_f64((a), (b))
398 #endif
399
400 SIMDE_FUNCTION_ATTRIBUTES
401 simde_int8x16_t
simde_vsubq_s8(simde_int8x16_t a,simde_int8x16_t b)402 simde_vsubq_s8(simde_int8x16_t a, simde_int8x16_t b) {
403 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
404 return vsubq_s8(a, b);
405 #elif defined(SIMDE_X86_SSE2_NATIVE)
406 return _mm_sub_epi8(a, b);
407 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
408 return vec_sub(a, b);
409 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
410 return wasm_i8x16_sub(a, b);
411 #else
412 simde_int8x16_private
413 r_,
414 a_ = simde_int8x16_to_private(a),
415 b_ = simde_int8x16_to_private(b);
416
417 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
418 r_.values = a_.values - b_.values;
419 #else
420 SIMDE_VECTORIZE
421 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
422 r_.values[i] = a_.values[i] - b_.values[i];
423 }
424 #endif
425
426 return simde_int8x16_from_private(r_);
427 #endif
428 }
429 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
430 #undef vsub_s8
431 #define vsub_s8(a, b) simde_vsub_s8((a), (b))
432 #endif
433
434 SIMDE_FUNCTION_ATTRIBUTES
435 simde_int16x8_t
simde_vsubq_s16(simde_int16x8_t a,simde_int16x8_t b)436 simde_vsubq_s16(simde_int16x8_t a, simde_int16x8_t b) {
437 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
438 return vsubq_s16(a, b);
439 #elif defined(SIMDE_X86_SSE2_NATIVE)
440 return _mm_sub_epi16(a, b);
441 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
442 return vec_sub(a, b);
443 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
444 return wasm_i16x8_sub(a, b);
445 #else
446 simde_int16x8_private
447 r_,
448 a_ = simde_int16x8_to_private(a),
449 b_ = simde_int16x8_to_private(b);
450
451 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
452 r_.values = a_.values - b_.values;
453 #else
454 SIMDE_VECTORIZE
455 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
456 r_.values[i] = a_.values[i] - b_.values[i];
457 }
458 #endif
459
460 return simde_int16x8_from_private(r_);
461 #endif
462 }
463 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
464 #undef vsub_s16
465 #define vsub_s16(a, b) simde_vsub_s16((a), (b))
466 #endif
467
468 SIMDE_FUNCTION_ATTRIBUTES
469 simde_int32x4_t
simde_vsubq_s32(simde_int32x4_t a,simde_int32x4_t b)470 simde_vsubq_s32(simde_int32x4_t a, simde_int32x4_t b) {
471 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
472 return vsubq_s32(a, b);
473 #elif defined(SIMDE_X86_SSE2_NATIVE)
474 return _mm_sub_epi32(a, b);
475 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
476 return vec_sub(a, b);
477 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
478 return wasm_i32x4_sub(a, b);
479 #else
480 simde_int32x4_private
481 r_,
482 a_ = simde_int32x4_to_private(a),
483 b_ = simde_int32x4_to_private(b);
484
485 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
486 r_.values = a_.values - b_.values;
487 #else
488 SIMDE_VECTORIZE
489 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
490 r_.values[i] = a_.values[i] - b_.values[i];
491 }
492 #endif
493
494 return simde_int32x4_from_private(r_);
495 #endif
496 }
497 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
498 #undef vsub_s32
499 #define vsub_s32(a, b) simde_vsub_s32((a), (b))
500 #endif
501
502 SIMDE_FUNCTION_ATTRIBUTES
503 simde_int64x2_t
simde_vsubq_s64(simde_int64x2_t a,simde_int64x2_t b)504 simde_vsubq_s64(simde_int64x2_t a, simde_int64x2_t b) {
505 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
506 return vsubq_s64(a, b);
507 #elif defined(SIMDE_X86_SSE2_NATIVE)
508 return _mm_sub_epi64(a, b);
509 #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
510 return vec_sub(a, b);
511 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
512 return wasm_i64x2_sub(a, b);
513 #else
514 simde_int64x2_private
515 r_,
516 a_ = simde_int64x2_to_private(a),
517 b_ = simde_int64x2_to_private(b);
518
519 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
520 r_.values = a_.values - b_.values;
521 #else
522 SIMDE_VECTORIZE
523 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
524 r_.values[i] = a_.values[i] - b_.values[i];
525 }
526 #endif
527
528 return simde_int64x2_from_private(r_);
529 #endif
530 }
531 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
532 #undef vsub_s64
533 #define vsub_s64(a, b) simde_vsub_s64((a), (b))
534 #endif
535
536 SIMDE_FUNCTION_ATTRIBUTES
537 simde_uint8x16_t
simde_vsubq_u8(simde_uint8x16_t a,simde_uint8x16_t b)538 simde_vsubq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
539 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
540 return vsubq_u8(a, b);
541 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
542 return vec_sub(a, b);
543 #else
544 simde_uint8x16_private
545 r_,
546 a_ = simde_uint8x16_to_private(a),
547 b_ = simde_uint8x16_to_private(b);
548
549 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
550 r_.values = a_.values - b_.values;
551 #else
552 SIMDE_VECTORIZE
553 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
554 r_.values[i] = a_.values[i] - b_.values[i];
555 }
556 #endif
557
558 return simde_uint8x16_from_private(r_);
559 #endif
560 }
561 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
562 #undef vsub_u8
563 #define vsub_u8(a, b) simde_vsub_u8((a), (b))
564 #endif
565
566 SIMDE_FUNCTION_ATTRIBUTES
567 simde_uint16x8_t
simde_vsubq_u16(simde_uint16x8_t a,simde_uint16x8_t b)568 simde_vsubq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
569 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
570 return vsubq_u16(a, b);
571 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
572 return vec_sub(a, b);
573 #else
574 simde_uint16x8_private
575 r_,
576 a_ = simde_uint16x8_to_private(a),
577 b_ = simde_uint16x8_to_private(b);
578
579 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
580 r_.values = a_.values - b_.values;
581 #else
582 SIMDE_VECTORIZE
583 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
584 r_.values[i] = a_.values[i] - b_.values[i];
585 }
586 #endif
587
588 return simde_uint16x8_from_private(r_);
589 #endif
590 }
591 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
592 #undef vsub_u16
593 #define vsub_u16(a, b) simde_vsub_u16((a), (b))
594 #endif
595
596 SIMDE_FUNCTION_ATTRIBUTES
597 simde_uint32x4_t
simde_vsubq_u32(simde_uint32x4_t a,simde_uint32x4_t b)598 simde_vsubq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
599 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
600 return vsubq_u32(a, b);
601 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
602 return vec_sub(a, b);
603 #else
604 simde_uint32x4_private
605 r_,
606 a_ = simde_uint32x4_to_private(a),
607 b_ = simde_uint32x4_to_private(b);
608
609 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
610 r_.values = a_.values - b_.values;
611 #else
612 SIMDE_VECTORIZE
613 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
614 r_.values[i] = a_.values[i] - b_.values[i];
615 }
616 #endif
617
618 return simde_uint32x4_from_private(r_);
619 #endif
620 }
621 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
622 #undef vsub_u32
623 #define vsub_u32(a, b) simde_vsub_u32((a), (b))
624 #endif
625
626 SIMDE_FUNCTION_ATTRIBUTES
627 simde_uint64x2_t
simde_vsubq_u64(simde_uint64x2_t a,simde_uint64x2_t b)628 simde_vsubq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
629 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
630 return vsubq_u64(a, b);
631 #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
632 return vec_sub(a, b);
633 #else
634 simde_uint64x2_private
635 r_,
636 a_ = simde_uint64x2_to_private(a),
637 b_ = simde_uint64x2_to_private(b);
638
639 #if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
640 r_.values = a_.values - b_.values;
641 #else
642 SIMDE_VECTORIZE
643 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
644 r_.values[i] = a_.values[i] - b_.values[i];
645 }
646 #endif
647
648 return simde_uint64x2_from_private(r_);
649 #endif
650 }
651 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
652 #undef vsub_u64
653 #define vsub_u64(a, b) simde_vsub_u64((a), (b))
654 #endif
655
656 SIMDE_END_DECLS_
657 HEDLEY_DIAGNOSTIC_POP
658
659 #endif /* !defined(SIMDE_ARM_NEON_SUB_H) */
660