1 /* SPDX-License-Identifier: MIT
2  *
3  * Permission is hereby granted, free of charge, to any person
4  * obtaining a copy of this software and associated documentation
5  * files (the "Software"), to deal in the Software without
6  * restriction, including without limitation the rights to use, copy,
7  * modify, merge, publish, distribute, sublicense, and/or sell copies
8  * of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be
12  * included in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Copyright:
24  *   2020      Evan Nemerson <evan@nemerson.com>
25  *   2020      Hidayat Khan <huk2209@gmail.com>
26  *   2020      Christopher Moore <moore@free.fr>
27  */
28 
29 #if !defined(SIMDE_X86_AVX512_SLLI_H)
30 #define SIMDE_X86_AVX512_SLLI_H
31 
32 #include "types.h"
33 #include "../avx2.h"
34 #include "mov.h"
35 #include "setzero.h"
36 
37 HEDLEY_DIAGNOSTIC_PUSH
38 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
39 SIMDE_BEGIN_DECLS_
40 
41 SIMDE_FUNCTION_ATTRIBUTES
42 simde__m512i
simde_mm512_slli_epi16(simde__m512i a,const unsigned int imm8)43 simde_mm512_slli_epi16 (simde__m512i a, const unsigned int imm8)
44     SIMDE_REQUIRE_RANGE(imm8, 0, 255) {
45   #if defined(SIMDE_X86_AVX512BW_NATIVE) && (defined(HEDLEY_GCC_VERSION) && ((__GNUC__ == 5 && __GNUC_MINOR__ == 5) || (__GNUC__ == 6 && __GNUC_MINOR__ >= 4)))
46     simde__m512i r;
47 
48     SIMDE_CONSTIFY_16_(_mm512_slli_epi16, r, simde_mm512_setzero_si512(), imm8, a);
49 
50     return r;
51   #elif defined(SIMDE_X86_AVX512BW_NATIVE)
52     return SIMDE_BUG_IGNORE_SIGN_CONVERSION(_mm512_slli_epi16(a, imm8));
53   #else
54     simde__m512i_private
55       r_,
56       a_ = simde__m512i_to_private(a);
57 
58     #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
59       if(imm8 < 16)
60         r_.i16 = HEDLEY_STATIC_CAST(__typeof__(r_.i16), (a_.i16 << HEDLEY_STATIC_CAST(int16_t, imm8)));
61       else
62         return simde_mm512_setzero_si512();
63     #else
64       SIMDE_VECTORIZE
65       for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
66         r_.i16[i] = (imm8 < 16) ? HEDLEY_STATIC_CAST(int16_t, a_.i16[i] << (imm8 & 0xff)) : 0;
67       }
68     #endif
69 
70     return simde__m512i_from_private(r_);
71   #endif
72 }
73 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
74   #undef _mm512_slli_epi16
75   #define _mm512_slli_epi16(a, imm8) simde_mm512_slli_epi16(a, imm8)
76 #endif
77 
78 SIMDE_FUNCTION_ATTRIBUTES
79 simde__m512i
simde_mm512_slli_epi32(simde__m512i a,unsigned int imm8)80 simde_mm512_slli_epi32 (simde__m512i a, unsigned int imm8) {
81   /* I guess the restriction was added in 6.4, back-ported to 5.5, then
82    * removed (fixed) in 7? */
83   #if defined(SIMDE_X86_AVX512F_NATIVE) && (defined(HEDLEY_GCC_VERSION) && ((__GNUC__ == 5 && __GNUC_MINOR__ == 5) || (__GNUC__ == 6 && __GNUC_MINOR__ >= 4)))
84     simde__m512i r;
85 
86     SIMDE_CONSTIFY_32_(_mm512_slli_epi32, r, simde_mm512_setzero_si512(), imm8, a);
87 
88     return r;
89   #elif defined(SIMDE_X86_AVX512F_NATIVE)
90     return SIMDE_BUG_IGNORE_SIGN_CONVERSION(_mm512_slli_epi32(a, imm8));
91   #else
92     simde__m512i_private
93       r_,
94       a_ = simde__m512i_to_private(a);
95 
96     /* The Intel Intrinsics Guide says that only the 8 LSBits of imm8 are
97     * used.  In this case we should do "imm8 &= 0xff".  However in
98     * practice all bits are used. */
99     if (imm8 > 31) {
100       simde_memset(&r_, 0, sizeof(r_));
101     } else {
102       #if defined(SIMDE_X86_AVX2_NATIVE)
103         r_.m256i[0] = simde_mm256_slli_epi32(a_.m256i[0], HEDLEY_STATIC_CAST(int, imm8));
104         r_.m256i[1] = simde_mm256_slli_epi32(a_.m256i[1], HEDLEY_STATIC_CAST(int, imm8));
105       #elif defined(SIMDE_X86_SSE2_NATIVE)
106         r_.m128i[0] = simde_mm_slli_epi32(a_.m128i[0], HEDLEY_STATIC_CAST(int, imm8));
107         r_.m128i[1] = simde_mm_slli_epi32(a_.m128i[1], HEDLEY_STATIC_CAST(int, imm8));
108         r_.m128i[2] = simde_mm_slli_epi32(a_.m128i[2], HEDLEY_STATIC_CAST(int, imm8));
109         r_.m128i[3] = simde_mm_slli_epi32(a_.m128i[3], HEDLEY_STATIC_CAST(int, imm8));
110       #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
111         r_.u32 = a_.u32 << imm8;
112       #else
113         SIMDE_VECTORIZE
114         for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
115           r_.u32[i] = a_.u32[i] << imm8;
116         }
117       #endif
118     }
119 
120     return simde__m512i_from_private(r_);
121   #endif
122 }
123 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
124   #undef _mm512_slli_epi32
125   #define _mm512_slli_epi32(a, imm8) simde_mm512_slli_epi32(a, imm8)
126 #endif
127 
128 SIMDE_FUNCTION_ATTRIBUTES
129 simde__m512i
simde_mm512_slli_epi64(simde__m512i a,unsigned int imm8)130 simde_mm512_slli_epi64 (simde__m512i a, unsigned int imm8) {
131   #if defined(SIMDE_X86_AVX512F_NATIVE) && (defined(HEDLEY_GCC_VERSION) && ((__GNUC__ == 5 && __GNUC_MINOR__ == 5) || (__GNUC__ == 6 && __GNUC_MINOR__ >= 4)))
132     simde__m512i r;
133 
134     SIMDE_CONSTIFY_64_(_mm512_slli_epi64, r, simde_mm512_setzero_si512(), imm8, a);
135 
136     return r;
137   #elif defined(SIMDE_X86_AVX512F_NATIVE)
138     return SIMDE_BUG_IGNORE_SIGN_CONVERSION(_mm512_slli_epi64(a, imm8));
139   #else
140     simde__m512i_private
141       r_,
142       a_ = simde__m512i_to_private(a);
143 
144     /* The Intel Intrinsics Guide says that only the 8 LSBits of imm8 are
145     * used.  In this case we should do "imm8 &= 0xff".  However in
146     * practice all bits are used. */
147     if (imm8 > 63) {
148       simde_memset(&r_, 0, sizeof(r_));
149     } else {
150       #if defined(SIMDE_X86_AVX2_NATIVE)
151         r_.m256i[0] = simde_mm256_slli_epi64(a_.m256i[0], HEDLEY_STATIC_CAST(int, imm8));
152         r_.m256i[1] = simde_mm256_slli_epi64(a_.m256i[1], HEDLEY_STATIC_CAST(int, imm8));
153       #elif defined(SIMDE_X86_SSE2_NATIVE)
154         r_.m128i[0] = simde_mm_slli_epi64(a_.m128i[0], HEDLEY_STATIC_CAST(int, imm8));
155         r_.m128i[1] = simde_mm_slli_epi64(a_.m128i[1], HEDLEY_STATIC_CAST(int, imm8));
156         r_.m128i[2] = simde_mm_slli_epi64(a_.m128i[2], HEDLEY_STATIC_CAST(int, imm8));
157         r_.m128i[3] = simde_mm_slli_epi64(a_.m128i[3], HEDLEY_STATIC_CAST(int, imm8));
158       #elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
159         r_.u64 = a_.u64 << imm8;
160       #else
161         SIMDE_VECTORIZE
162         for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
163           r_.u64[i] = a_.u64[i] << imm8;
164         }
165       #endif
166     }
167 
168     return simde__m512i_from_private(r_);
169   #endif
170 }
171 #if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
172   #undef _mm512_slli_epi64
173   #define _mm512_slli_epi64(a, imm8) simde_mm512_slli_epi64(a, imm8)
174 #endif
175 
176 SIMDE_END_DECLS_
177 HEDLEY_DIAGNOSTIC_POP
178 
179 #endif /* !defined(SIMDE_X86_AVX512_SLLI_H) */
180