1
2-- Copyright (C) 1996 Morgan Kaufmann Publishers, Inc
3
4-- This file is part of VESTs (Vhdl tESTs).
5
6-- VESTs is free software; you can redistribute it and/or modify it
7-- under the terms of the GNU General Public License as published by the
8-- Free Software Foundation; either version 2 of the License, or (at
9-- your option) any later version.
10
11-- VESTs is distributed in the hope that it will be useful, but WITHOUT
12-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13-- FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14-- for more details.
15
16-- You should have received a copy of the GNU General Public License
17-- along with VESTs; if not, write to the Free Software Foundation,
18-- Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19
20-- ---------------------------------------------------------------------
21--
22-- $Id: ch_04_ch_04_01.vhd,v 1.2 2001-10-26 16:29:33 paw Exp $
23-- $Revision: 1.2 $
24--
25-- ---------------------------------------------------------------------
26
27entity ch_04_01 is
28
29end entity ch_04_01;
30
31
32----------------------------------------------------------------
33
34
35architecture test of ch_04_01 is
36begin
37
38
39  block_04_1_a : block is
40
41                         -- code from book:
42
43                         type word is array (0 to 31) of bit;
44
45                       --
46
47                       type controller_state is (initial, idle, active, error);
48
49                       type state_counts is array (idle to error) of natural;
50
51                       -- end of code from book
52
53  begin
54  end block block_04_1_a;
55
56
57  process_04_1_a : process is
58
59                             -- code from book:
60
61                             type word is array (31 downto 0) of bit;
62
63                           --
64
65                           type controller_state is (initial, idle, active, error);
66
67                           --
68
69                           type state_counts is
70                             array (controller_state range idle to error) of natural;
71
72                           --
73
74                           subtype coeff_ram_address is integer range 0 to 63;
75                           type coeff_array is array (coeff_ram_address) of real;
76
77                           --
78
79                           variable buffer_register, data_register : word;
80                           variable counters : state_counts;
81                           variable coeff : coeff_array;
82
83                           -- end of code from book
84
85  begin
86
87    -- code from book:
88
89    coeff(0) := 0.0;
90
91    counters(active) := counters(active) + 1;
92
93    data_register := buffer_register;
94
95    -- end of code from book
96
97    wait;
98  end process process_04_1_a;
99
100
101end architecture test;
102