1 2-- Copyright (C) 2001 Bill Billowitch. 3 4-- Some of the work to develop this test suite was done with Air Force 5-- support. The Air Force and Bill Billowitch assume no 6-- responsibilities for this software. 7 8-- This file is part of VESTs (Vhdl tESTs). 9 10-- VESTs is free software; you can redistribute it and/or modify it 11-- under the terms of the GNU General Public License as published by the 12-- Free Software Foundation; either version 2 of the License, or (at 13-- your option) any later version. 14 15-- VESTs is distributed in the hope that it will be useful, but WITHOUT 16-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 17-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 18-- for more details. 19 20-- You should have received a copy of the GNU General Public License 21-- along with VESTs; if not, write to the Free Software Foundation, 22-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 24-- --------------------------------------------------------------------- 25-- 26-- $Id: tc1208.vhd,v 1.2 2001-10-26 16:29:39 paw Exp $ 27-- $Revision: 1.2 $ 28-- 29-- --------------------------------------------------------------------- 30 31ENTITY c08s01b00x00p24n01i01208ent IS 32END c08s01b00x00p24n01i01208ent; 33 34ARCHITECTURE c08s01b00x00p24n01i01208arch OF c08s01b00x00p24n01i01208ent IS 35 type WOR is array (0 to 3) of BIT; 36 signal TS : WOR := "0000"; 37BEGIN 38 TESTING: PROCESS 39 BEGIN 40 TS <= "0101" after 20 ns; 41 wait on TS until (TS(1) = '1'); 42 assert NOT( TS(1) = '1' ) 43 report "***PASSED TEST: c08s01b00x00p24n01i01208" 44 severity NOTE; 45 assert ( TS(1) = '1' ) 46 report "***FAILED TEST: c08s01b00x00p24n01i01208 - Composite signal in teh sensitivity list of the wait statement is equivalent to having each subelement of that composite signal in the list." 47 severity ERROR; 48 wait; 49 END PROCESS TESTING; 50 51END c08s01b00x00p24n01i01208arch; 52