1 /*********************************************************************/ 2 /* */ 3 /* Optimized BLAS libraries */ 4 /* By Kazushige Goto <kgoto@tacc.utexas.edu> */ 5 /* */ 6 /* Copyright (c) The University of Texas, 2009. All rights reserved. */ 7 /* UNIVERSITY EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES CONCERNING */ 8 /* THIS SOFTWARE AND DOCUMENTATION, INCLUDING ANY WARRANTIES OF */ 9 /* MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, */ 10 /* NON-INFRINGEMENT AND WARRANTIES OF PERFORMANCE, AND ANY WARRANTY */ 11 /* THAT MIGHT OTHERWISE ARISE FROM COURSE OF DEALING OR USAGE OF */ 12 /* TRADE. NO WARRANTY IS EITHER EXPRESS OR IMPLIED WITH RESPECT TO */ 13 /* THE USE OF THE SOFTWARE OR DOCUMENTATION. */ 14 /* Under no circumstances shall University be liable for incidental, */ 15 /* special, indirect, direct or consequential damages or loss of */ 16 /* profits, interruption of business, or related expenses which may */ 17 /* arise from use of Software or Documentation, including but not */ 18 /* limited to those resulting from defects in Software and/or */ 19 /* Documentation, or loss or inaccuracy of data of any kind. */ 20 /*********************************************************************/ 21 22 #ifndef CPUID_H 23 #define CPUID_H 24 25 #define VENDOR_INTEL 1 26 #define VENDOR_UMC 2 27 #define VENDOR_AMD 3 28 #define VENDOR_CYRIX 4 29 #define VENDOR_NEXGEN 5 30 #define VENDOR_CENTAUR 6 31 #define VENDOR_RISE 7 32 #define VENDOR_SIS 8 33 #define VENDOR_TRANSMETA 9 34 #define VENDOR_NSC 10 35 #define VENDOR_UNKNOWN 99 36 37 #define BITMASK(a, b, c) ((((a) >> (b)) & (c))) 38 39 #define FAMILY_80486 4 40 #define FAMILY_P5 5 41 #define FAMILY_P6 6 42 #define FAMILY_PM 7 43 #define FAMILY_IA64 8 44 45 #if defined(__i386__) || defined(__x86_64__) 46 #define GET_EXFAMILY 1 47 #define GET_EXMODEL 2 48 #define GET_TYPE 3 49 #define GET_FAMILY 4 50 #define GET_MODEL 5 51 #define GET_APICID 6 52 #define GET_LCOUNT 7 53 #define GET_CHUNKS 8 54 #define GET_STEPPING 9 55 #define GET_BLANDID 10 56 #define GET_FEATURE 11 57 #define GET_NUMSHARE 12 58 #define GET_NUMCORES 13 59 #endif 60 61 #ifdef __ia64__ 62 #define GET_ARCHREV 1 63 #define GET_FAMILY 2 64 #define GET_MODEL 3 65 #define GET_REVISION 4 66 #define GET_NUMBER 5 67 #endif 68 69 #define CORE_UNKNOWN 0 70 #define CORE_80486 1 71 #define CORE_P5 2 72 #define CORE_P6 3 73 #define CORE_KATMAI 4 74 #define CORE_COPPERMINE 5 75 #define CORE_NORTHWOOD 6 76 #define CORE_PRESCOTT 7 77 #define CORE_BANIAS 8 78 #define CORE_ATHLON 9 79 #define CORE_OPTERON 10 80 #define CORE_BARCELONA 11 81 #define CORE_VIAC3 12 82 #define CORE_YONAH 13 83 #define CORE_CORE2 14 84 #define CORE_PENRYN 15 85 #define CORE_DUNNINGTON 16 86 #define CORE_NEHALEM 17 87 #define CORE_ATOM 18 88 #define CORE_NANO 19 89 90 #define HAVE_SSE (1 << 0) 91 #define HAVE_SSE2 (1 << 1) 92 #define HAVE_SSE3 (1 << 2) 93 #define HAVE_SSSE3 (1 << 3) 94 #define HAVE_SSE4_1 (1 << 4) 95 #define HAVE_SSE4_2 (1 << 5) 96 #define HAVE_SSE4A (1 << 6) 97 #define HAVE_SSE5 (1 << 7) 98 #define HAVE_MMX (1 << 8) 99 #define HAVE_3DNOW (1 << 9) 100 #define HAVE_3DNOWEX (1 << 10) 101 #define HAVE_CMOV (1 << 11) 102 #define HAVE_PSE (1 << 12) 103 #define HAVE_CFLUSH (1 << 13) 104 #define HAVE_HIT (1 << 14) 105 #define HAVE_MISALIGNSSE (1 << 15) 106 #define HAVE_128BITFPU (1 << 16) 107 #define HAVE_FASTMOVU (1 << 17) 108 109 #define CACHE_INFO_L1_I 1 110 #define CACHE_INFO_L1_D 2 111 #define CACHE_INFO_L2 3 112 #define CACHE_INFO_L3 4 113 #define CACHE_INFO_L1_ITB 5 114 #define CACHE_INFO_L1_DTB 6 115 #define CACHE_INFO_L1_LITB 7 116 #define CACHE_INFO_L1_LDTB 8 117 #define CACHE_INFO_L2_ITB 9 118 #define CACHE_INFO_L2_DTB 10 119 #define CACHE_INFO_L2_LITB 11 120 #define CACHE_INFO_L2_LDTB 12 121 122 typedef struct { 123 int size; 124 int associative; 125 int linesize; 126 int shared; 127 } cache_info_t; 128 129 #define CPUTYPE_UNKNOWN 0 130 #define CPUTYPE_INTEL_UNKNOWN 1 131 #define CPUTYPE_UMC_UNKNOWN 2 132 #define CPUTYPE_AMD_UNKNOWN 3 133 #define CPUTYPE_CYRIX_UNKNOWN 4 134 #define CPUTYPE_NEXGEN_UNKNOWN 5 135 #define CPUTYPE_CENTAUR_UNKNOWN 6 136 #define CPUTYPE_RISE_UNKNOWN 7 137 #define CPUTYPE_SIS_UNKNOWN 8 138 #define CPUTYPE_TRANSMETA_UNKNOWN 9 139 #define CPUTYPE_NSC_UNKNOWN 10 140 141 #define CPUTYPE_80386 11 142 #define CPUTYPE_80486 12 143 #define CPUTYPE_PENTIUM 13 144 #define CPUTYPE_PENTIUM2 14 145 #define CPUTYPE_PENTIUM3 15 146 #define CPUTYPE_PENTIUMM 16 147 #define CPUTYPE_PENTIUM4 17 148 #define CPUTYPE_CORE2 18 149 #define CPUTYPE_PENRYN 19 150 #define CPUTYPE_DUNNINGTON 20 151 #define CPUTYPE_NEHALEM 21 152 #define CPUTYPE_ATOM 22 153 #define CPUTYPE_ITANIUM 23 154 #define CPUTYPE_ITANIUM2 24 155 #define CPUTYPE_AMD5X86 25 156 #define CPUTYPE_AMDK6 26 157 #define CPUTYPE_ATHLON 27 158 #define CPUTYPE_DURON 28 159 #define CPUTYPE_OPTERON 29 160 #define CPUTYPE_BARCELONA 30 161 #define CPUTYPE_SHANGHAI 31 162 #define CPUTYPE_ISTANBUL 32 163 #define CPUTYPE_CYRIX5X86 33 164 #define CPUTYPE_CYRIXM1 34 165 #define CPUTYPE_CYRIXM2 35 166 #define CPUTYPE_NEXGENNX586 36 167 #define CPUTYPE_CENTAURC6 37 168 #define CPUTYPE_RISEMP6 38 169 #define CPUTYPE_SYS55X 39 170 #define CPUTYPE_CRUSOETM3X 40 171 #define CPUTYPE_NSGEODE 41 172 #define CPUTYPE_VIAC3 42 173 #define CPUTYPE_NANO 43 174 #endif 175