1 #include "max2871_regs.h"
2 #include <stdint.h>
3 
4 static uint32_t registers[6];
5 
max2871_regs_init(void)6 void max2871_regs_init(void)
7 {
8     registers[0] = 0x007D0000;
9     registers[1] = 0x2000FFF9;
10     registers[2] = 0x00004042;
11     registers[3] = 0x0000000B;
12     registers[4] = 0x6180B23C;
13     registers[5] = 0x00400005;
14 }
15 
max2871_get_register(int reg)16 uint32_t max2871_get_register(int reg)
17 {
18     return registers[reg];
19 }
20 
max2871_set_INT(uint32_t v)21 void max2871_set_INT(uint32_t v)
22 {
23     registers[0] &= ~(0x1 << 31);
24     registers[0] |= v << 31;
25 }
26 
max2871_set_N(uint32_t v)27 void max2871_set_N(uint32_t v)
28 {
29     registers[0] &= ~(0xFFFF << 15);
30     registers[0] |= v << 15;
31 }
32 
max2871_set_FRAC(uint32_t v)33 void max2871_set_FRAC(uint32_t v)
34 {
35     registers[0] &= ~(0xFFF << 3);
36     registers[0] |= v << 3;
37 }
38 
max2871_set_CPL(uint32_t v)39 void max2871_set_CPL(uint32_t v)
40 {
41     registers[1] &= ~(0x3 << 29);
42     registers[1] |= v << 29;
43 }
44 
max2871_set_CPT(uint32_t v)45 void max2871_set_CPT(uint32_t v)
46 {
47     registers[1] &= ~(0x3 << 27);
48     registers[1] |= v << 27;
49 }
50 
max2871_set_P(uint32_t v)51 void max2871_set_P(uint32_t v)
52 {
53     registers[1] &= ~(0xFFF << 15);
54     registers[1] |= v << 15;
55 }
56 
max2871_set_M(uint32_t v)57 void max2871_set_M(uint32_t v)
58 {
59     registers[1] &= ~(0xFFF << 3);
60     registers[1] |= v << 3;
61 }
62 
max2871_set_LDS(uint32_t v)63 void max2871_set_LDS(uint32_t v)
64 {
65     registers[2] &= ~(0x1 << 31);
66     registers[2] |= v << 31;
67 }
68 
max2871_set_SDN(uint32_t v)69 void max2871_set_SDN(uint32_t v)
70 {
71     registers[2] &= ~(0x3 << 29);
72     registers[2] |= v << 29;
73 }
74 
max2871_set_MUX(uint32_t v)75 void max2871_set_MUX(uint32_t v)
76 {
77     registers[2] &= ~(0x7 << 26);
78     registers[5] &= ~(0x1 << 18);
79     registers[2] |= (v & 0x7) << 26;
80     registers[5] |= ((v & 0x8) >> 3) << 18;
81 }
82 
max2871_set_DBR(uint32_t v)83 void max2871_set_DBR(uint32_t v)
84 {
85     registers[2] &= ~(0x1 << 25);
86     registers[2] |= v << 25;
87 }
88 
max2871_set_RDIV2(uint32_t v)89 void max2871_set_RDIV2(uint32_t v)
90 {
91     registers[2] &= ~(0x1 << 24);
92     registers[2] |= v << 24;
93 }
94 
max2871_set_R(uint32_t v)95 void max2871_set_R(uint32_t v)
96 {
97     registers[2] &= ~(0x3FF << 14);
98     registers[2] |= v << 14;
99 }
100 
max2871_set_REG4DB(uint32_t v)101 void max2871_set_REG4DB(uint32_t v)
102 {
103     registers[2] &= ~(0x1 << 13);
104     registers[2] |= v << 13;
105 }
106 
max2871_set_CP(uint32_t v)107 void max2871_set_CP(uint32_t v)
108 {
109     registers[2] &= ~(0xF << 9);
110     registers[2] |= v << 9;
111 }
112 
max2871_set_LDF(uint32_t v)113 void max2871_set_LDF(uint32_t v)
114 {
115     registers[2] &= ~(0x1 << 8);
116     registers[2] |= v << 8;
117 }
118 
max2871_set_LDP(uint32_t v)119 void max2871_set_LDP(uint32_t v)
120 {
121     registers[2] &= ~(0x1 << 7);
122     registers[2] |= v << 7;
123 }
124 
max2871_set_PDP(uint32_t v)125 void max2871_set_PDP(uint32_t v)
126 {
127     registers[2] &= ~(0x1 << 6);
128     registers[2] |= v << 6;
129 }
130 
max2871_set_SHDN(uint32_t v)131 void max2871_set_SHDN(uint32_t v)
132 {
133     registers[2] &= ~(0x1 << 5);
134     registers[2] |= v << 5;
135 }
136 
max2871_set_TRI(uint32_t v)137 void max2871_set_TRI(uint32_t v)
138 {
139     registers[2] &= ~(0x1 << 4);
140     registers[2] |= v << 4;
141 }
142 
max2871_set_RST(uint32_t v)143 void max2871_set_RST(uint32_t v)
144 {
145     registers[2] &= ~(0x1 << 3);
146     registers[2] |= v << 3;
147 }
148 
max2871_set_VCO(uint32_t v)149 void max2871_set_VCO(uint32_t v)
150 {
151     registers[3] &= ~(0x3F << 26);
152     registers[3] |= v << 26;
153 }
154 
max2871_set_VAS_SHDN(uint32_t v)155 void max2871_set_VAS_SHDN(uint32_t v)
156 {
157     registers[3] &= ~(0x1 << 25);
158     registers[3] |= v << 25;
159 }
160 
max2871_set_VAS_TEMP(uint32_t v)161 void max2871_set_VAS_TEMP(uint32_t v)
162 {
163     registers[3] &= ~(0x1 << 24);
164     registers[3] |= v << 24;
165 }
166 
max2871_set_CSM(uint32_t v)167 void max2871_set_CSM(uint32_t v)
168 {
169     registers[3] &= ~(0x1 << 18);
170     registers[3] |= v << 18;
171 }
172 
max2871_set_MUTEDEL(uint32_t v)173 void max2871_set_MUTEDEL(uint32_t v)
174 {
175     registers[3] &= ~(0x1 << 17);
176     registers[3] |= v << 17;
177 }
178 
max2871_set_CDM(uint32_t v)179 void max2871_set_CDM(uint32_t v)
180 {
181     registers[3] &= ~(0x3 << 15);
182     registers[3] |= v << 15;
183 }
184 
max2871_set_CDIV(uint32_t v)185 void max2871_set_CDIV(uint32_t v)
186 {
187     registers[3] &= ~(0xFFF << 3);
188     registers[3] |= v << 3;
189 }
190 
max2871_set_SDLDO(uint32_t v)191 void max2871_set_SDLDO(uint32_t v)
192 {
193     registers[4] &= ~(0x1 << 28);
194     registers[4] |= v << 28;
195 }
196 
max2871_set_SDDIV(uint32_t v)197 void max2871_set_SDDIV(uint32_t v)
198 {
199     registers[4] &= ~(0x1 << 27);
200     registers[4] |= v << 27;
201 }
202 
max2871_set_SDREF(uint32_t v)203 void max2871_set_SDREF(uint32_t v)
204 {
205     registers[4] &= ~(0x1 << 26);
206     registers[4] |= v << 26;
207 }
208 
max2871_set_BS(uint32_t v)209 void max2871_set_BS(uint32_t v)
210 {
211     registers[4] &= ~(0x3 << 24);
212     registers[4] &= ~(0xFF << 12);
213     registers[4] |= ((v & 0x300) >> 8) << 24;
214     registers[4] |= (v & 0xFF) << 12;
215 }
216 
max2871_set_FB(uint32_t v)217 void max2871_set_FB(uint32_t v)
218 {
219     registers[4] &= ~(0x1 << 23);
220     registers[4] |= v << 23;
221 }
222 
max2871_set_DIVA(uint32_t v)223 void max2871_set_DIVA(uint32_t v)
224 {
225     registers[4] &= ~(0x7 << 20);
226     registers[4] |= v << 20;
227 }
228 
max2871_set_SDVCO(uint32_t v)229 void max2871_set_SDVCO(uint32_t v)
230 {
231     registers[4] &= ~(0x1 << 11);
232     registers[4] |= v << 11;
233 }
234 
max2871_set_MTLD(uint32_t v)235 void max2871_set_MTLD(uint32_t v)
236 {
237     registers[4] &= ~(0x1 << 10);
238     registers[4] |= v << 10;
239 }
240 
max2871_set_BDIV(uint32_t v)241 void max2871_set_BDIV(uint32_t v)
242 {
243     registers[4] &= ~(0x1 << 9);
244     registers[4] |= v << 9;
245 }
246 
max2871_set_RFB_EN(uint32_t v)247 void max2871_set_RFB_EN(uint32_t v)
248 {
249     registers[4] &= ~(0x1 << 8);
250     registers[4] |= v << 8;
251 }
252 
max2871_set_BPWR(uint32_t v)253 void max2871_set_BPWR(uint32_t v)
254 {
255     registers[4] &= ~(0x3 << 6);
256     registers[4] |= v << 6;
257 }
258 
max2871_set_RFA_EN(uint32_t v)259 void max2871_set_RFA_EN(uint32_t v)
260 {
261     registers[4] &= ~(0x1 << 5);
262     registers[4] |= v << 5;
263 }
264 
max2871_set_APWR(uint32_t v)265 void max2871_set_APWR(uint32_t v)
266 {
267     registers[4] &= ~(0x3 << 3);
268     registers[4] |= v << 3;
269 }
270 
max2871_set_SDPLL(uint32_t v)271 void max2871_set_SDPLL(uint32_t v)
272 {
273     registers[5] &= ~(0x1 << 25);
274     registers[5] |= v << 25;
275 }
276 
max2871_set_F01(uint32_t v)277 void max2871_set_F01(uint32_t v)
278 {
279     registers[5] &= ~(0x1 << 24);
280     registers[5] |= v << 24;
281 }
282 
max2871_set_LD(uint32_t v)283 void max2871_set_LD(uint32_t v)
284 {
285     registers[5] &= ~(0x3 << 22);
286     registers[5] |= v << 22;
287 }
288 
max2871_set_ADCS(uint32_t v)289 void max2871_set_ADCS(uint32_t v)
290 {
291     registers[5] &= ~(0x1 << 6);
292     registers[5] |= v << 6;
293 }
294 
max2871_set_ADCM(uint32_t v)295 void max2871_set_ADCM(uint32_t v)
296 {
297     registers[5] &= ~(0x7 << 3);
298     registers[5] |= v << 3;
299 }
300