1/**************************************************************************** 2 * * 3 * GNAT COMPILER COMPONENTS * 4 * * 5 * S I G T R A M P - T A R G E T * 6 * * 7 * Asm Implementation Include File * 8 * * 9 * Copyright (C) 2011-2017, Free Software Foundation, Inc. * 10 * * 11 * GNAT is free software; you can redistribute it and/or modify it under * 12 * terms of the GNU General Public License as published by the Free Soft- * 13 * ware Foundation; either version 3, or (at your option) any later ver- * 14 * sion. GNAT is distributed in the hope that it will be useful, but WITH- * 15 * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * 16 * or FITNESS FOR A PARTICULAR PURPOSE. * 17 * * 18 * As a special exception under Section 7 of GPL version 3, you are granted * 19 * additional permissions described in the GCC Runtime Library Exception, * 20 * version 3.1, as published by the Free Software Foundation. * 21 * * 22 * In particular, you can freely distribute your programs built with the * 23 * GNAT Pro compiler, including any required library run-time units, using * 24 * any licensing terms of your choosing. See the AdaCore Software License * 25 * for full details. * 26 * * 27 * GNAT was originally developed by the GNAT team at New York University. * 28 * Extensive contributions were provided by Ada Core Technologies Inc. * 29 * * 30 ****************************************************************************/ 31 32/*************************************************************** 33 * VxWorks target specific part of the __gnat_sigtramp service * 34 ***************************************************************/ 35 36/* Note: This target specific part is kept in a separate file to avoid 37 duplication of its code for the vxworks and vxworks-vxsim asm 38 implementation files. */ 39 40/* --------------------------- 41 -- And now the asm stubs -- 42 --------------------------- 43 44 They all have a common structure with blocks of asm sequences queued one 45 after the others. Typically: 46 47 SYMBOL_START 48 49 CFI_DIRECTIVES 50 CFI_DEF_CFA, 51 CFI_COMMON_REGISTERS, 52 ... 53 54 STUB_BODY 55 asm code to establish frame, setup the cfa reg value, 56 call the real signal handler, ... 57 58 SYMBOL_END 59*/ 60 61/*-------------------------------- 62 -- Misc constants and helpers -- 63 -------------------------------- */ 64 65/* asm string construction helpers. */ 66 67#define STR(TEXT) #TEXT 68/* stringify expanded TEXT, surrounding it with double quotes. */ 69 70#define S(E) STR(E) 71/* stringify E, which will resolve as text but may contain macros 72 still to be expanded. */ 73 74/* asm (TEXT) outputs <tab>TEXT. These facilitate the output of 75 multine contents: */ 76#define TAB(S) "\t" S 77#define CR(S) S "\n" 78 79#undef TCR 80#define TCR(S) TAB(CR(S)) 81 82/* REGNO constants, dwarf column numbers for registers of interest. */ 83 84#if defined (__PPC__) 85 86#define REGNO_LR 65 87#define REGNO_CTR 66 88#define REGNO_CR 70 89#define REGNO_XER 76 90#define REGNO_GR(N) (N) 91 92#define REGNO_PC 67 /* ARG_POINTER_REGNUM */ 93 94#define FUNCTION "@function" 95 96#elif defined (ARMEL) 97 98#define REGNO_G_REG_OFFSET(N) (N) 99 100#define FUNCTION "%function" 101 102#ifdef __aarch64__ 103#define REGNO_PC_OFFSET 31 /* PC_REGNUM */ 104#else 105#define REGNO_PC_OFFSET 15 /* PC_REGNUM */ 106#endif 107 108/* Mapping of CFI Column, Gcc Regno, Signal context offset for _LP64 109 110 Name CFI GCC SCTX 111 G0-G30 0-30 0-30 112 PC 31 31 113 V0-V31 64-95 32-63 114 115*/ 116 117#elif defined (i386) 118 119/* These are the cfi colunm numbers */ 120 121#define REGNO_EDI 7 122#define REGNO_ESI 6 123#define REGNO_EBP 5 124#define REGNO_ESP 4 125#define REGNO_EBX 3 126#define REGNO_EDX 2 127#define REGNO_ECX 1 128#define REGNO_EAX 0 129#define REGNO_EFLAGS 9 130#define REGNO_SET_PC 8 /* aka %eip */ 131 132#define FUNCTION "@function" 133 134/* Mapping of CFI Column, Gcc Regno, Signal context offset for 32bit 135 136 Name CFI GCC SCTX 137 %eax 0 0 7 138 %ecx 1 2 6 139 %edx 2 1 5 140 %ebx 3 3 4 141 %esp 4 7 3 142 %ebp 5 6 2 143 %esi 6 4 1 144 %edi 7 5 0 145 %eflags 9 17 8 146 %eip 8 n/a 9 147 148 149 In general: 150 There is no unique numbering for the x86 architecture. It's parameterized 151 by DWARF_FRAME_REGNUM, which is DBX_REGISTER_NUMBER except for Windows, and 152 the latter depends on the platform. 153*/ 154 155#elif defined (__x86_64__) 156 157/* These are the cfi colunm numbers */ 158 159#define REGNO_RAX 0 160#define REGNO_RDX 1 161#define REGNO_RCX 2 162#define REGNO_RBX 3 163#define REGNO_RSI 4 164#define REGNO_RDI 5 165#define REGNO_RBP 6 166#define REGNO_RSP 7 167#define REGNO_R8 8 168#define REGNO_R9 9 169#define REGNO_R10 10 170#define REGNO_R11 11 171#define REGNO_R12 12 172#define REGNO_R13 13 173#define REGNO_R14 14 174#define REGNO_R15 15 175#define REGNO_RPC 16 /* aka %rip */ 176#define REGNO_EFLAGS 49 177#define REGNO_FS 54 178 179#define FUNCTION "@function" 180 181#else 182Not_implemented; 183#endif /* REGNO constants */ 184 185 186/*------------------------------ 187 -- Stub construction blocks -- 188 ------------------------------ */ 189 190/* CFA setup block 191 --------------- 192 Only non-volatile registers are suitable for a CFA base. These are the 193 only ones we can expect to be able retrieve from the unwinding context 194 while walking up the chain, saved by at least the bottom-most exception 195 propagation services. We set a non-volatile register to the value we 196 need in the stub body that follows. */ 197 198#if defined (__PPC__) 199 200/* Use r15 for PPC. Note that r14 is inappropriate here, even though it 201 is non-volatile according to the ABI, because GCC uses it as an extra 202 SCRATCH on SPE targets. */ 203 204#define CFA_REG 15 205 206#elif defined (ARMEL) 207 208#ifdef __aarch64__ 209#define CFA_REG 19 210#else 211/* Use r8 for ARM. Any of r4-r8 should work. */ 212#define CFA_REG 8 213#endif 214 215#elif defined (i386) 216 217#define CFA_REG 7 218 219#elif defined (__x86_64__) 220 221/* R15 register */ 222#define CFA_REG 15 223 224#else 225Not_implemented; 226#endif /* CFA setup block */ 227 228#define CFI_DEF_CFA \ 229CR(".cfi_def_cfa " S(CFA_REG) ", 0") 230 231/* Register location blocks 232 ------------------------ 233 Rules to find registers of interest from the CFA. This should comprise 234 all the non-volatile registers relevant to the interrupted context. 235 236 Note that we include r1 in this set, unlike the libgcc unwinding 237 fallbacks. This is useful for fallbacks to allow the use of r1 in CFI 238 expressions and the absence of rule for r1 gets compensated by using the 239 target CFA instead. We don't need the expression facility here and 240 setup a fake CFA to allow very simple offset expressions, so having a 241 rule for r1 is the proper thing to do. We for sure have observed 242 crashes in some cases without it. */ 243 244#if defined (__PPC__) 245 246#define COMMON_CFI(REG) \ 247 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG) 248 249#define CFI_COMMON_REGS \ 250CR("# CFI for common registers\n") \ 251TCR(COMMON_CFI(GR(0))) \ 252TCR(COMMON_CFI(GR(1))) \ 253TCR(COMMON_CFI(GR(2))) \ 254TCR(COMMON_CFI(GR(3))) \ 255TCR(COMMON_CFI(GR(4))) \ 256TCR(COMMON_CFI(GR(5))) \ 257TCR(COMMON_CFI(GR(6))) \ 258TCR(COMMON_CFI(GR(7))) \ 259TCR(COMMON_CFI(GR(8))) \ 260TCR(COMMON_CFI(GR(9))) \ 261TCR(COMMON_CFI(GR(10))) \ 262TCR(COMMON_CFI(GR(11))) \ 263TCR(COMMON_CFI(GR(12))) \ 264TCR(COMMON_CFI(GR(13))) \ 265TCR(COMMON_CFI(GR(14))) \ 266TCR(COMMON_CFI(GR(15))) \ 267TCR(COMMON_CFI(GR(16))) \ 268TCR(COMMON_CFI(GR(17))) \ 269TCR(COMMON_CFI(GR(18))) \ 270TCR(COMMON_CFI(GR(19))) \ 271TCR(COMMON_CFI(GR(20))) \ 272TCR(COMMON_CFI(GR(21))) \ 273TCR(COMMON_CFI(GR(22))) \ 274TCR(COMMON_CFI(GR(23))) \ 275TCR(COMMON_CFI(GR(24))) \ 276TCR(COMMON_CFI(GR(25))) \ 277TCR(COMMON_CFI(GR(26))) \ 278TCR(COMMON_CFI(GR(27))) \ 279TCR(COMMON_CFI(GR(28))) \ 280TCR(COMMON_CFI(GR(29))) \ 281TCR(COMMON_CFI(GR(30))) \ 282TCR(COMMON_CFI(GR(31))) \ 283TCR(COMMON_CFI(LR)) \ 284TCR(COMMON_CFI(CR)) \ 285TCR(COMMON_CFI(CTR)) \ 286TCR(COMMON_CFI(XER)) \ 287TCR(COMMON_CFI(PC)) \ 288TCR(".cfi_return_column " S(REGNO_PC)) 289 290/* Trampoline body block 291 --------------------- */ 292 293#if !defined (__PPC64__) 294#define SIGTRAMP_BODY \ 295CR("") \ 296TCR("# Allocate frame and save the non-volatile") \ 297TCR("# registers we're going to modify") \ 298TCR("stwu %r1,-16(%r1)") \ 299TCR("mflr %r0") \ 300TCR("stw %r0,20(%r1)") \ 301TCR("stw %r" S(CFA_REG) ",8(%r1)") \ 302TCR("") \ 303TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \ 304TCR("mr %r" S(CFA_REG) ", %r7") \ 305TCR("") \ 306TCR("# Call the real handler. The signo, siginfo and sigcontext") \ 307TCR("# arguments are the same as those we received in r3, r4 and r5") \ 308TCR("mtctr %r6") \ 309TCR("bctrl") \ 310TCR("") \ 311TCR("# Restore our callee-saved items, release our frame and return") \ 312TCR("lwz %r" S(CFA_REG) ",8(%r1)") \ 313TCR("lwz %r0,20(%r1)") \ 314TCR("mtlr %r0") \ 315TCR("") \ 316TCR("addi %r1,%r1,16") \ 317TCR("blr") 318#else 319#define SIGTRAMP_BODY \ 320CR("") \ 321TCR("0:") \ 322TCR("addis 2,12,.TOC.-0@ha") \ 323TCR("addi 2,2,.TOC.-0@l") \ 324TCR(".localentry __gnat_sigtramp_common,.-__gnat_sigtramp_common") \ 325TCR("# Allocate frame and save the non-volatile") \ 326TCR("# registers we're going to modify") \ 327TCR("mflr %r0") \ 328TCR("std %r0,16(%r1)") \ 329TCR("stdu %r1,-32(%r1)") \ 330TCR("std %r2,24(%r1)") \ 331TCR("std %r" S(CFA_REG) ",8(%r1)") \ 332TCR("") \ 333TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \ 334TCR("mr %r" S(CFA_REG) ", %r7") \ 335TCR("") \ 336TCR("# Call the real handler. The signo, siginfo and sigcontext") \ 337TCR("# arguments are the same as those we received in r3, r4 and r5") \ 338TCR("mr %r12,%r6") \ 339TCR("mtctr %r6") \ 340TCR("bctrl") \ 341TCR("") \ 342TCR("# Restore our callee-saved items, release our frame and return") \ 343TCR("ld %r" S(CFA_REG) ",8(%r1)") \ 344TCR("ld %r2,24(%r1)") \ 345TCR("addi %r1,%r1,32") \ 346TCR("ld %r0,16(%r1)") \ 347TCR("mtlr %r0") \ 348TCR("blr") 349#endif 350 351#elif defined (ARMEL) 352 353#define COMMON_CFI(REG) \ 354 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG) 355 356#ifdef __aarch64__ 357#define CFI_COMMON_REGS \ 358CR("# CFI for common registers\n") \ 359TCR(COMMON_CFI(G_REG_OFFSET(0))) \ 360TCR(COMMON_CFI(G_REG_OFFSET(1))) \ 361TCR(COMMON_CFI(G_REG_OFFSET(2))) \ 362TCR(COMMON_CFI(G_REG_OFFSET(3))) \ 363TCR(COMMON_CFI(G_REG_OFFSET(4))) \ 364TCR(COMMON_CFI(G_REG_OFFSET(5))) \ 365TCR(COMMON_CFI(G_REG_OFFSET(6))) \ 366TCR(COMMON_CFI(G_REG_OFFSET(7))) \ 367TCR(COMMON_CFI(G_REG_OFFSET(8))) \ 368TCR(COMMON_CFI(G_REG_OFFSET(9))) \ 369TCR(COMMON_CFI(G_REG_OFFSET(10))) \ 370TCR(COMMON_CFI(G_REG_OFFSET(11))) \ 371TCR(COMMON_CFI(G_REG_OFFSET(12))) \ 372TCR(COMMON_CFI(G_REG_OFFSET(13))) \ 373TCR(COMMON_CFI(G_REG_OFFSET(14))) \ 374TCR(COMMON_CFI(G_REG_OFFSET(15))) \ 375TCR(COMMON_CFI(G_REG_OFFSET(16))) \ 376TCR(COMMON_CFI(G_REG_OFFSET(17))) \ 377TCR(COMMON_CFI(G_REG_OFFSET(18))) \ 378TCR(COMMON_CFI(G_REG_OFFSET(19))) \ 379TCR(COMMON_CFI(G_REG_OFFSET(20))) \ 380TCR(COMMON_CFI(G_REG_OFFSET(21))) \ 381TCR(COMMON_CFI(G_REG_OFFSET(22))) \ 382TCR(COMMON_CFI(G_REG_OFFSET(23))) \ 383TCR(COMMON_CFI(G_REG_OFFSET(24))) \ 384TCR(COMMON_CFI(G_REG_OFFSET(25))) \ 385TCR(COMMON_CFI(G_REG_OFFSET(26))) \ 386TCR(COMMON_CFI(G_REG_OFFSET(27))) \ 387TCR(COMMON_CFI(G_REG_OFFSET(28))) \ 388TCR(COMMON_CFI(G_REG_OFFSET(29))) \ 389TCR(COMMON_CFI(PC_OFFSET)) \ 390TCR(".cfi_return_column " S(REGNO_PC_OFFSET)) 391#else 392#define CFI_COMMON_REGS \ 393CR("# CFI for common registers\n") \ 394TCR(COMMON_CFI(G_REG_OFFSET(0))) \ 395TCR(COMMON_CFI(G_REG_OFFSET(1))) \ 396TCR(COMMON_CFI(G_REG_OFFSET(2))) \ 397TCR(COMMON_CFI(G_REG_OFFSET(3))) \ 398TCR(COMMON_CFI(G_REG_OFFSET(4))) \ 399TCR(COMMON_CFI(G_REG_OFFSET(5))) \ 400TCR(COMMON_CFI(G_REG_OFFSET(6))) \ 401TCR(COMMON_CFI(G_REG_OFFSET(7))) \ 402TCR(COMMON_CFI(G_REG_OFFSET(8))) \ 403TCR(COMMON_CFI(G_REG_OFFSET(9))) \ 404TCR(COMMON_CFI(G_REG_OFFSET(10))) \ 405TCR(COMMON_CFI(G_REG_OFFSET(11))) \ 406TCR(COMMON_CFI(G_REG_OFFSET(12))) \ 407TCR(COMMON_CFI(G_REG_OFFSET(13))) \ 408TCR(COMMON_CFI(G_REG_OFFSET(14))) \ 409TCR(COMMON_CFI(PC_OFFSET)) \ 410TCR(".cfi_return_column " S(REGNO_PC_OFFSET)) 411#endif 412 413/* Trampoline body block 414 --------------------- */ 415#ifdef __aarch64__ 416#define SIGTRAMP_BODY \ 417CR("") \ 418TCR("# Push FP and LR on stack") \ 419TCR("stp x29, x30, [sp, #-16]!") \ 420TCR("# Push register used to hold the CFA on stack") \ 421TCR("str x" S(CFA_REG) ", [sp, #-8]!") \ 422TCR("# Set the CFA: x2 value") \ 423TCR("mov x" S(CFA_REG) ", x2") \ 424TCR("# Call the handler") \ 425TCR("blr x3") \ 426TCR("# Release our frame and return (should never get here!).") \ 427TCR("ldr x" S(CFA_REG) " , [sp], 8") \ 428TCR("ldp x29, x30, [sp], 16") \ 429TCR("ret") 430#else 431#define SIGTRAMP_BODY \ 432CR("") \ 433TCR("# Allocate frame and save the non-volatile") \ 434TCR("# registers we're going to modify") \ 435TCR("mov ip, sp") \ 436TCR("stmfd sp!, {r"S(CFA_REG)", fp, ip, lr, pc}") \ 437TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \ 438TCR("ldr r"S(CFA_REG)", [ip]") \ 439TCR("") \ 440TCR("# Call the real handler. The signo, siginfo and sigcontext") \ 441TCR("# arguments are the same as those we received in r0, r1 and r2") \ 442TCR("sub fp, ip, #4") \ 443TCR("blx r3") \ 444TCR("# Restore our callee-saved items, release our frame and return") \ 445TCR("ldmfd sp, {r"S(CFA_REG)", fp, sp, pc}") 446#endif 447 448#elif defined (i386) 449 450#if CPU == SIMNT || CPU == SIMPENTIUM || CPU == SIMLINUX 451#define COMMON_CFI(REG) \ 452 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG) 453#else 454#define COMMON_CFI(REG) \ 455 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG) 456#endif 457 458#define PC_CFI(REG) \ 459 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG) 460 461#define CFI_COMMON_REGS \ 462CR("# CFI for common registers\n") \ 463TCR(COMMON_CFI(EDI)) \ 464TCR(COMMON_CFI(ESI)) \ 465TCR(COMMON_CFI(EBP)) \ 466TCR(COMMON_CFI(ESP)) \ 467TCR(COMMON_CFI(EBX)) \ 468TCR(COMMON_CFI(EDX)) \ 469TCR(COMMON_CFI(ECX)) \ 470TCR(COMMON_CFI(EAX)) \ 471TCR(COMMON_CFI(EFLAGS)) \ 472TCR(PC_CFI(SET_PC)) \ 473TCR(".cfi_return_column " S(REGNO_SET_PC)) 474 475/* Trampoline body block 476 --------------------- */ 477 478#define SIGTRAMP_BODY \ 479CR("") \ 480TCR("# Allocate frame and save the non-volatile") \ 481TCR("# registers we're going to modify") \ 482TCR("pushl %ebp") \ 483TCR("movl %esp, %ebp") \ 484TCR("pushl %edi") \ 485TCR("subl $24, %esp") \ 486TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \ 487TCR("movl 24(%ebp), %edi") \ 488TCR("# Call the real handler. The signo, siginfo and sigcontext") \ 489TCR("# arguments are the same as those we received") \ 490TCR("movl 16(%ebp), %eax") \ 491TCR("movl %eax, 8(%esp)") \ 492TCR("movl 12(%ebp), %eax") \ 493TCR("movl %eax, 4(%esp)") \ 494TCR("movl 8(%ebp), %eax") \ 495TCR("movl %eax, (%esp)") \ 496TCR("call *20(%ebp)") \ 497TCR("# Restore our callee-saved items, release our frame and return") \ 498TCR("popl %edi") \ 499TCR("leave") \ 500TCR("ret") 501 502#elif defined (__x86_64__) 503 504#define COMMON_CFI(REG) \ 505 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG) 506 507#define CFI_COMMON_REGS \ 508CR("# CFI for common registers\n") \ 509TCR(COMMON_CFI(R15)) \ 510TCR(COMMON_CFI(R14)) \ 511TCR(COMMON_CFI(R13)) \ 512TCR(COMMON_CFI(R12)) \ 513TCR(COMMON_CFI(R11)) \ 514TCR(COMMON_CFI(R10)) \ 515TCR(COMMON_CFI(R9)) \ 516TCR(COMMON_CFI(R8)) \ 517TCR(COMMON_CFI(RDI)) \ 518TCR(COMMON_CFI(RSI)) \ 519TCR(COMMON_CFI(RBP)) \ 520TCR(COMMON_CFI(RSP)) \ 521TCR(COMMON_CFI(RBX)) \ 522TCR(COMMON_CFI(RDX)) \ 523TCR(COMMON_CFI(RCX)) \ 524TCR(COMMON_CFI(RAX)) \ 525TCR(COMMON_CFI(RPC)) \ 526TCR(".cfi_return_column " S(REGNO_RPC)) 527 528/* Trampoline body block 529 --------------------- */ 530 531#define SIGTRAMP_BODY \ 532CR("") \ 533TCR("# Allocate frame and save the non-volatile") \ 534TCR("# registers we're going to modify") \ 535TCR("subq $8, %rsp") \ 536TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \ 537TCR("movq %r8, %r15") \ 538TCR("# Call the real handler. The signo, siginfo and sigcontext") \ 539TCR("# arguments are the same as those we received") \ 540TCR("call *%rcx") \ 541TCR("# This part should never be executed") \ 542TCR("addq $8, %rsp") \ 543TCR("ret") 544 545#else 546Not_implemented; 547#endif /* CFI_COMMON_REGS and SIGTRAMP_BODY */ 548 549/* Symbol definition block 550 ----------------------- */ 551 552#ifdef __x86_64__ 553#define FUNC_ALIGN TCR(".p2align 4,,15") 554#else 555#define FUNC_ALIGN 556#endif 557 558#define SIGTRAMP_START(SYM) \ 559CR("# " S(SYM) " cfi trampoline") \ 560TCR(".type " S(SYM) ", "FUNCTION) \ 561CR("") \ 562FUNC_ALIGN \ 563CR(S(SYM) ":") \ 564TCR(".cfi_startproc") \ 565TCR(".cfi_signal_frame") 566 567/* Symbol termination block 568 ------------------------ */ 569 570#define SIGTRAMP_END(SYM) \ 571CR(".cfi_endproc") \ 572TCR(".size " S(SYM) ", .-" S(SYM)) 573 574/*---------------------------- 575 -- And now, the real code -- 576 ---------------------------- */ 577 578/* Text section start. The compiler isn't aware of that switch. */ 579 580asm (".text\n" 581 TCR(".align 2")); 582