1;; Predicate definitions for DEC Alpha. 2;; Copyright (C) 2004-2018 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5;; 6;; GCC is free software; you can redistribute it and/or modify 7;; it under the terms of the GNU General Public License as published by 8;; the Free Software Foundation; either version 3, or (at your option) 9;; any later version. 10;; 11;; GCC is distributed in the hope that it will be useful, 12;; but WITHOUT ANY WARRANTY; without even the implied warranty of 13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14;; GNU General Public License for more details. 15;; 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING3. If not see 18;; <http://www.gnu.org/licenses/>. 19 20;; Return 1 if OP is the zero constant for MODE. 21(define_predicate "const0_operand" 22 (and (match_code "const_int,const_wide_int,const_double,const_vector") 23 (match_test "op == CONST0_RTX (mode)"))) 24 25;; Returns true if OP is either the constant zero or a register. 26(define_predicate "reg_or_0_operand" 27 (ior (match_operand 0 "register_operand") 28 (match_operand 0 "const0_operand"))) 29 30;; Return 1 if OP is a constant in the range of 0-63 (for a shift) or 31;; any register. 32(define_predicate "reg_or_6bit_operand" 33 (if_then_else (match_code "const_int") 34 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 64") 35 (match_operand 0 "register_operand"))) 36 37;; Return 1 if OP is an 8-bit constant. 38(define_predicate "cint8_operand" 39 (and (match_code "const_int") 40 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 256"))) 41 42;; Return 1 if OP is an 8-bit constant or any register. 43(define_predicate "reg_or_8bit_operand" 44 (if_then_else (match_code "const_int") 45 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 256") 46 (match_operand 0 "register_operand"))) 47 48;; Return 1 if OP is a constant or any register. 49(define_predicate "reg_or_cint_operand" 50 (ior (match_operand 0 "register_operand") 51 (match_operand 0 "const_int_operand"))) 52 53;; Return 1 if the operand is a valid second operand to an add insn. 54(define_predicate "add_operand" 55 (if_then_else (match_code "const_int") 56 (match_test "satisfies_constraint_K (op) || satisfies_constraint_L (op)") 57 (match_operand 0 "register_operand"))) 58 59;; Return 1 if the operand is a valid second operand to a 60;; sign-extending add insn. 61(define_predicate "sext_add_operand" 62 (if_then_else (match_code "const_int") 63 (match_test "satisfies_constraint_I (op) || satisfies_constraint_O (op)") 64 (match_operand 0 "register_operand"))) 65 66;; Return 1 if the operand is a non-symbolic constant operand that 67;; does not satisfy add_operand. 68(define_predicate "non_add_const_operand" 69 (and (match_code "const_int,const_wide_int,const_double,const_vector") 70 (not (match_operand 0 "add_operand")))) 71 72;; Return 1 if the operand is a non-symbolic, nonzero constant operand. 73(define_predicate "non_zero_const_operand" 74 (and (match_code "const_int,const_wide_int,const_double,const_vector") 75 (not (match_test "op == CONST0_RTX (mode)")))) 76 77;; Return 1 if OP is the constant 2 or 3. 78(define_predicate "const23_operand" 79 (and (match_code "const_int") 80 (match_test "INTVAL (op) == 2 || INTVAL (op) == 3"))) 81 82;; Return 1 if OP is the constant 4 or 8. 83(define_predicate "const48_operand" 84 (and (match_code "const_int") 85 (match_test "INTVAL (op) == 4 || INTVAL (op) == 8"))) 86 87;; Return 1 if OP is a valid first operand to an AND insn. 88(define_predicate "and_operand" 89 (if_then_else (match_code "const_int") 90 (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 91 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100 92 || zap_mask (INTVAL (op))") 93 (match_operand 0 "register_operand"))) 94 95;; Return 1 if OP is a valid first operand to an IOR or XOR insn. 96(define_predicate "or_operand" 97 (if_then_else (match_code "const_int") 98 (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 0x100 99 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100") 100 (match_operand 0 "register_operand"))) 101 102;; Return 1 if OP is a constant that is the width, in bits, of an integral 103;; mode not larger than DImode. 104(define_predicate "mode_width_operand" 105 (match_code "const_int") 106{ 107 HOST_WIDE_INT i = INTVAL (op); 108 return i == 8 || i == 16 || i == 32 || i == 64; 109}) 110 111;; Return 1 if OP is a constant that is a mask of ones of width of an 112;; integral machine mode not larger than DImode. 113(define_predicate "mode_mask_operand" 114 (match_code "const_int") 115{ 116 HOST_WIDE_INT value = INTVAL (op); 117 118 if (value == 0xff) 119 return 1; 120 if (value == 0xffff) 121 return 1; 122 if (value == 0xffffffff) 123 return 1; 124 if (value == -1) 125 return 1; 126 127 return 0; 128}) 129 130;; Return 1 if OP is a multiple of 8 less than 64. 131(define_predicate "mul8_operand" 132 (match_code "const_int") 133{ 134 unsigned HOST_WIDE_INT i = INTVAL (op); 135 return i < 64 && i % 8 == 0; 136}) 137 138;; Return 1 if OP is a hard floating-point register. 139(define_predicate "hard_fp_register_operand" 140 (match_operand 0 "register_operand") 141{ 142 if (SUBREG_P (op)) 143 op = SUBREG_REG (op); 144 return REGNO_REG_CLASS (REGNO (op)) == FLOAT_REGS; 145}) 146 147;; Return 1 if OP is a hard general register. 148(define_predicate "hard_int_register_operand" 149 (match_operand 0 "register_operand") 150{ 151 if (SUBREG_P (op)) 152 op = SUBREG_REG (op); 153 return REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS; 154}) 155 156;; Return 1 if OP is a valid operand for the source of a move insn. 157(define_predicate "input_operand" 158 (match_operand 0 "general_operand") 159{ 160 switch (GET_CODE (op)) 161 { 162 case LABEL_REF: 163 case SYMBOL_REF: 164 case CONST: 165 if (TARGET_EXPLICIT_RELOCS) 166 { 167 /* We don't split symbolic operands into something unintelligable 168 until after reload, but we do not wish non-small, non-global 169 symbolic operands to be reconstructed from their high/lo_sum 170 form. */ 171 return (small_symbolic_operand (op, mode) 172 || global_symbolic_operand (op, mode) 173 || gotdtp_symbolic_operand (op, mode) 174 || gottp_symbolic_operand (op, mode)); 175 } 176 /* VMS still has a 32-bit mode. */ 177 return mode == ptr_mode || mode == Pmode; 178 179 case HIGH: 180 return (TARGET_EXPLICIT_RELOCS 181 && local_symbolic_operand (XEXP (op, 0), mode)); 182 183 case REG: 184 return 1; 185 186 case SUBREG: 187 if (register_operand (op, mode)) 188 return 1; 189 /* fall through */ 190 case MEM: 191 return ((TARGET_BWX || (mode != HImode && mode != QImode)) 192 && general_operand (op, mode)); 193 194 case CONST_WIDE_INT: 195 case CONST_DOUBLE: 196 return op == CONST0_RTX (mode); 197 198 case CONST_VECTOR: 199 if (reload_in_progress || reload_completed) 200 return alpha_legitimate_constant_p (mode, op); 201 return op == CONST0_RTX (mode); 202 203 case CONST_INT: 204 if (mode == QImode || mode == HImode) 205 return true; 206 if (reload_in_progress || reload_completed) 207 return alpha_legitimate_constant_p (mode, op); 208 return add_operand (op, mode); 209 210 default: 211 gcc_unreachable (); 212 } 213 return 0; 214}) 215 216;; Return 1 if OP is a SYMBOL_REF for a function known to be in this 217;; file, and in the same section as the current function. 218 219(define_predicate "samegp_function_operand" 220 (match_code "symbol_ref") 221{ 222 /* Easy test for recursion. */ 223 if (op == XEXP (DECL_RTL (current_function_decl), 0)) 224 return true; 225 226 /* Functions that are not local can be overridden, and thus may 227 not share the same gp. */ 228 if (! SYMBOL_REF_LOCAL_P (op)) 229 return false; 230 231 /* If -msmall-data is in effect, assume that there is only one GP 232 for the module, and so any local symbol has this property. We 233 need explicit relocations to be able to enforce this for symbols 234 not defined in this unit of translation, however. */ 235 if (TARGET_EXPLICIT_RELOCS && TARGET_SMALL_DATA) 236 return true; 237 238 /* Functions that are not external are defined in this UoT, 239 and thus must share the same gp. */ 240 return ! SYMBOL_REF_EXTERNAL_P (op); 241}) 242 243;; Return 1 if OP is a SYMBOL_REF for which we can make a call via bsr. 244(define_predicate "direct_call_operand" 245 (match_operand 0 "samegp_function_operand") 246{ 247 /* If profiling is implemented via linker tricks, we can't jump 248 to the nogp alternate entry point. Note that crtl->profile 249 would not be correct, since that doesn't indicate if the target 250 function uses profiling. */ 251 /* ??? TARGET_PROFILING_NEEDS_GP isn't really the right test, 252 but is approximately correct for the OSF ABIs. Don't know 253 what to do for VMS, NT, or UMK. */ 254 if (!TARGET_PROFILING_NEEDS_GP && profile_flag) 255 return false; 256 257 /* Must be a function. In some cases folks create thunks in static 258 data structures and then make calls to them. If we allow the 259 direct call, we'll get an error from the linker about !samegp reloc 260 against a symbol without a .prologue directive. */ 261 if (!SYMBOL_REF_FUNCTION_P (op)) 262 return false; 263 264 /* Must be "near" so that the branch is assumed to reach. With 265 -msmall-text, this is assumed true of all local symbols. Since 266 we've already checked samegp, locality is already assured. */ 267 if (TARGET_SMALL_TEXT) 268 return true; 269 270 return false; 271}) 272 273;; Return 1 if OP is a valid operand for the MEM of a CALL insn. 274;; 275;; For TARGET_ABI_OSF, we want to restrict to R27 or a pseudo. 276 277(define_predicate "call_operand" 278 (ior (match_code "symbol_ref") 279 (and (match_code "reg") 280 (ior (not (match_test "TARGET_ABI_OSF")) 281 (not (match_test "HARD_REGISTER_P (op)")) 282 (match_test "REGNO (op) == R27_REG"))))) 283 284;; Return true if OP is a LABEL_REF, or SYMBOL_REF or CONST referencing 285;; a (non-tls) variable known to be defined in this file. 286(define_predicate "local_symbolic_operand" 287 (match_code "label_ref,const,symbol_ref") 288{ 289 if (GET_CODE (op) == CONST 290 && GET_CODE (XEXP (op, 0)) == PLUS 291 && CONST_INT_P (XEXP (XEXP (op, 0), 1))) 292 op = XEXP (XEXP (op, 0), 0); 293 294 if (GET_CODE (op) == LABEL_REF) 295 return 1; 296 297 if (GET_CODE (op) != SYMBOL_REF) 298 return 0; 299 300 return (SYMBOL_REF_LOCAL_P (op) 301 && !SYMBOL_REF_WEAK (op) 302 && !SYMBOL_REF_TLS_MODEL (op)); 303}) 304 305;; Return true if OP is a SYMBOL_REF or CONST referencing a variable 306;; known to be defined in this file in the small data area. 307(define_predicate "small_symbolic_operand" 308 (match_code "const,symbol_ref") 309{ 310 HOST_WIDE_INT ofs = 0, max_ofs = 0; 311 312 if (! TARGET_SMALL_DATA) 313 return false; 314 315 if (GET_CODE (op) == CONST 316 && GET_CODE (XEXP (op, 0)) == PLUS 317 && CONST_INT_P (XEXP (XEXP (op, 0), 1))) 318 { 319 ofs = INTVAL (XEXP (XEXP (op, 0), 1)); 320 op = XEXP (XEXP (op, 0), 0); 321 } 322 323 if (GET_CODE (op) != SYMBOL_REF) 324 return false; 325 326 /* ??? There's no encode_section_info equivalent for the rtl 327 constant pool, so SYMBOL_FLAG_SMALL never gets set. */ 328 if (CONSTANT_POOL_ADDRESS_P (op)) 329 { 330 max_ofs = GET_MODE_SIZE (get_pool_mode (op)); 331 if (max_ofs > g_switch_value) 332 return false; 333 } 334 else if (SYMBOL_REF_LOCAL_P (op) 335 && SYMBOL_REF_SMALL_P (op) 336 && !SYMBOL_REF_WEAK (op) 337 && !SYMBOL_REF_TLS_MODEL (op)) 338 { 339 if (SYMBOL_REF_DECL (op)) 340 max_ofs = tree_to_uhwi (DECL_SIZE_UNIT (SYMBOL_REF_DECL (op))); 341 } 342 else 343 return false; 344 345 /* Given that we know that the GP is always 8 byte aligned, we can 346 always adjust by 7 without overflowing. */ 347 if (max_ofs < 8) 348 max_ofs = 8; 349 350 /* Since we know this is an object in a small data section, we know the 351 entire section is addressable via GP. We don't know where the section 352 boundaries are, but we know the entire object is within. */ 353 return IN_RANGE (ofs, 0, max_ofs - 1); 354}) 355 356;; Return true if OP is a SYMBOL_REF or CONST referencing a variable 357;; not known (or known not) to be defined in this file. 358(define_predicate "global_symbolic_operand" 359 (match_code "const,symbol_ref") 360{ 361 if (GET_CODE (op) == CONST 362 && GET_CODE (XEXP (op, 0)) == PLUS 363 && CONST_INT_P (XEXP (XEXP (op, 0), 1))) 364 op = XEXP (XEXP (op, 0), 0); 365 366 if (GET_CODE (op) != SYMBOL_REF) 367 return 0; 368 369 return ((!SYMBOL_REF_LOCAL_P (op) || SYMBOL_REF_WEAK (op)) 370 && !SYMBOL_REF_TLS_MODEL (op)); 371}) 372 373;; Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref, 374;; possibly with an offset. 375(define_predicate "symbolic_operand" 376 (ior (match_code "symbol_ref,label_ref") 377 (and (match_code "const") 378 (match_code "plus" "0") 379 (match_code "symbol_ref,label_ref" "00") 380 (match_code "const_int" "01")))) 381 382;; Return true if OP is valid for 16-bit DTP relative relocations. 383(define_predicate "dtp16_symbolic_operand" 384 (and (match_code "const") 385 (match_test "tls_symbolic_operand_1 (op, 16, UNSPEC_DTPREL)"))) 386 387;; Return true if OP is valid for 32-bit DTP relative relocations. 388(define_predicate "dtp32_symbolic_operand" 389 (and (match_code "const") 390 (match_test "tls_symbolic_operand_1 (op, 32, UNSPEC_DTPREL)"))) 391 392;; Return true if OP is valid for 64-bit DTP relative relocations. 393(define_predicate "gotdtp_symbolic_operand" 394 (and (match_code "const") 395 (match_test "tls_symbolic_operand_1 (op, 64, UNSPEC_DTPREL)"))) 396 397;; Return true if OP is valid for 16-bit TP relative relocations. 398(define_predicate "tp16_symbolic_operand" 399 (and (match_code "const") 400 (match_test "tls_symbolic_operand_1 (op, 16, UNSPEC_TPREL)"))) 401 402;; Return true if OP is valid for 32-bit TP relative relocations. 403(define_predicate "tp32_symbolic_operand" 404 (and (match_code "const") 405 (match_test "tls_symbolic_operand_1 (op, 32, UNSPEC_TPREL)"))) 406 407;; Return true if OP is valid for 64-bit TP relative relocations. 408(define_predicate "gottp_symbolic_operand" 409 (and (match_code "const") 410 (match_test "tls_symbolic_operand_1 (op, 64, UNSPEC_TPREL)"))) 411 412;; Return 1 if this memory address is a known aligned register plus 413;; a constant. It must be a valid address. This means that we can do 414;; this as an aligned reference plus some offset. 415;; 416;; Take into account what reload will do. Oh god this is awful. 417;; The horrible comma-operator construct below is to prevent genrecog 418;; from thinking that this predicate accepts REG and SUBREG. We don't 419;; use recog during reload, so pretending these codes are accepted 420;; pessimizes things a tad. 421 422(define_special_predicate "aligned_memory_operand" 423 (ior (match_test "op = resolve_reload_operand (op), 0") 424 (match_code "mem")) 425{ 426 rtx base; 427 int offset; 428 429 if (MEM_ALIGN (op) >= 32) 430 return 1; 431 432 op = XEXP (op, 0); 433 434 /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) 435 sorts of constructs. Dig for the real base register. */ 436 if (reload_in_progress 437 && GET_CODE (op) == PLUS 438 && GET_CODE (XEXP (op, 0)) == PLUS) 439 { 440 base = XEXP (XEXP (op, 0), 0); 441 offset = INTVAL (XEXP (op, 1)); 442 } 443 else 444 { 445 if (! memory_address_p (mode, op)) 446 return 0; 447 if (GET_CODE (op) == PLUS) 448 { 449 base = XEXP (op, 0); 450 offset = INTVAL (XEXP (op, 1)); 451 } 452 else 453 { 454 base = op; 455 offset = 0; 456 } 457 } 458 459 if (offset % GET_MODE_SIZE (mode)) 460 return 0; 461 462 return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) >= 32); 463}) 464 465;; Similar, but return 1 if OP is a MEM which is not alignable. 466 467(define_special_predicate "unaligned_memory_operand" 468 (ior (match_test "op = resolve_reload_operand (op), 0") 469 (match_code "mem")) 470{ 471 rtx base; 472 int offset; 473 474 if (MEM_ALIGN (op) >= 32) 475 return 0; 476 477 op = XEXP (op, 0); 478 479 /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) 480 sorts of constructs. Dig for the real base register. */ 481 if (reload_in_progress 482 && GET_CODE (op) == PLUS 483 && GET_CODE (XEXP (op, 0)) == PLUS) 484 { 485 base = XEXP (XEXP (op, 0), 0); 486 offset = INTVAL (XEXP (op, 1)); 487 } 488 else 489 { 490 if (! memory_address_p (mode, op)) 491 return 0; 492 if (GET_CODE (op) == PLUS) 493 { 494 base = XEXP (op, 0); 495 offset = INTVAL (XEXP (op, 1)); 496 } 497 else 498 { 499 base = op; 500 offset = 0; 501 } 502 } 503 504 if (offset % GET_MODE_SIZE (mode)) 505 return 1; 506 507 return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) < 32); 508}) 509 510;; Return 1 if OP is any memory location. During reload a pseudo matches. 511(define_special_predicate "any_memory_operand" 512 (match_code "mem,reg,subreg") 513{ 514 if (SUBREG_P (op)) 515 op = SUBREG_REG (op); 516 517 if (MEM_P (op)) 518 return true; 519 if (reload_in_progress && REG_P (op)) 520 { 521 unsigned regno = REGNO (op); 522 if (HARD_REGISTER_NUM_P (regno)) 523 return false; 524 else 525 return reg_renumber[regno] < 0; 526 } 527 528 return false; 529}) 530 531;; Returns 1 if OP is not an eliminable register. 532;; 533;; This exists to cure a pathological failure in the s8addq (et al) patterns, 534;; 535;; long foo () { long t; bar(); return (long) &t * 26107; } 536;; 537;; which run afoul of a hack in reload to cure a (presumably) similar 538;; problem with lea-type instructions on other targets. But there is 539;; one of us and many of them, so work around the problem by selectively 540;; preventing combine from making the optimization. 541 542(define_predicate "reg_not_elim_operand" 543 (match_operand 0 "register_operand") 544{ 545 if (SUBREG_P (op)) 546 op = SUBREG_REG (op); 547 return op != frame_pointer_rtx && op != arg_pointer_rtx; 548}) 549 550;; Accept a register, but not a subreg of any kind. This allows us to 551;; avoid pathological cases in reload wrt data movement common in 552;; int->fp conversion. */ 553(define_predicate "reg_no_subreg_operand" 554 (and (match_code "reg") 555 (match_operand 0 "register_operand"))) 556 557;; Return 1 if OP is a valid Alpha comparison operator for "cbranch" 558;; instructions. 559(define_predicate "alpha_cbranch_operator" 560 (ior (match_operand 0 "ordered_comparison_operator") 561 (match_code "ordered,unordered"))) 562 563;; Return 1 if OP is a valid Alpha comparison operator for "cmp" style 564;; instructions. 565(define_predicate "alpha_comparison_operator" 566 (match_code "eq,le,lt,leu,ltu")) 567 568;; Similarly, but with swapped operands. 569(define_predicate "alpha_swapped_comparison_operator" 570 (match_code "eq,ge,gt,gtu")) 571 572;; Return 1 if OP is a valid Alpha comparison operator against zero 573;; for "bcc" style instructions. 574(define_predicate "alpha_zero_comparison_operator" 575 (match_code "eq,ne,le,lt,leu,ltu")) 576 577;; Return 1 if OP is a signed comparison operation. 578(define_predicate "signed_comparison_operator" 579 (match_code "eq,ne,le,lt,ge,gt")) 580 581;; Return 1 if OP is a valid Alpha floating point comparison operator. 582(define_predicate "alpha_fp_comparison_operator" 583 (match_code "eq,le,lt,unordered")) 584 585;; Return 1 if this is a divide or modulus operator. 586(define_predicate "divmod_operator" 587 (match_code "div,mod,udiv,umod")) 588 589;; Return 1 if this is a float->int conversion operator. 590(define_predicate "fix_operator" 591 (match_code "fix,unsigned_fix")) 592 593;; Recognize an addition operation that includes a constant. Used to 594;; convince reload to canonize (plus (plus reg c1) c2) during register 595;; elimination. 596 597(define_predicate "addition_operation" 598 (and (match_code "plus") 599 (match_test "register_operand (XEXP (op, 0), mode) 600 && satisfies_constraint_K (XEXP (op, 1))"))) 601 602;; For TARGET_EXPLICIT_RELOCS, we don't obfuscate a SYMBOL_REF to a 603;; small symbolic operand until after reload. At which point we need 604;; to replace (mem (symbol_ref)) with (mem (lo_sum $29 symbol_ref)) 605;; so that sched2 has the proper dependency information. */ 606(define_predicate "some_small_symbolic_operand" 607 (match_code "set,parallel,prefetch,unspec,unspec_volatile") 608{ 609 /* Avoid search unless necessary. */ 610 if (!TARGET_EXPLICIT_RELOCS || !reload_completed) 611 return false; 612 return some_small_symbolic_operand_int (op); 613}) 614 615;; Accept a register, or a memory if BWX is enabled. 616(define_predicate "reg_or_bwx_memory_operand" 617 (ior (match_operand 0 "register_operand") 618 (and (match_test "TARGET_BWX") 619 (match_operand 0 "memory_operand")))) 620 621;; Accept a memory whose address is only a register. 622(define_predicate "mem_noofs_operand" 623 (and (match_code "mem") 624 (match_code "reg" "0"))) 625