1 /* Verify that we optimize to conditional traps. */ 2 /* { dg-options "-O" } */ 3 /* { dg-do compile { target rs6000-*-* powerpc*-*-* sparc*-*-* ia64-*-* } } */ 4 /* { dg-final { scan-assembler-not "^\t(trap|ta|break)\[ \t\]" } } */ 5 6 void bar (void); 7 f1(int p)8void f1(int p) 9 { 10 if (p) 11 __builtin_trap(); 12 } 13 f2(int p)14void f2(int p) 15 { 16 if (p) 17 __builtin_trap(); 18 else 19 bar(); 20 } 21 f3(int p)22void f3(int p) 23 { 24 if (p) 25 bar(); 26 else 27 __builtin_trap(); 28 } 29 f4(int p,int q)30void f4(int p, int q) 31 { 32 if (p) 33 { 34 bar(); 35 if (q) 36 bar(); 37 } 38 else 39 __builtin_trap(); 40 } 41