1 ifndef __regmxu6inc 2__regmxu4inc equ 1 3 save 4 listing off ; no listing over this file 5 6;**************************************************************************** 7;* * 8;* AS 1.42 - File REGMXU4.INC * 9;* * 10;* Contains Bit & Register Definitions for ATmega32U6 * 11;* AT90USB646/647 * 12;* AT90USB1286/1287 * 13;* * 14;**************************************************************************** 15 16;---------------------------------------------------------------------------- 17; Chip Configuration 18 19MCUCR port 0x35 ; MCU General Control Register 20IVCE avrbit MCUCR,0 ; Interrupt Vector Change Enable 21IVSEL avrbit MCUCR,1 ; Interrupt Vector Select 22 23SMCR port 0x33 ; Sleep Mode Control Register 24SE avrbit SMCR,0 ; Sleep Enable 25SM2 avrbit SMCR,3 ; Sleep Mode Select 26SM1 avrbit SMCR,2 27SM0 avrbit SMCR,1 28 29MCUSR port 0x34 ; MCU Control and Status Register 30JTRF avrbit MCUSR,4 ; JTAG Reset Flag 31WDRF avrbit MCUSR,3 ; Watchdog Reset Occured 32BORF avrbit MCUSR,2 ; Brown-Out Occured 33EXTRF avrbit MCUSR,1 ; External Reset Occured 34PORF avrbit MCUSR,0 ; Power-On Reset Occured 35 36OSCCAL sfr 0x66 ; Oscillator Calibration 37 38PRR0 sfr 0x64 ; Power Reduction Register 0 39PRADC avrbit PRR0,0 ; Power Reduction A/D Converter 40PRSPI avrbit PRR0,2 ; Power Reduction SPI 41PRTIM1 avrbit PRR0,3 ; Power Reduction Timer/Counter 1 42PRTIM0 avrbit PRR0,5 ; Power Reduction Timer/Counter 0 43PRTIM2 avrbit PRR0,6 ; Power Reduction Timer/Counter 2 44PRTWI avrbit PRR0,7 ; Power Reduction Two-Wire Interface 45PRR1 sfr 0x65 ; Power Reduction Register 1 46PRUSART1 avrbit PRR1,0 ; Power Reduction USART1 47PRTIM3 avrbit PRR1,3 ; Power Reduction Timer/Counter 3 48PRUSB avrbit PRR1,7 ; Power Reduction USB 49 50CLKPR sfr 0x61 ; Clock Prescale Register 51CLKPS0 avrbit CLKPR,0 ; Clock Prescaler Select Bits 52CLKPS1 avrbit CLKPR,1 53CLKPS2 avrbit CLKPR,2 54CLKPS3 avrbit CLKPR,3 55CLKPCE avrbit CLKPR,7 ; Clock Prescaler Change Enable 56 57PLLCSR port 0x29 ; PLL Control and Status Register 58PLOCK avrbit PLLCSR,0 ; PLL Lock Detector 59PLLE avrbit PLLCSR,1 ; PLL Enable 60PLLP0 avrbit PLLCSR,2 ; PLL Prescaler 61PLLP1 avrbit PLLCSR,3 62PLLP2 avrbit PLLCSR,4 63 64;---------------------------------------------------------------------------- 65; JTAG etc. 66 67JTD avrbit MCUCR,7 ; JTAG disable 68 69CRDR port 0x31 ; Monitor Data Register 70MONDR port 0x31 71 72XMCRA sfr 0x74 ; External Memory Access Register A 73SRW00 avrbit XMCRA,0 ; Wait-state Select Bits for Lower Sector 74SRW01 avrbit XMCRA,1 75SRW10 avrbit XMCRA,2 ; Wait-state Select Bits for Upper Sector 76SRW11 avrbit XMCRA,3 77SRL0 avrbit XMCRA,4 ; Wait-state Sector Limit 78SRL1 avrbit XMCRA,5 79SRL2 avrbit XMCRA,6 80SRE avrbit XMCRA,7 ; External SRAM/XMEM Enable 81XMCRB sfr 0x75 ; External Memory Access Register B 82XMM0 avrbit XMCRB,0 ; External Memory High Mask 83XMM1 avrbit XMCRB,1 84XMM2 avrbit XMCRB,2 85XMBK avrbit XMCRB,7 ; External Memory Bus-keeper Enable 86 87;---------------------------------------------------------------------------- 88; EEPROM/Program Memory Access 89 90 include "eem2.inc" 91 92EEPM0 avrbit EECR,4 ; EEPROM Programming Mode 93EEPM1 avrbit EECR,5 94 95 include "spmcsr37.inc" 96 97SIGRD avrbit SPMCSR,5 ; Signature Read 98 99;---------------------------------------------------------------------------- 100; GPIO 101 102__PORTPREFIX equ "PORT" 103 104PINA port 0x00 ; Port A @ 0x00 (IO) ff. 105PINB port 0x03 ; Port B @ 0x03 (IO) ff. 106PINC port 0x06 ; Port C @ 0x06 (IO) ff. 107PIND port 0x09 ; Port D @ 0x09 (IO) ff. 108PINE port 0x0c ; Port E @ 0x0c (IO) ff. 109PINF port 0x0f ; Port F @ 0x0f (IO) ff. 110 111GPIOR0 port 0x1e ; General Purpose I/O Register 0 112GPIOR1 port 0x2a ; General Purpose I/O Register 1 113GPIOR2 port 0x2b ; General Purpose I/O Register 2 114 115PUD avrbit MCUCR,4 ; Pullup Disable 116 117PCMSK0 sfr 0x6b ; Pin Change Mask Register 0 118 119PCICR sfr 0x68 ; Pin Change Control Register 120 121PCIFR port 0x1b ; Pin Change Flag Register 122 123;---------------------------------------------------------------------------- 124; Interrupt Vectors 125 126 enumconf 2,code 127 enum INT0_vect=2 ; External Interrupt Request 0 128 nextenum INT1_vect ; External Interrupt Request 1 129 nextenum INT2_vect ; External Interrupt Request 2 130 nextenum INT3_vect ; External Interrupt Request 3 131 nextenum INT4_vect ; External Interrupt Request 4 132 nextenum INT5_vect ; External Interrupt Request 5 133 nextenum INT6_vect ; External Interrupt Request 6 134 nextenum INT7_vect ; External Interrupt Request 7 135 nextenum PCINT0_vect ; Pin Change Interrupt Request 0 136 nextenum USB_GEN_vect ; USB General Interrupt Request 137 nextenum USB_COM_vect ; USB Endpoint Interrupt Request 138 nextenum WDT_vect ; Watchdog Time-out Interrupt 139 nextenum TIMER2_COMPA_vect ; Timer/Counter 2 Compare Match A 140 nextenum TIMER2_COMPB_vect ; Timer/Counter 2 Compare Match B 141 nextenum TIMER2_OVF_vect ; Timer/Counter 2 Overflow 142 nextenum TIMER1_CAPT_vect ; Timer/Counter 1 Capture 143 nextenum TIMER1_COMPA_vect ; Timer/Counter 1 Compare Match A 144 nextenum TIMER1_COMPB_vect ; Timer/Counter 1 Compare Match B 145 nextenum TIMER1_COMPC_vect ; Timer/Counter 1 Compare Match C 146 nextenum TIMER1_OVF_vect ; Timer/Counter 1 Overflow 147 nextenum TIMER0_COMPA_vect ; Timer/Counter 0 Compare Match A 148 nextenum TIMER0_COMPB_vect ; Timer/Counter 0 Compare Match B 149 nextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflow 150 nextenum SPI_STC_vect ; SPI Serial Transfer Complete 151 nextenum USART1_RX_vect ; USART1 Rx Complete 152 nextenum USART1_UDRE_vect ; USART1 Data Register Empty 153 nextenum USART1_TX_vect ; USART1 Tx Complete 154 nextenum ANALOG_COMP_vect ; Analog Comparator 155 nextenum ADC_vect ; ADC Conversion Complete 156 nextenum EE_READY_vect ; EEPROM Ready 157 nextenum TIMER3_CAPT_vect ; Timer/Counter 3 Capture 158 nextenum TIMER3_COMPA_vect ; Timer/Counter 3 Compare Match A 159 nextenum TIMER3_COMPB_vect ; Timer/Counter 3 Compare Match B 160 nextenum TIMER3_COMPC_vect ; Timer/Counter 3 Compare Match C 161 nextenum TIMER3_OVF_vect ; Timer/Counter 3 Overflow 162 nextenum TWI_vect ; Two-Wire Serial Interface 163 nextenum SPM_READY_vect ; Store Program Memory Ready 164 165;---------------------------------------------------------------------------- 166; External Interrupts 167 168EICRA sfr 0x69 ; External Interrupt Control Register A 169ISC00 avrbit EICRA,0 ; External Interrupt 0 Sense Control 170ISC01 avrbit EICRA,1 171ISC10 avrbit EICRA,2 ; External Interrupt 1 Sense Control 172ISC11 avrbit EICRA,3 173ISC20 avrbit EICRA,4 ; External Interrupt 2 Sense Control 174ISC21 avrbit EICRA,5 175ISC30 avrbit EICRA,6 ; External Interrupt 3 Sense Control 176ISC31 avrbit EICRA,7 177EICRB sfr 0x6a ; External Interrupt Control Register A 178ISC60 avrbit EICRB,4 ; External Interrupt 6 Sense Control 179ISC61 avrbit EICRB,5 180 181EIMSK port 0x1d ; External Interrupt Mask Register 182INT0 avrbit EIMSK,0 ; External Interrupt Request 0 Enable 183INT1 avrbit EIMSK,1 ; External Interrupt Request 1 Enable 184INT2 avrbit EIMSK,2 ; External Interrupt Request 2 Enable 185INT3 avrbit EIMSK,3 ; External Interrupt Request 3 Enable 186INT4 avrbit EIMSK,4 ; External Interrupt Request 4 Enable 187INT5 avrbit EIMSK,5 ; External Interrupt Request 5 Enable 188INT6 avrbit EIMSK,6 ; External Interrupt Request 6 Enable 189INT7 avrbit EIMSK,7 ; External Interrupt Request 7 Enable 190 191EIFR port 0x1c ; External Interrupt Flag Register 192INTF0 avrbit EIFR,0 ; External Interrupt 0 Occured 193INTF1 avrbit EIFR,1 ; External Interrupt 1 Occured 194INTF2 avrbit EIFR,2 ; External Interrupt 2 Occured 195INTF3 avrbit EIFR,3 ; External Interrupt 3 Occured 196INTF4 avrbit EIFR,4 ; External Interrupt 4 Occured 197INTF5 avrbit EIFR,5 ; External Interrupt 5 Occured 198INTF6 avrbit EIFR,6 ; External Interrupt 6 Occured 199INTF7 avrbit EIFR,7 ; External Interrupt 7 Occured 200 201;---------------------------------------------------------------------------- 202; Timers 203 204TCCR0A port 0x24 ; Timer/Counter 0 Control Register A 205WGM00 avrbit TCCR0A,0 ; Timer/Counter 0 Waveform Generation Mode 206WGM01 avrbit TCCR0A,1 207COM0B0 avrbit TCCR0A,4 ; Timer/Counter 0 Compare Match Output B Mode 208COM0B1 avrbit TCCR0A,5 209COM0A0 avrbit TCCR0A,6 ; Timer/Counter 0 Compare Match Output A Mode 210COM0A1 avrbit TCCR0A,7 211TCCR0B port 0x25 ; Timer/Counter 0 Control Register B 212CS00 avrbit TCCR0B,0 ; Clock Select 213CS01 avrbit TCCR0B,1 214CS02 avrbit TCCR0B,2 215WGM02 avrbit TCCR0B,3 216FOC0B avrbit TCCR0B,6 ; Timer/Counter 0 Force Output Compare Match B 217FOC0A avrbit TCCR0B,7 ; Timer/Counter 0 Force Output Compare Match A 218TCNT0 port 0x26 ; Timer/Counter 0 Value 219OCR0A port 0x27 ; Timer/Counter 0 Output Compare Register A 220OCR0B port 0x28 ; Timer/Counter 0 Output Compare Register B 221 222TCCR1A sfr 0x80 ; Timer/Counter 1 Control Register A 223WGM10 avrbit TCCR1A,0 ; Timer/Counter 1 Waveform Generation Mode 224WGM11 avrbit TCCR1A,1 225COM1C0 avrbit TCCR1A,2 ; Timer/Counter 1 Compare Mode C 226COM1C1 avrbit TCCR1A,3 227COM1B0 avrbit TCCR1A,4 ; Timer/Counter 1 Compare Mode B 228COM1B1 avrbit TCCR1A,5 229COM1A0 avrbit TCCR1A,6 ; Timer/Counter 1 Compare Mode A 230COM1A1 avrbit TCCR1A,7 231TCCR1B sfr 0x81 ; Timer/Counter 1 Control Register B 232CS10 avrbit TCCR1B,0 ; Timer/Counter 1 Prescaler Setting 233CS11 avrbit TCCR1B,1 234CS12 avrbit TCCR1B,2 235WGM12 avrbit TCCR1B,3 ; Timer/Counter 1 Waveform Generation Mode 236WGM13 avrbit TCCR1B,4 237ICES1 avrbit TCCR1B,6 ; Timer/Counter 1 Capture Slope Selection 238ICNC1 avrbit TCCR1B,7 ; Timer/Counter 1 Capture Noise Filter 239TCCR1C sfr 0x82 ; Timer/Counter 1 Control Register C 240FOC1C avrbit TCCR1C,5 ; Timer/Counter 1 Force Output Compare C 241FOC1B avrbit TCCR1C,6 ; Timer/Counter 1 Force Output Compare B 242FOC1A avrbit TCCR1C,7 ; Timer/Counter 1 Force Output Compare A 243TCNT1L sfr 0x84 ; Timer/Counter 1 Value LSB 244TCNT1H sfr 0x85 ; Timer/Counter 1 Value MSB 245OCR1AL sfr 0x88 ; Timer/Counter 1 Output Compare Value A LSB 246OCR1AH sfr 0x89 ; Timer/Counter 1 Output Compare Value A MSB 247OCR1BL sfr 0x8a ; Timer/Counter 1 Output Compare Value B LSB 248OCR1BH sfr 0x8b ; Timer/Counter 1 Output Compare Value B MSB 249OCR1CL sfr 0x8c ; Timer/Counter 1 Output Compare Value C LSB 250OCR1CH sfr 0x8d ; Timer/Counter 1 Output Compare Value C MSB 251ICR1L sfr 0x86 ; Timer/Counter 1 Input Capture Value LSB 252ICR1H sfr 0x87 ; Timer/Counter 1 Input Capture Value MSB 253 254TCCR2A sfr 0xb0 ; Timer/Counter 2 Control Register A 255WGM20 avrbit TCCR2A,0 ; Timer/Counter 2 Waveform Generation Mode 256WGM21 avrbit TCCR2A,1 257COM2B0 avrbit TCCR2A,4 ; Timer/Counter 2 Compare Mode B 258COM2B1 avrbit TCCR2A,5 259COM2A0 avrbit TCCR2A,6 ; Timer/Counter 2 Compare Mode A 260COM2A1 avrbit TCCR2A,7 261TCCR2B sfr 0xb1 ; Timer/Counter 2 Control Register B 262CS20 avrbit TCCR2B,0 ; Timer/Counter 2 Prescaler Setting 263CS21 avrbit TCCR2B,1 264CS22 avrbit TCCR2B,2 265WGM22 avrbit TCCR2B,3 266FOC2B avrbit TCCR2B,6 ; Timer/Counter 2 Force Output Compare B 267FOC2A avrbit TCCR2B,7 ; Timer/Counter 2 Force Output Compare A 268TCNT2 sfr 0xb2 ; Timer/Counter 2 Value 269OCR2A sfr 0xb3 ; Timer/Counter 2 Output Compare Value A 270OCR2B sfr 0xb4 ; Timer/Counter 2 Output Compare Value B 271 272TCCR3A sfr 0x90 ; Timer/Counter 3 Control Register A 273WGM30 avrbit TCCR3A,0 ; Timer/Counter 3 Waveform Generation Mode 274WGM31 avrbit TCCR3A,1 275COM3C0 avrbit TCCR3A,2 ; Timer/Counter 3 Compare Mode C 276COM3C1 avrbit TCCR3A,3 277COM3B0 avrbit TCCR3A,4 ; Timer/Counter 3 Compare Mode B 278COM3B1 avrbit TCCR3A,5 279COM3A0 avrbit TCCR3A,6 ; Timer/Counter 3 Compare Mode A 280COM3A1 avrbit TCCR3A,7 281TCCR3B sfr 0x91 ; Timer/Counter 3 Control Register B 282CS30 avrbit TCCR3B,0 ; Timer/Counter 3 Prescaler Setting 283CS31 avrbit TCCR3B,1 284CS32 avrbit TCCR3B,2 285WGM32 avrbit TCCR3B,3 ; Timer/Counter 3 Waveform Generation Mode 286WGM33 avrbit TCCR3B,4 287ICES3 avrbit TCCR3B,6 ; Timer/Counter 3 Capture Slope Selection 288ICNC3 avrbit TCCR3B,7 ; Timer/Counter 3 Capture Noise Filter 289TCCR3C sfr 0x92 ; Timer/Counter 3 Control Register C 290FOC3C avrbit TCCR3C,5 ; Timer/Counter 3 Force Output Compare C 291FOC3B avrbit TCCR3B,6 ; Timer/Counter 3 Force Output Compare B 292FOC3A avrbit TCCR3C,7 ; Timer/Counter 3 Force Output Compare A 293TCNT3L sfr 0x94 ; Timer/Counter 3 Value LSB 294TCNT3H sfr 0x95 ; Timer/Counter 3 Value MSB 295OCR3AL sfr 0x98 ; Timer/Counter 3 Output Compare Value A LSB 296OCR3AH sfr 0x99 ; Timer/Counter 3 Output Compare Value A MSB 297OCR3BL sfr 0x9a ; Timer/Counter 3 Output Compare Value B LSB 298OCR3BH sfr 0x9b ; Timer/Counter 3 Output Compare Value B MSB 299OCR3CL sfr 0x9c ; Timer/Counter 3 Output Compare Value C LSB 300OCR3CH sfr 0x9d ; Timer/Counter 3 Output Compare Value C MSB 301ICR3L sfr 0x96 ; Timer/Counter 3 Input Capture Value LSB 302ICR3H sfr 0x97 ; Timer/Counter 3 Input Capture Value MSB 303 304TIMSK0 sfr 0x6e ; Timer/Counter 0 Interrupt Mask Register 305TOIE0 avrbit TIMSK0,0 ; Timer/Counter 0 Overflow Interrupt Enable 306OCIE0A avrbit TIMSK0,1 ; Timer/Counter 1 Output Compare Interrupt Enable A 307OCIE0B avrbit TIMSK0,2 ; Timer/Counter 1 Output Compare Interrupt Enable B 308 309TIFR0 port 0x15 ; Timer/Counter 0 Interrupt Flag Register 310 311TIMSK1 sfr 0x6f ; Timer/Counter 1 Interrupt Mask Register 312TOIE1 avrbit TIMSK1,0 ; Timer/Counter 1 Overflow Interrupt Enable 313OCIE1A avrbit TIMSK1,1 ; Timer/Counter 1 Output Compare Interrupt Enable A 314OCIE1B avrbit TIMSK1,2 ; Timer/Counter 1 Output Compare Interrupt Enable B 315OCIE1C avrbit TIMSK1,3 ; Timer/Counter 1 Output Compare Interrupt Enable C 316ICIE1 avrbit TIMSK1,5 ; Timer/Counter 1 Input Capture Interrupt Enable 317 318TIFR1 port 0x16 ; Timer/Counter 1 Interrupt Flag Register 319 320TIMSK2 sfr 0x70 ; Timer/Counter 2 Interrupt Mask Register 321TOIE2 avrbit TIMSK2,0 ; Timer/Counter 2 Overflow Interrupt Enable 322OCIE2A avrbit TIMSK2,1 ; Timer/Counter 2 Output Compare Interrupt Enable A 323OCIE2B avrbit TIMSK2,2 ; Timer/Counter 2 Output Compare Interrupt Enable B 324 325TIFR2 port 0x17 ; Timer/Counter 2 Interrupt Flag Register 326 327TIMSK3 sfr 0x71 ; Timer/Counter 3 Interrupt Mask Register 328TOIE3 avrbit TIMSK3,0 ; Timer/Counter 3 Overflow Interrupt Enable 329OCIE3A avrbit TIMSK3,1 ; Timer/Counter 3 Output Compare Interrupt Enable A 330OCIE3B avrbit TIMSK3,2 ; Timer/Counter 3 Output Compare Interrupt Enable B 331OCIE3C avrbit TIMSK3,3 ; Timer/Counter 3 Output Compare Interrupt Enable C 332ICIE3 avrbit TIMSK3,5 ; Timer/Counter 3 Input Capture Interrupt Enable 333 334TIFR3 port 0x18 ; Timer/Counter 3 Interrupt Flag Register 335 336GTCCR port 0x23 ; General Timer/Counter Control Register 337PSRSYNC avrbit GTCCR,0 ; Prescaler Reset for Synchronous Timer/Counters 338PSRASY avrbit GTCCR,1 339TSM avrbit GTCCR,7 ; Timer/Counter Synchronization Mode 340 341ASSR sfr 0xb6 ; Asynchronous Status Register 342TCR2BUB avrbit ASSR,0 ; Timer/Counter Control Register2 Update Busy 343TCR2AUB avrbit ASSR,1 ; Timer/Counter Control Register2 Update Busy 344OCR2BUB avrbit ASSR,2 ; Output Compare Register2 Update Busy 345OCR2AUB avrbit ASSR,3 ; Output Compare Register2 Update Busy 346TCN2UB avrbit ASSR,4 ; Timer/Counter2 Update Busy 347AS2 avrbit ASSR,5 ; Asynchronous Timer/Counter 2 348EXCLK avrbit ASSR,6 ; Enable External Clock Input 349 350;---------------------------------------------------------------------------- 351; Watchdog Timer 352 353 include "wdme.inc" 354 355;---------------------------------------------------------------------------- 356; USART 357 358UDR1 sfr 0xce ; I/O Data Register 359 360UCSR1A sfr 0xc8 ; Control & Status Register A 361MPCM1 avrbit UCSR1A,0 ; Multi Processor Communication Mode 362U2X1 avrbit UCSR1A,1 ; Double Transmission Speed 363PE1 avrbit UCSR1A,2 ; Parity Error 364DOR1 avrbit UCSR1A,3 ; Overrun 365FE1 avrbit UCSR1A,4 ; Framing Error 366UDRE1 avrbit UCSR1A,5 ; Data Register Empty 367TXC1 avrbit UCSR1A,6 ; Transmit Complete 368RXC1 avrbit UCSR1A,7 ; Receive Complete 369 370UCSR1B sfr 0xc9 ; Control & Status Register B 371TXB81 avrbit UCSR1B,0 ; Transmit Bit 8 372RXB81 avrbit UCSR1B,1 ; Receive Bit 8 373UCSZ21 avrbit UCSR1B,2 ; Character Size 374TXEN1 avrbit UCSR1B,3 ; Enable Transmitter 375RXEN1 avrbit UCSR1B,4 ; Enable Receiver 376UDRIE1 avrbit UCSR1B,5 ; Enable Data Register Empty Interrupt 377TXCIE1 avrbit UCSR1B,6 ; Enable Transmit Complete Interrupt 378RXCIE1 avrbit UCSR1B,7 ; Enable Receive Complete Interrupt 379 380UCSR1C sfr 0xca ; Control & Status Register C 381UCPOL1 avrbit UCSR1C,0 ; Clock Polarity 382UCSZ10 avrbit UCSR1C,1 ; Character Size 383UCSZ11 avrbit UCSR1C,2 384USBS1 avrbit UCSR1C,3 ; Stop Bit Select 385UPM10 avrbit UCSR1C,4 ; Parity Mode : Odd/Even 386UPM11 avrbit UCSR1C,5 ; Parity Mode : Enable/Disable 387UMSEL10 avrbit UCSR1C,6 ; USART Mode Select 388UMSEL11 avrbit UCSR1C,7 389 390UBRR1H sfr 0xcc ; Baud Rate Register High 391UBRR1L sfr 0xcd ; Baud Rate Register Low 392 393;---------------------------------------------------------------------------- 394; SPI 395 396 include "spim2c.inc" 397 398;---------------------------------------------------------------------------- 399; TWI 400 401 include "twimb8.inc" 402 403;---------------------------------------------------------------------------- 404; Analog Comparator 405 406 include "acm30.inc" 407 408;---------------------------------------------------------------------------- 409; A/D Converter 410 411 include "adcm78.inc" 412 413MUX4 avrbit ADMUX,4 414 415ADHSM avrbit ADCSRB,7 ; A/D Converter High Speed Mode 416 417;---------------------------------------------------------------------------- 418; USB 419 420 include "usbm.inc" 421 422OTGPADE avrbit USBCON,4 ; VBUS Pad Enable 423HOST avrbit USBCON,2 ; Host Mode (conditional?) 424IDTE avrbit USBCON,1 ; ID Transition Interrupt Enable Bit 425VBUSTE avrbit USBCON,0 ; VBUS Transition Interrupt Enable Bit 426 427LSM avrbit UDCON,2 ; USB Device Low Speed Mode Selection 428 429EPRST5 avrbit UERST,5 ; Endpoint 5 FIFO Reset 430EPRST6 avrbit UERST,6 ; Endpoint 6 FIFO Reset 431 432EPINT5 avrbit UEINT,5 ; Endpoint Interrupts Bits 433EPINT6 avrbit UEINT,6 ; 434 435UHWCON sfr 0xd7 ; USB Hardware Control 436UVREGE avrbit UHWCON,0 ; USB Pad Regulator Enable 437UVCONE avrbit UHWCON,4 ; UVCON Pin Enable 438UIDE avrbit UHWCON,6 ; UID Pin Enable 439UIMOD avrbit UHWCON,7 ; USB Mode 440 441USBSTA sfr 0xd9 ; 442VBUS avrbit USBSTA,0 ; VBus Flag 443ID avrbit USBSTA,1 ; ID status 444SPEED avrbit USBSTA,3 ; Speed Status Flag 445 446USBINT sfr 0xda ; 447VBUSTI avrbit USBINT,0 ; IVBUS Transition Interrupt Flag 448IDTI avrbit USBINT,1 ; D Transition Interrupt Flag 449 450UEBCHX sfr 0xf3 ; Byte Count High 451 452 if __USBHOSTMODE ; only for variants with host/OTG mode 453 454UHCON sfr 0x9e ; USB Host Control 455SOFEN avrbit UHCON,0 ; Start Of Frame Generation Enable 456RESET avrbit UHCON,1 ; Send USB Reset 457RESUME avrbit UHCON,2 ; Send USB Resume 458 459UHINT sfr 0x9f ; USB Host Interrupt Status 460DCONNI avrbit UHINT,0 ; Device Connection Interrupt 461DDISCI avrbit UHINT,1 ; Device Disconnection Interrupt 462RSTI avrbit UHINT,2 ; USB Reset Sent Interrupt 463RSMEDI avrbit UHINT,3 ; Downstream Resume Sent Interrupt 464RXRSMI avrbit UHINT,4 ; Upstream Resume Received Interrupt 465HSOFI avrbit UHINT,5 ; Host Start Of Frame Interrupt 466HWUPI avrbit UHINT,6 ; Host Wake-Up Interrupt 467 468UHIEN sfr 0xa0 ; USB Host Interrupt Enable 469DCONNE avrbit UHIEN,0 ; Device Connection Interrupt Enable 470DDISCE avrbit UHIEN,1 ; Device Disconnection Interrupt Enable 471RSTE avrbit UHIEN,2 ; USB Reset Sent Interrupt Enable 472RSMEDE avrbit UHIEN,3 ; Downstream Resume Sent Interrupt Enable 473RXRSME avrbit UHIEN,4 ; Upstream Resume Received Interrupt Enable 474HSOFE avrbit UHIEN,5 ; Host Start Of frame Interrupt Enable 475HWUPE avrbit UHIEN,6 ; Host Wake-Up Interrupt Enable 476 477UHADDR sfr 0xa1 ; USB Host Address 478 479UHFNUML sfr 0xa2 ; USB Host Frame Number LSB 480 481UHFNUMH sfr 0xa3 ; USB Host Frame Number MSB 482 483UHFLEN sfr 0xa4 ; USB Host Frame Length 484 485UPINRQX sfr 0xa5 ; 486INRQ0 avrbit UPINRQX,0 ; IN Request Number Before Freeze 487INRQ1 avrbit UPINRQX,1 488INRQ2 avrbit UPINRQX,2 489INRQ3 avrbit UPINRQX,3 490INRQ4 avrbit UPINRQX,4 491INRQ5 avrbit UPINRQX,5 492INRQ6 avrbit UPINRQX,6 493INRQ7 avrbit UPINRQX,7 494 495UPINTX sfr 0xa6 ; USB Pipe Interrupt Status 496RXINI avrbit UPINTX,0 ; IN Data received 497RXSTALLI avrbit UPINTX,1 ; CRCERR - STALL Received / Isochronous CRC Error 498TXOUTI avrbit UPINTX,2 ; OUT Bank ready 499TXSTPI avrbit UPINTX,3 ; SETUP Bank ready 500PERRI avrbit UPINTX,4 ; PIPE Error 501PRWAL avrbit UPINTX,5 ; Read/Write Allowed (also as RWAL from UEINTX definition) 502PNAKEDI avrbit UPINTX,6 ; NAK Handshake received (also as NAKEDI from UEINTX definition) 503PFIFOCON avrbit UPINTX,7 ; FIFO Control 504 505UPNUM sfr 0xa7 ; USB Pipe Number 506PNUM0 avrbit UPNUM,0 ; Pipe Number 507PNUM1 avrbit UPNUM,1 508PNUM2 avrbit UPNUM,2 509 510UPRST sfr 0xa8 ; USB Pipe Reset 511P0RST avrbit UPRST,0 ; Pipe 0 Reset 512P1RST avrbit UPRST,1 ; Pipe 1 Reset 513P2RST avrbit UPRST,2 ; Pipe 2 Reset 514P3RST avrbit UPRST,3 ; Pipe 3 Reset 515P4RST avrbit UPRST,4 ; Pipe 4 Reset 516P5RST avrbit UPRST,5 ; Pipe 5 Reset 517P6RST avrbit UPRST,6 ; Pipe 6 Reset 518 519UPCONX sfr 0xa9 ; USB Pipe Config 520PEN avrbit UPCONX,0 ; Pipe Enable 521PRSTDT avrbit UPCONX,3 ; Reset Data Toggle (also RSTDT from UECONX definition) 522INMODE avrbit UPCONX,5 ; IN Request mode 523PFREEZE avrbit UPCONX,6 ; Pipe Freeze 524 525UPCFG0X sfr 0xaa ; USB Pipe Config 0 526PEPNUM0 avrbit UPCFG0X,0 ; Pipe Endpoint Number 527PEPNUM1 avrbit UPCFG0X,1 528PEPNUM2 avrbit UPCFG0X,2 529PEPNUM3 avrbit UPCFG0X,3 530PTOKEN0 avrbit UPCFG0X,4 ; Pipe Token 531PTOKEN1 avrbit UPCFG0X,5 532PTYPE0 avrbit UPCFG0X,6 ; Pipe Type 533PTYPE1 avrbit UPCFG0X,7 534 535UPCFG1X sfr 0xab ; USB Pipe Config 1 536PALLOC avrbit UPCFG1X,1 ; Configure Pipe Memory (also ALLOC from UECFG1X definition) 537PBK0 avrbit UPCFG1X,2 ; Pipe Bank 538PBK1 avrbit UPCFG1X,3 539PSIZE0 avrbit UPCFG1X,4 ; Pipe Size 540PSIZE1 avrbit UPCFG1X,5 541PSIZE2 avrbit UPCFG1X,6 542 543UPSTAX sfr 0xac ; USB Status 544PNBUSYBK0 avrbit UPSTAX,0 ; Busy Bank Flag (also NBUSYBK0/1 from UESTA0X definition) 545PNBUSYBK1 avrbit UPSTAX,1 546PDTSEQ0 avrbit UPSTAX,2 ; Toggle Sequencing Flag (also DTSEQ0/1 from UESTA0X definition) 547PDTSEQ1 avrbit UPSTAX,3 548PUNDERFI avrbit UPSTAX,5 ; Underflow (also UNDERFI from UESTA0X definition) 549POVERFI avrbit UPSTAX,6 ; Overflow (also OVERFI from UESTA0X definition) 550PCFGOK avrbit UPSTAX,7 ; Configure Pipe Memory OK (also CFGOK from UESTA0X definition) 551 552UPCFG2X sfr 0xad ; USB Pipe Config 2 553INTFRQ0 avrbit UPCFG2X,0 ; Interrupt Pipe Request Frequency 554INTFRQ1 avrbit UPCFG2X,1 555INTFRQ2 avrbit UPCFG2X,2 556INTFRQ3 avrbit UPCFG2X,3 557INTFRQ4 avrbit UPCFG2X,4 558INTFRQ5 avrbit UPCFG2X,5 559INTFRQ6 avrbit UPCFG2X,6 560INTFRQ7 avrbit UPCFG2X,7 561 562UPIENX sfr 0xae ; USB Pipe Interrupt Enable 563RXINE avrbit UPIENX,0 ; IN Data received Interrupt Enable 564RXSTALLE avrbit UPIENX,1 ; STALL Received Interrupt Enable 565TXOUTE avrbit UPIENX,2 ; OUT Bank ready Interrupt Enable 566TXSTPE avrbit UPIENX,3 ; SETUP Bank ready Interrupt Enable 567PERRE avrbit UPIENX,4 ; PIPE Error Interrupt Enable 568NAKEDE avrbit UPIENX,6 ; NAK Handshake Received Interrupt Enable 569PFLERRE avrbit UPIENX,7 ; Flow Error Interrupt enable (also FLERRE from UEIENX definition) 570 571UPDATX sfr 0xaf ; Pipe Data Bits 572 573UPERRX sfr 0xf5 ; USB Pipe Error Bits 574DATATGL avrbit UPERRX,0 ; Bad Data Toggle 575DATAPID avrbit UPERRX,1 ; Data PID Error 576PID avrbit UPERRX,2 ; PID Error 577TIMEOUT avrbit UPERRX,3 ; Time-out Error 578CRC16 avrbit UPERRX,4 ; CRC16 Error 579COUNTER0 avrbit UPERRX,5 ; Error counter 580COUNTER1 avrbit UPERRX,6 581 582UPBCLX sfr 0xf6 ; USB Pipe Byte Count LSB 583UPBCHX sfr 0xf7 ; USB Pipe Byte Count MSB 584 585UPINT sfr 0xf8 ; USB Pipe Interrupts 586PINT0 avrbit UPINT,0 ; Pipe Interrupts Bits 587PINT1 avrbit UPINT,1 588PINT2 avrbit UPINT,2 589PINT3 avrbit UPINT,3 590PINT4 avrbit UPINT,4 591PINT5 avrbit UPINT,5 592PINT6 avrbit UPINT,6 593 594OTGTCON sfr 0xf9 ; USB On-The-Go Configuration 595VALUE0 avrbit OTGTCON,0 ; Value Bit 596VALUE1 avrbit OTGTCON,1 597PAGE0 avrbit OTGTCON,5 ; Timer page access Bit 598PAGE1 avrbit OTGTCON,6 599 600OTGCON sfr 0xdd ; USB On-The-Go Control 601VBUSRQC avrbit OTGCON,0 ; VBUS Request Clear Bit 602VBUSREQ avrbit OTGCON,1 ; VBUS Request Bit 603VBUSHWC avrbit OTGCON,2 ; VBus Hardware Control Bit 604SRPSEL avrbit OTGCON,3 ; SRP Selection Bit 605SRPREQ avrbit OTGCON,4 ; SRP Request Bit 606HNPREQ avrbit OTGCON,5 ; HNP Request Bit 607 608OTGIEN sfr 0xde ; USB On-The-Go Interrupt Enable 609SRPE avrbit OTGIEN,0 ; SRP Interrupt Enable Bit 610VBERRE avrbit OTGIEN,1 ; VBus Error Interrupt Enable Bit 611BCERRE avrbit OTGIEN,2 ; B-Connection Error Interrupt Enable Bit 612ROLEEXE avrbit OTGIEN,3 ; Role Exchange Interrupt Enable Bit 613HNPERRE avrbit OTGIEN,4 ; HNP Error Interrupt Enable Bit 614STOE avrbit OTGIEN,5 ; Suspend Time-out Error Interrupt Enable Bit 615 616OTGINT sfr 0xdf ; USB On-The-Go Interrupt Status 617SRPI avrbit OTGINT,0 ; Suspend Time-out Error Interrupt Flag 618VBERRI avrbit OTGINT,1 ; HNP Error Interrupt Flag 619BCERRI avrbit OTGINT,2 ; Role Exchange Interrupt Flag 620ROLEEXI avrbit OTGINT,3 ; B-Connection Error Interrupt Flag 621HNPERRI avrbit OTGINT,4 ; V-Bus Error Interrupt Flag 622STOI avrbit OTGINT,5 ; SRP Interrupt Flag 623 624 endif ; __USBHOSTMODE 625 626 restore ; re-enable Listing 627 628 endif ; __regmxu6inc 629