1 /* Blackfin One-Time Programmable Memory (OTP) model 2 3 Copyright (C) 2010-2011 Free Software Foundation, Inc. 4 Contributed by Analog Devices, Inc. 5 6 This file is part of simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 #ifndef DV_BFIN_OTP_H 22 #define DV_BFIN_OTP_H 23 24 /* XXX: This should be pushed into the model data. */ 25 /* XXX: Not exactly true; it's two sets of 4 regs near each other: 26 0xFFC03600 0x10 - Control 27 0xFFC03680 0x10 - Data */ 28 #define BFIN_MMR_OTP_SIZE 0xa0 29 30 /* OTP Defined Pages. */ 31 #define FPS00 0x004 32 #define FPS01 0x005 33 #define FPS02 0x006 34 #define FPS03 0x007 35 #define FPS04 0x008 36 #define FPS05 0x009 37 #define FPS06 0x00A 38 #define FPS07 0x00B 39 #define FPS08 0x00C 40 #define FPS09 0x00D 41 #define FPS10 0x00E 42 #define FPS11 0x00F 43 #define CPS00 0x010 44 #define CPS01 0x011 45 #define CPS02 0x012 46 #define CPS03 0x013 47 #define CPS04 0x014 48 #define CPS05 0x015 49 #define CPS06 0x016 50 #define CPS07 0x017 51 #define PBS00 0x018 52 #define PBS01 0x019 53 #define PBS02 0x01A 54 #define PBS03 0x01B 55 #define PUB000 0x01C 56 #define PUBCRC000 0x0E0 57 #define PRIV000 0x110 58 #define PRIVCRC000 0x1E0 59 60 /* FPS03 Part values. */ 61 #define FPS03_BF51XF(n) (FPS03_BF##n | 0xF000) 62 #define FPS03_BF512 0x0200 63 #define FPS03_BF512F FPS03_BF51XF(512) 64 #define FPS03_BF514 0x0202 65 #define FPS03_BF514F FPS03_BF51XF(514) 66 #define FPS03_BF516 0x0204 67 #define FPS03_BF516F FPS03_BF51XF(516) 68 #define FPS03_BF518 0x0206 69 #define FPS03_BF518F FPS03_BF51XF(518) 70 #define FPS03_BF52X_C1(n) (FPS03_BF##n | 0x8000) 71 #define FPS03_BF52X_C2(n) (FPS03_BF##n | 0x4000) 72 #define FPS03_BF522 0x020A 73 #define FPS03_BF522_C1 FPS03_BF52X_C1(522) 74 #define FPS03_BF522_C2 FPS03_BF52X_C2(522) 75 #define FPS03_BF523 0x020B 76 #define FPS03_BF523_C1 FPS03_BF52X_C1(523) 77 #define FPS03_BF523_C2 FPS03_BF52X_C2(523) 78 #define FPS03_BF524 0x020C 79 #define FPS03_BF524_C1 FPS03_BF52X_C1(524) 80 #define FPS03_BF524_C2 FPS03_BF52X_C2(524) 81 #define FPS03_BF525 0x020D 82 #define FPS03_BF525_C1 FPS03_BF52X_C1(525) 83 #define FPS03_BF525_C2 FPS03_BF52X_C2(525) 84 #define FPS03_BF526 0x020E 85 #define FPS03_BF526_C1 FPS03_BF52X_C1(526) 86 #define FPS03_BF526_C2 FPS03_BF52X_C2(526) 87 #define FPS03_BF527 0x020F 88 #define FPS03_BF527_C1 FPS03_BF52X_C1(527) 89 #define FPS03_BF527_C2 FPS03_BF52X_C2(527) 90 91 /* OTP_CONTROL masks. */ 92 #define PAGE_ADDR (0x1FF) 93 #define DO_READ (1 << 14) 94 #define DO_WRITE (1 << 15) 95 96 /* OTP_STATUS masks. */ 97 #define STATUS_DONE (1 << 0) 98 #define STATUS_ERR (1 << 1) 99 100 #endif 101