1 /* gdb-if.c -- sim interface to GDB.
2
3 Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
5
6 This file is part of the GNU simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #include <stdio.h>
23 #include <assert.h>
24 #include <signal.h>
25 #include <string.h>
26 #include <ctype.h>
27 #include <stdlib.h>
28
29 #include "ansidecl.h"
30 #include "gdb/callback.h"
31 #include "gdb/remote-sim.h"
32 #include "gdb/signals.h"
33 #include "gdb/sim-rx.h"
34
35 #include "cpu.h"
36 #include "mem.h"
37 #include "load.h"
38 #include "syscalls.h"
39 #include "err.h"
40 #include "trace.h"
41
42 /* Ideally, we'd wrap up all the minisim's data structures in an
43 object and pass that around. However, neither GDB nor run needs
44 that ability.
45
46 So we just have one instance, that lives in global variables, and
47 each time we open it, we re-initialize it. */
48 struct sim_state
49 {
50 const char *message;
51 };
52
53 static struct sim_state the_minisim = {
54 "This is the sole rx minisim instance. See libsim.a's global variables."
55 };
56
57 static int open;
58
59 SIM_DESC
sim_open(SIM_OPEN_KIND kind,struct host_callback_struct * callback,struct bfd * abfd,char ** argv)60 sim_open (SIM_OPEN_KIND kind,
61 struct host_callback_struct *callback,
62 struct bfd *abfd, char **argv)
63 {
64 if (open)
65 fprintf (stderr, "rx minisim: re-opened sim\n");
66
67 /* The 'run' interface doesn't use this function, so we don't care
68 about KIND; it's always SIM_OPEN_DEBUG. */
69 if (kind != SIM_OPEN_DEBUG)
70 fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
71 kind);
72
73 set_callbacks (callback);
74
75 /* We don't expect any command-line arguments. */
76
77 init_mem ();
78 init_regs ();
79 execution_error_init_debugger ();
80
81 sim_disasm_init (abfd);
82 open = 1;
83 return &the_minisim;
84 }
85
86 static void
check_desc(SIM_DESC sd)87 check_desc (SIM_DESC sd)
88 {
89 if (sd != &the_minisim)
90 fprintf (stderr, "rx minisim: desc != &the_minisim\n");
91 }
92
93 void
sim_close(SIM_DESC sd,int quitting)94 sim_close (SIM_DESC sd, int quitting)
95 {
96 check_desc (sd);
97
98 /* Not much to do. At least free up our memory. */
99 init_mem ();
100
101 open = 0;
102 }
103
104 static bfd *
open_objfile(const char * filename)105 open_objfile (const char *filename)
106 {
107 bfd *prog = bfd_openr (filename, 0);
108
109 if (!prog)
110 {
111 fprintf (stderr, "Can't read %s\n", filename);
112 return 0;
113 }
114
115 if (!bfd_check_format (prog, bfd_object))
116 {
117 fprintf (stderr, "%s not a rx program\n", filename);
118 return 0;
119 }
120
121 return prog;
122 }
123
124 static struct swap_list
125 {
126 bfd_vma start, end;
127 struct swap_list *next;
128 } *swap_list = NULL;
129
130 static void
free_swap_list(void)131 free_swap_list (void)
132 {
133 while (swap_list)
134 {
135 struct swap_list *next = swap_list->next;
136 free (swap_list);
137 swap_list = next;
138 }
139 }
140
141 /* When running in big endian mode, we must do an additional
142 byte swap of memory areas used to hold instructions. See
143 the comment preceding rx_load in load.c to see why this is
144 so.
145
146 Construct a list of memory areas that must be byte swapped.
147 This list will be consulted when either reading or writing
148 memory. */
149
150 static void
build_swap_list(struct bfd * abfd)151 build_swap_list (struct bfd *abfd)
152 {
153 asection *s;
154 free_swap_list ();
155
156 /* Nothing to do when in little endian mode. */
157 if (!rx_big_endian)
158 return;
159
160 for (s = abfd->sections; s; s = s->next)
161 {
162 if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
163 {
164 struct swap_list *sl;
165 bfd_size_type size;
166
167 size = bfd_get_section_size (s);
168 if (size <= 0)
169 continue;
170
171 sl = malloc (sizeof (struct swap_list));
172 assert (sl != NULL);
173 sl->next = swap_list;
174 sl->start = bfd_section_lma (abfd, s);
175 sl->end = sl->start + size;
176 swap_list = sl;
177 }
178 }
179 }
180
181 static int
addr_in_swap_list(bfd_vma addr)182 addr_in_swap_list (bfd_vma addr)
183 {
184 struct swap_list *s;
185
186 for (s = swap_list; s; s = s->next)
187 {
188 if (s->start <= addr && addr < s->end)
189 return 1;
190 }
191 return 0;
192 }
193
194 SIM_RC
sim_load(SIM_DESC sd,char * prog,struct bfd * abfd,int from_tty)195 sim_load (SIM_DESC sd, char *prog, struct bfd *abfd, int from_tty)
196 {
197 check_desc (sd);
198
199 if (!abfd)
200 abfd = open_objfile (prog);
201 if (!abfd)
202 return SIM_RC_FAIL;
203
204 rx_load (abfd);
205 build_swap_list (abfd);
206
207 return SIM_RC_OK;
208 }
209
210 SIM_RC
sim_create_inferior(SIM_DESC sd,struct bfd * abfd,char ** argv,char ** env)211 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char **argv, char **env)
212 {
213 check_desc (sd);
214
215 if (abfd)
216 {
217 rx_load (abfd);
218 build_swap_list (abfd);
219 }
220
221 return SIM_RC_OK;
222 }
223
224 int
sim_read(SIM_DESC sd,SIM_ADDR mem,unsigned char * buf,int length)225 sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
226 {
227 int i;
228
229 check_desc (sd);
230
231 if (mem == 0)
232 return 0;
233
234 execution_error_clear_last_error ();
235
236 for (i = 0; i < length; i++)
237 {
238 bfd_vma addr = mem + i;
239 int do_swap = addr_in_swap_list (addr);
240 buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
241
242 if (execution_error_get_last_error () != SIM_ERR_NONE)
243 return i;
244 }
245
246 return length;
247 }
248
249 int
sim_write(SIM_DESC sd,SIM_ADDR mem,const unsigned char * buf,int length)250 sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
251 {
252 int i;
253
254 check_desc (sd);
255
256 execution_error_clear_last_error ();
257
258 for (i = 0; i < length; i++)
259 {
260 bfd_vma addr = mem + i;
261 int do_swap = addr_in_swap_list (addr);
262 mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
263
264 if (execution_error_get_last_error () != SIM_ERR_NONE)
265 return i;
266 }
267
268 return length;
269 }
270
271 /* Read the LENGTH bytes at BUF as an little-endian value. */
272 static DI
get_le(unsigned char * buf,int length)273 get_le (unsigned char *buf, int length)
274 {
275 DI acc = 0;
276 while (--length >= 0)
277 acc = (acc << 8) + buf[length];
278
279 return acc;
280 }
281
282 /* Read the LENGTH bytes at BUF as a big-endian value. */
283 static DI
get_be(unsigned char * buf,int length)284 get_be (unsigned char *buf, int length)
285 {
286 DI acc = 0;
287 while (length-- > 0)
288 acc = (acc << 8) + *buf++;
289
290 return acc;
291 }
292
293 /* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
294 static void
put_le(unsigned char * buf,int length,DI val)295 put_le (unsigned char *buf, int length, DI val)
296 {
297 int i;
298
299 for (i = 0; i < length; i++)
300 {
301 buf[i] = val & 0xff;
302 val >>= 8;
303 }
304 }
305
306 /* Store VAL as a big-endian value in the LENGTH bytes at BUF. */
307 static void
put_be(unsigned char * buf,int length,DI val)308 put_be (unsigned char *buf, int length, DI val)
309 {
310 int i;
311
312 for (i = length-1; i >= 0; i--)
313 {
314 buf[i] = val & 0xff;
315 val >>= 8;
316 }
317 }
318
319
320 static int
check_regno(enum sim_rx_regnum regno)321 check_regno (enum sim_rx_regnum regno)
322 {
323 return 0 <= regno && regno < sim_rx_num_regs;
324 }
325
326 static size_t
reg_size(enum sim_rx_regnum regno)327 reg_size (enum sim_rx_regnum regno)
328 {
329 size_t size;
330
331 switch (regno)
332 {
333 case sim_rx_r0_regnum:
334 size = sizeof (regs.r[0]);
335 break;
336 case sim_rx_r1_regnum:
337 size = sizeof (regs.r[1]);
338 break;
339 case sim_rx_r2_regnum:
340 size = sizeof (regs.r[2]);
341 break;
342 case sim_rx_r3_regnum:
343 size = sizeof (regs.r[3]);
344 break;
345 case sim_rx_r4_regnum:
346 size = sizeof (regs.r[4]);
347 break;
348 case sim_rx_r5_regnum:
349 size = sizeof (regs.r[5]);
350 break;
351 case sim_rx_r6_regnum:
352 size = sizeof (regs.r[6]);
353 break;
354 case sim_rx_r7_regnum:
355 size = sizeof (regs.r[7]);
356 break;
357 case sim_rx_r8_regnum:
358 size = sizeof (regs.r[8]);
359 break;
360 case sim_rx_r9_regnum:
361 size = sizeof (regs.r[9]);
362 break;
363 case sim_rx_r10_regnum:
364 size = sizeof (regs.r[10]);
365 break;
366 case sim_rx_r11_regnum:
367 size = sizeof (regs.r[11]);
368 break;
369 case sim_rx_r12_regnum:
370 size = sizeof (regs.r[12]);
371 break;
372 case sim_rx_r13_regnum:
373 size = sizeof (regs.r[13]);
374 break;
375 case sim_rx_r14_regnum:
376 size = sizeof (regs.r[14]);
377 break;
378 case sim_rx_r15_regnum:
379 size = sizeof (regs.r[15]);
380 break;
381 case sim_rx_isp_regnum:
382 size = sizeof (regs.r_isp);
383 break;
384 case sim_rx_usp_regnum:
385 size = sizeof (regs.r_usp);
386 break;
387 case sim_rx_intb_regnum:
388 size = sizeof (regs.r_intb);
389 break;
390 case sim_rx_pc_regnum:
391 size = sizeof (regs.r_pc);
392 break;
393 case sim_rx_ps_regnum:
394 size = sizeof (regs.r_psw);
395 break;
396 case sim_rx_bpc_regnum:
397 size = sizeof (regs.r_bpc);
398 break;
399 case sim_rx_bpsw_regnum:
400 size = sizeof (regs.r_bpsw);
401 break;
402 case sim_rx_fintv_regnum:
403 size = sizeof (regs.r_fintv);
404 break;
405 case sim_rx_fpsw_regnum:
406 size = sizeof (regs.r_fpsw);
407 break;
408 case sim_rx_acc_regnum:
409 size = sizeof (regs.r_acc);
410 break;
411 default:
412 size = 0;
413 break;
414 }
415 return size;
416 }
417
418 int
sim_fetch_register(SIM_DESC sd,int regno,unsigned char * buf,int length)419 sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
420 {
421 size_t size;
422 DI val;
423
424 check_desc (sd);
425
426 if (!check_regno (regno))
427 return 0;
428
429 size = reg_size (regno);
430
431 if (length != size)
432 return 0;
433
434 switch (regno)
435 {
436 case sim_rx_r0_regnum:
437 val = get_reg (0);
438 break;
439 case sim_rx_r1_regnum:
440 val = get_reg (1);
441 break;
442 case sim_rx_r2_regnum:
443 val = get_reg (2);
444 break;
445 case sim_rx_r3_regnum:
446 val = get_reg (3);
447 break;
448 case sim_rx_r4_regnum:
449 val = get_reg (4);
450 break;
451 case sim_rx_r5_regnum:
452 val = get_reg (5);
453 break;
454 case sim_rx_r6_regnum:
455 val = get_reg (6);
456 break;
457 case sim_rx_r7_regnum:
458 val = get_reg (7);
459 break;
460 case sim_rx_r8_regnum:
461 val = get_reg (8);
462 break;
463 case sim_rx_r9_regnum:
464 val = get_reg (9);
465 break;
466 case sim_rx_r10_regnum:
467 val = get_reg (10);
468 break;
469 case sim_rx_r11_regnum:
470 val = get_reg (11);
471 break;
472 case sim_rx_r12_regnum:
473 val = get_reg (12);
474 break;
475 case sim_rx_r13_regnum:
476 val = get_reg (13);
477 break;
478 case sim_rx_r14_regnum:
479 val = get_reg (14);
480 break;
481 case sim_rx_r15_regnum:
482 val = get_reg (15);
483 break;
484 case sim_rx_isp_regnum:
485 val = get_reg (isp);
486 break;
487 case sim_rx_usp_regnum:
488 val = get_reg (usp);
489 break;
490 case sim_rx_intb_regnum:
491 val = get_reg (intb);
492 break;
493 case sim_rx_pc_regnum:
494 val = get_reg (pc);
495 break;
496 case sim_rx_ps_regnum:
497 val = get_reg (psw);
498 break;
499 case sim_rx_bpc_regnum:
500 val = get_reg (bpc);
501 break;
502 case sim_rx_bpsw_regnum:
503 val = get_reg (bpsw);
504 break;
505 case sim_rx_fintv_regnum:
506 val = get_reg (fintv);
507 break;
508 case sim_rx_fpsw_regnum:
509 val = get_reg (fpsw);
510 break;
511 case sim_rx_acc_regnum:
512 val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
513 break;
514 default:
515 fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
516 regno);
517 return -1;
518 }
519
520 if (rx_big_endian)
521 put_be (buf, length, val);
522 else
523 put_le (buf, length, val);
524
525 return size;
526 }
527
528 int
sim_store_register(SIM_DESC sd,int regno,unsigned char * buf,int length)529 sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
530 {
531 size_t size;
532 DI val;
533
534 check_desc (sd);
535
536 if (!check_regno (regno))
537 return -1;
538
539 size = reg_size (regno);
540
541 if (length != size)
542 return -1;
543
544 if (rx_big_endian)
545 val = get_be (buf, length);
546 else
547 val = get_le (buf, length);
548
549 switch (regno)
550 {
551 case sim_rx_r0_regnum:
552 put_reg (0, val);
553 break;
554 case sim_rx_r1_regnum:
555 put_reg (1, val);
556 break;
557 case sim_rx_r2_regnum:
558 put_reg (2, val);
559 break;
560 case sim_rx_r3_regnum:
561 put_reg (3, val);
562 break;
563 case sim_rx_r4_regnum:
564 put_reg (4, val);
565 break;
566 case sim_rx_r5_regnum:
567 put_reg (5, val);
568 break;
569 case sim_rx_r6_regnum:
570 put_reg (6, val);
571 break;
572 case sim_rx_r7_regnum:
573 put_reg (7, val);
574 break;
575 case sim_rx_r8_regnum:
576 put_reg (8, val);
577 break;
578 case sim_rx_r9_regnum:
579 put_reg (9, val);
580 break;
581 case sim_rx_r10_regnum:
582 put_reg (10, val);
583 break;
584 case sim_rx_r11_regnum:
585 put_reg (11, val);
586 break;
587 case sim_rx_r12_regnum:
588 put_reg (12, val);
589 break;
590 case sim_rx_r13_regnum:
591 put_reg (13, val);
592 break;
593 case sim_rx_r14_regnum:
594 put_reg (14, val);
595 break;
596 case sim_rx_r15_regnum:
597 put_reg (15, val);
598 break;
599 case sim_rx_isp_regnum:
600 put_reg (isp, val);
601 break;
602 case sim_rx_usp_regnum:
603 put_reg (usp, val);
604 break;
605 case sim_rx_intb_regnum:
606 put_reg (intb, val);
607 break;
608 case sim_rx_pc_regnum:
609 put_reg (pc, val);
610 break;
611 case sim_rx_ps_regnum:
612 put_reg (psw, val);
613 break;
614 case sim_rx_bpc_regnum:
615 put_reg (bpc, val);
616 break;
617 case sim_rx_bpsw_regnum:
618 put_reg (bpsw, val);
619 break;
620 case sim_rx_fintv_regnum:
621 put_reg (fintv, val);
622 break;
623 case sim_rx_fpsw_regnum:
624 put_reg (fpsw, val);
625 break;
626 case sim_rx_acc_regnum:
627 put_reg (acclo, val & 0xffffffff);
628 put_reg (acchi, (val >> 32) & 0xffffffff);
629 break;
630 default:
631 fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
632 regno);
633 return 0;
634 }
635
636 return size;
637 }
638
639 void
sim_info(SIM_DESC sd,int verbose)640 sim_info (SIM_DESC sd, int verbose)
641 {
642 check_desc (sd);
643
644 printf ("The rx minisim doesn't collect any statistics.\n");
645 }
646
647 static volatile int stop;
648 static enum sim_stop reason;
649 int siggnal;
650
651
652 /* Given a signal number used by the RX bsp (that is, newlib),
653 return a host signal number. (Oddly, the gdb/sim interface uses
654 host signal numbers...) */
655 int
rx_signal_to_host(int rx)656 rx_signal_to_host (int rx)
657 {
658 switch (rx)
659 {
660 case 4:
661 #ifdef SIGILL
662 return SIGILL;
663 #else
664 return SIGSEGV;
665 #endif
666
667 case 5:
668 return SIGTRAP;
669
670 case 10:
671 #ifdef SIGBUS
672 return SIGBUS;
673 #else
674 return SIGSEGV;
675 #endif
676
677 case 11:
678 return SIGSEGV;
679
680 case 24:
681 #ifdef SIGXCPU
682 return SIGXCPU;
683 #else
684 break;
685 #endif
686
687 case 2:
688 return SIGINT;
689
690 case 8:
691 #ifdef SIGFPE
692 return SIGFPE;
693 #else
694 break;
695 #endif
696
697 case 6:
698 return SIGABRT;
699 }
700
701 return 0;
702 }
703
704
705 /* Take a step return code RC and set up the variables consulted by
706 sim_stop_reason appropriately. */
707 void
handle_step(int rc)708 handle_step (int rc)
709 {
710 if (execution_error_get_last_error () != SIM_ERR_NONE)
711 {
712 reason = sim_stopped;
713 siggnal = TARGET_SIGNAL_SEGV;
714 }
715 if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
716 {
717 reason = sim_stopped;
718 siggnal = TARGET_SIGNAL_TRAP;
719 }
720 else if (RX_STOPPED (rc))
721 {
722 reason = sim_stopped;
723 siggnal = rx_signal_to_host (RX_STOP_SIG (rc));
724 }
725 else
726 {
727 assert (RX_EXITED (rc));
728 reason = sim_exited;
729 siggnal = RX_EXIT_STATUS (rc);
730 }
731 }
732
733
734 void
sim_resume(SIM_DESC sd,int step,int sig_to_deliver)735 sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
736 {
737 int rc;
738
739 check_desc (sd);
740
741 if (sig_to_deliver != 0)
742 {
743 fprintf (stderr,
744 "Warning: the rx minisim does not implement "
745 "signal delivery yet.\n" "Resuming with no signal.\n");
746 }
747
748 execution_error_clear_last_error ();
749
750 if (step)
751 {
752 rc = setjmp (decode_jmp_buf);
753 if (rc == 0)
754 rc = decode_opcode ();
755 handle_step (rc);
756 }
757 else
758 {
759 /* We don't clear 'stop' here, because then we would miss
760 interrupts that arrived on the way here. Instead, we clear
761 the flag in sim_stop_reason, after GDB has disabled the
762 interrupt signal handler. */
763 for (;;)
764 {
765 if (stop)
766 {
767 stop = 0;
768 reason = sim_stopped;
769 siggnal = TARGET_SIGNAL_INT;
770 break;
771 }
772
773 rc = setjmp (decode_jmp_buf);
774 if (rc == 0)
775 rc = decode_opcode ();
776
777 if (execution_error_get_last_error () != SIM_ERR_NONE)
778 {
779 reason = sim_stopped;
780 siggnal = TARGET_SIGNAL_SEGV;
781 break;
782 }
783
784 if (!RX_STEPPED (rc))
785 {
786 handle_step (rc);
787 break;
788 }
789 }
790 }
791 }
792
793 int
sim_stop(SIM_DESC sd)794 sim_stop (SIM_DESC sd)
795 {
796 stop = 1;
797
798 return 1;
799 }
800
801 void
sim_stop_reason(SIM_DESC sd,enum sim_stop * reason_p,int * sigrc_p)802 sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
803 {
804 check_desc (sd);
805
806 *reason_p = reason;
807 *sigrc_p = siggnal;
808 }
809
810 void
sim_do_command(SIM_DESC sd,char * cmd)811 sim_do_command (SIM_DESC sd, char *cmd)
812 {
813 check_desc (sd);
814
815 char *p = cmd;
816
817 /* Skip leading whitespace. */
818 while (isspace (*p))
819 p++;
820
821 /* Find the extent of the command word. */
822 for (p = cmd; *p; p++)
823 if (isspace (*p))
824 break;
825
826 /* Null-terminate the command word, and record the start of any
827 further arguments. */
828 char *args;
829 if (*p)
830 {
831 *p = '\0';
832 args = p + 1;
833 while (isspace (*args))
834 args++;
835 }
836 else
837 args = p;
838
839 if (strcmp (cmd, "trace") == 0)
840 {
841 if (strcmp (args, "on") == 0)
842 trace = 1;
843 else if (strcmp (args, "off") == 0)
844 trace = 0;
845 else
846 printf ("The 'sim trace' command expects 'on' or 'off' "
847 "as an argument.\n");
848 }
849 else if (strcmp (cmd, "verbose") == 0)
850 {
851 if (strcmp (args, "on") == 0)
852 verbose = 1;
853 else if (strcmp (args, "noisy") == 0)
854 verbose = 2;
855 else if (strcmp (args, "off") == 0)
856 verbose = 0;
857 else
858 printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'"
859 " as an argument.\n");
860 }
861 else
862 printf ("The 'sim' command expects either 'trace' or 'verbose'"
863 " as a subcommand.\n");
864 }
865