1 /* Native support for the SGI Iris running IRIX version 5, for GDB.
2 
3    Copyright (C) 1988-2013 Free Software Foundation, Inc.
4 
5    Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU
6    and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin.
7    Implemented for Irix 4.x by Garrett A. Wollman.
8    Modified for Irix 5.x by Ian Lance Taylor.
9 
10    This file is part of GDB.
11 
12    This program is free software; you can redistribute it and/or modify
13    it under the terms of the GNU General Public License as published by
14    the Free Software Foundation; either version 3 of the License, or
15    (at your option) any later version.
16 
17    This program is distributed in the hope that it will be useful,
18    but WITHOUT ANY WARRANTY; without even the implied warranty of
19    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20    GNU General Public License for more details.
21 
22    You should have received a copy of the GNU General Public License
23    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
24 
25 #include "defs.h"
26 #include "inferior.h"
27 #include "gdbcore.h"
28 #include "target.h"
29 #include "regcache.h"
30 #include "procfs.h"
31 
32 #include "gdb_string.h"
33 #include <sys/time.h>
34 #include <sys/procfs.h>
35 #include <setjmp.h>		/* For JB_XXX.  */
36 
37 /* Prototypes for supply_gregset etc.  */
38 #include "gregset.h"
39 #include "mips-tdep.h"
40 
41 static void fetch_core_registers (struct regcache *, char *,
42 				  unsigned int, int, CORE_ADDR);
43 
44 
45 /*
46  * See the comment in m68k-tdep.c regarding the utility of these functions.
47  *
48  * These definitions are from the MIPS SVR4 ABI, so they may work for
49  * any MIPS SVR4 target.
50  */
51 
52 void
supply_gregset(struct regcache * regcache,const gregset_t * gregsetp)53 supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
54 {
55   int regi;
56   const greg_t *regp = &(*gregsetp)[0];
57   struct gdbarch *gdbarch = get_regcache_arch (regcache);
58   int gregoff = sizeof (greg_t) - mips_isa_regsize (gdbarch);
59   static char zerobuf[32] = {0};
60 
61   for (regi = 0; regi <= CTX_RA; regi++)
62     regcache_raw_supply (regcache, regi,
63 			 (const char *) (regp + regi) + gregoff);
64 
65   regcache_raw_supply (regcache, mips_regnum (gdbarch)->pc,
66 		       (const char *) (regp + CTX_EPC) + gregoff);
67   regcache_raw_supply (regcache, mips_regnum (gdbarch)->hi,
68 		       (const char *) (regp + CTX_MDHI) + gregoff);
69   regcache_raw_supply (regcache, mips_regnum (gdbarch)->lo,
70 		       (const char *) (regp + CTX_MDLO) + gregoff);
71   regcache_raw_supply (regcache, mips_regnum (gdbarch)->cause,
72 		       (const char *) (regp + CTX_CAUSE) + gregoff);
73 
74   /* Fill inaccessible registers with zero.  */
75   regcache_raw_supply (regcache, mips_regnum (gdbarch)->badvaddr, zerobuf);
76 }
77 
78 void
fill_gregset(const struct regcache * regcache,gregset_t * gregsetp,int regno)79 fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
80 {
81   int regi, size;
82   greg_t *regp = &(*gregsetp)[0];
83   gdb_byte buf[MAX_REGISTER_SIZE];
84   struct gdbarch *gdbarch = get_regcache_arch (regcache);
85   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
86 
87   /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32
88      executable, we have to sign extend the registers to 64 bits before
89      filling in the gregset structure.  */
90 
91   for (regi = 0; regi <= CTX_RA; regi++)
92     if ((regno == -1) || (regno == regi))
93       {
94 	size = register_size (gdbarch, regi);
95 	regcache_raw_collect (regcache, regi, buf);
96 	*(regp + regi) = extract_signed_integer (buf, size, byte_order);
97       }
98 
99   if ((regno == -1) || (regno == mips_regnum (gdbarch)->pc))
100     {
101       regi = mips_regnum (gdbarch)->pc;
102       size = register_size (gdbarch, regi);
103       regcache_raw_collect (regcache, regi, buf);
104       *(regp + CTX_EPC) = extract_signed_integer (buf, size, byte_order);
105     }
106 
107   if ((regno == -1) || (regno == mips_regnum (gdbarch)->cause))
108     {
109       regi = mips_regnum (gdbarch)->cause;
110       size = register_size (gdbarch, regi);
111       regcache_raw_collect (regcache, regi, buf);
112       *(regp + CTX_CAUSE) = extract_signed_integer (buf, size, byte_order);
113     }
114 
115   if ((regno == -1) || (regno == mips_regnum (gdbarch)->hi))
116     {
117       regi = mips_regnum (gdbarch)->hi;
118       size = register_size (gdbarch, regi);
119       regcache_raw_collect (regcache, regi, buf);
120       *(regp + CTX_MDHI) = extract_signed_integer (buf, size, byte_order);
121     }
122 
123   if ((regno == -1) || (regno == mips_regnum (gdbarch)->lo))
124     {
125       regi = mips_regnum (gdbarch)->lo;
126       size = register_size (gdbarch, regi);
127       regcache_raw_collect (regcache, regi, buf);
128       *(regp + CTX_MDLO) = extract_signed_integer (buf, size, byte_order);
129     }
130 }
131 
132 /*
133  * Now we do the same thing for floating-point registers.
134  * We don't bother to condition on gdbarch_fp0_regnum since any
135  * reasonable MIPS configuration has an R3010 in it.
136  *
137  * Again, see the comments in m68k-tdep.c.
138  */
139 
140 void
supply_fpregset(struct regcache * regcache,const fpregset_t * fpregsetp)141 supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
142 {
143   int regi;
144   static char zerobuf[32] = {0};
145   char fsrbuf[8];
146   struct gdbarch *gdbarch = get_regcache_arch (regcache);
147 
148   /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs.  */
149 
150   for (regi = 0; regi < 32; regi++)
151     regcache_raw_supply (regcache, gdbarch_fp0_regnum (gdbarch) + regi,
152 			 (const char *) &fpregsetp->__fp_r.__fp_regs[regi]);
153 
154   /* We can't supply the FSR register directly to the regcache,
155      because there is a size issue: On one hand, fpregsetp->fp_csr
156      is 32bits long, while the regcache expects a 64bits long value.
157      So we use a buffer of the correct size and copy into it the register
158      value at the proper location.  */
159   memset (fsrbuf, 0, 4);
160   memcpy (fsrbuf + 4, &fpregsetp->__fp_csr, 4);
161 
162   regcache_raw_supply (regcache,
163 		       mips_regnum (gdbarch)->fp_control_status, fsrbuf);
164 
165   /* FIXME: how can we supply FCRIR?  SGI doesn't tell us.  */
166   regcache_raw_supply (regcache,
167 		       mips_regnum (gdbarch)->fp_implementation_revision,
168 		       zerobuf);
169 }
170 
171 void
fill_fpregset(const struct regcache * regcache,fpregset_t * fpregsetp,int regno)172 fill_fpregset (const struct regcache *regcache,
173 	       fpregset_t *fpregsetp, int regno)
174 {
175   int regi;
176   char *from, *to;
177   struct gdbarch *gdbarch = get_regcache_arch (regcache);
178 
179   /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs.  */
180 
181   for (regi = gdbarch_fp0_regnum (gdbarch);
182        regi < gdbarch_fp0_regnum (gdbarch) + 32; regi++)
183     {
184       if ((regno == -1) || (regno == regi))
185 	{
186 	  const int fp0_regnum = gdbarch_fp0_regnum (gdbarch);
187 
188 	  to = (char *) &(fpregsetp->__fp_r.__fp_regs[regi - fp0_regnum]);
189           regcache_raw_collect (regcache, regi, to);
190 	}
191     }
192 
193   if (regno == -1
194       || regno == mips_regnum (gdbarch)->fp_control_status)
195     {
196       char fsrbuf[8];
197 
198       /* We can't fill the FSR register directly from the regcache,
199          because there is a size issue: On one hand, fpregsetp->fp_csr
200          is 32bits long, while the regcache expects a 64bits long buffer.
201          So we use a buffer of the correct size and copy the register
202          value from that buffer.  */
203       regcache_raw_collect (regcache,
204 			    mips_regnum (gdbarch)->fp_control_status, fsrbuf);
205 
206       memcpy (&fpregsetp->__fp_csr, fsrbuf + 4, 4);
207     }
208 }
209 
210 
211 /* Provide registers to GDB from a core file.
212 
213    CORE_REG_SECT points to an array of bytes, which were obtained from
214    a core file which BFD thinks might contain register contents.
215    CORE_REG_SIZE is its size.
216 
217    Normally, WHICH says which register set corelow suspects this is:
218      0 --- the general-purpose register set
219      2 --- the floating-point register set
220    However, for Irix 5, WHICH isn't used.
221 
222    REG_ADDR is also unused.  */
223 
224 static void
fetch_core_registers(struct regcache * regcache,char * core_reg_sect,unsigned core_reg_size,int which,CORE_ADDR reg_addr)225 fetch_core_registers (struct regcache *regcache,
226 		      char *core_reg_sect, unsigned core_reg_size,
227 		      int which, CORE_ADDR reg_addr)
228 {
229   char *srcp = core_reg_sect;
230   struct gdbarch *gdbarch = get_regcache_arch (regcache);
231   int regsize = mips_isa_regsize (gdbarch);
232   int regno;
233 
234   /* If regsize is 8, this is a N32 or N64 core file.
235      If regsize is 4, this is an O32 core file.  */
236   if (core_reg_size != regsize * gdbarch_num_regs (gdbarch))
237     {
238       warning (_("wrong size gregset struct in core file"));
239       return;
240     }
241 
242   for (regno = 0; regno < gdbarch_num_regs (gdbarch); regno++)
243     {
244       regcache_raw_supply (regcache, regno, srcp);
245       srcp += regsize;
246     }
247 }
248 
249 /* Register that we are able to handle irix5 core file formats.
250    This really is bfd_target_unknown_flavour.  */
251 
252 static struct core_fns irix5_core_fns =
253 {
254   bfd_target_unknown_flavour,		/* core_flavour */
255   default_check_format,			/* check_format */
256   default_core_sniffer,			/* core_sniffer */
257   fetch_core_registers,			/* core_read_registers */
258   NULL					/* next */
259 };
260 
261 /* Provide a prototype to silence -Wmissing-prototypes.  */
262 extern initialize_file_ftype _initialize_irix5_nat;
263 
264 void
_initialize_irix5_nat(void)265 _initialize_irix5_nat (void)
266 {
267   struct target_ops *t;
268 
269   t = procfs_target ();
270   procfs_use_watchpoints (t);
271   add_target (t);
272 
273   deprecated_add_core_fns (&irix5_core_fns);
274 }
275