1 #objdump: -d --prefix-addresses
2 #name: nds32 sys-reg instructions
3 #as:
4 
5 # Test system register instructions
6 
7 .*:     file format .*
8 
9 
10 Disassembly of section .text:
11 0+0000 <[^>]*> mfsr	\$r0, \$cpu_ver
12 0+0004 <[^>]*> mfsr	\$r0, \$core_id
13 0+0008 <[^>]*> mfsr	\$r0, \$icm_cfg
14 0+000c <[^>]*> mfsr	\$r0, \$dcm_cfg
15 0+0010 <[^>]*> mfsr	\$r0, \$mmu_cfg
16 0+0014 <[^>]*> mfsr	\$r0, \$msc_cfg
17 0+0018 <[^>]*> mfsr	\$r0, \$psw
18 0+001c <[^>]*> mfsr	\$r0, \$ipsw
19 0+0020 <[^>]*> mfsr	\$r0, \$p_ipsw
20 0+0024 <[^>]*> mfsr	\$r0, \$ivb
21 0+0028 <[^>]*> mfsr	\$r0, \$int_ctrl
22 0+002c <[^>]*> mfsr	\$r0, \$eva
23 0+0030 <[^>]*> mfsr	\$r0, \$p_eva
24 0+0034 <[^>]*> mfsr	\$r0, \$itype
25 0+0038 <[^>]*> mfsr	\$r0, \$p_itype
26 0+003c <[^>]*> mfsr	\$r0, \$merr
27 0+0040 <[^>]*> mfsr	\$r0, \$ipc
28 0+0044 <[^>]*> mfsr	\$r0, \$p_ipc
29 0+0048 <[^>]*> mfsr	\$r0, \$oipc
30 0+004c <[^>]*> mfsr	\$r0, \$p_p0
31 0+0050 <[^>]*> mfsr	\$r0, \$p_p1
32 0+0054 <[^>]*> mfsr	\$r0, \$int_mask
33 0+0058 <[^>]*> mfsr	\$r0, \$int_mask2
34 0+005c <[^>]*> mfsr	\$r0, \$int_pend
35 0+0060 <[^>]*> mfsr	\$r0, \$int_pend2
36 0+0064 <[^>]*> mfsr	\$r0, \$int_trigger
37 0+0068 <[^>]*> mfsr	\$r0, \$sp_usr
38 0+006c <[^>]*> mfsr	\$r0, \$sp_priv
39 0+0070 <[^>]*> mfsr	\$r0, \$int_pri
40 0+0074 <[^>]*> mfsr	\$r0, \$int_pri2
41 0+0078 <[^>]*> mfsr	\$r0, \$mmu_ctl
42 0+007c <[^>]*> mfsr	\$r0, \$l1_pptb
43 0+0080 <[^>]*> mfsr	\$r0, \$tlb_vpn
44 0+0084 <[^>]*> mfsr	\$r0, \$tlb_data
45 0+0088 <[^>]*> mfsr	\$r0, \$tlb_misc
46 0+008c <[^>]*> mfsr	\$r0, \$vlpt_idx
47 0+0090 <[^>]*> mfsr	\$r0, \$ilmb
48 0+0094 <[^>]*> mfsr	\$r0, \$dlmb
49 0+0098 <[^>]*> mfsr	\$r0, \$cache_ctl
50 0+009c <[^>]*> mfsr	\$r0, \$hsmp_saddr
51 0+00a0 <[^>]*> mfsr	\$r0, \$hsmp_eaddr
52 0+00a4 <[^>]*> mfsr	\$r0, \$sdz_ctl
53 0+00a8 <[^>]*> mfsr	\$r0, \$misc_ctl
54 0+00ac <[^>]*> mfsr	\$r0, \$bpc0
55 0+00b0 <[^>]*> mfsr	\$r0, \$bpc1
56 0+00b4 <[^>]*> mfsr	\$r0, \$bpc2
57 0+00b8 <[^>]*> mfsr	\$r0, \$bpc3
58 0+00bc <[^>]*> mfsr	\$r0, \$bpc4
59 0+00c0 <[^>]*> mfsr	\$r0, \$bpc5
60 0+00c4 <[^>]*> mfsr	\$r0, \$bpc6
61 0+00c8 <[^>]*> mfsr	\$r0, \$bpc7
62 0+00cc <[^>]*> mfsr	\$r0, \$bpa0
63 0+00d0 <[^>]*> mfsr	\$r0, \$bpa1
64 0+00d4 <[^>]*> mfsr	\$r0, \$bpa2
65 0+00d8 <[^>]*> mfsr	\$r0, \$bpa3
66 0+00dc <[^>]*> mfsr	\$r0, \$bpa4
67 0+00e0 <[^>]*> mfsr	\$r0, \$bpa5
68 0+00e4 <[^>]*> mfsr	\$r0, \$bpa6
69 0+00e8 <[^>]*> mfsr	\$r0, \$bpa7
70 0+00ec <[^>]*> mfsr	\$r0, \$bpam0
71 0+00f0 <[^>]*> mfsr	\$r0, \$bpam1
72 0+00f4 <[^>]*> mfsr	\$r0, \$bpam2
73 0+00f8 <[^>]*> mfsr	\$r0, \$bpam3
74 0+00fc <[^>]*> mfsr	\$r0, \$bpam4
75 0+0100 <[^>]*> mfsr	\$r0, \$bpam5
76 0+0104 <[^>]*> mfsr	\$r0, \$bpam6
77 0+0108 <[^>]*> mfsr	\$r0, \$bpam7
78 0+010c <[^>]*> mfsr	\$r0, \$bpv0
79 0+0110 <[^>]*> mfsr	\$r0, \$bpv1
80 0+0114 <[^>]*> mfsr	\$r0, \$bpv2
81 0+0118 <[^>]*> mfsr	\$r0, \$bpv3
82 0+011c <[^>]*> mfsr	\$r0, \$bpv4
83 0+0120 <[^>]*> mfsr	\$r0, \$bpv5
84 0+0124 <[^>]*> mfsr	\$r0, \$bpv6
85 0+0128 <[^>]*> mfsr	\$r0, \$bpv7
86 0+012c <[^>]*> mfsr	\$r0, \$bpcid0
87 0+0130 <[^>]*> mfsr	\$r0, \$bpcid1
88 0+0134 <[^>]*> mfsr	\$r0, \$bpcid2
89 0+0138 <[^>]*> mfsr	\$r0, \$bpcid3
90 0+013c <[^>]*> mfsr	\$r0, \$bpcid4
91 0+0140 <[^>]*> mfsr	\$r0, \$bpcid5
92 0+0144 <[^>]*> mfsr	\$r0, \$bpcid6
93 0+0148 <[^>]*> mfsr	\$r0, \$bpcid7
94 0+014c <[^>]*> mfsr	\$r0, \$edm_cfg
95 0+0150 <[^>]*> mfsr	\$r0, \$edmsw
96 0+0154 <[^>]*> mfsr	\$r0, \$edm_ctl
97 0+0158 <[^>]*> mfsr	\$r0, \$edm_dtr
98 0+015c <[^>]*> mfsr	\$r0, \$bpmtc
99 0+0160 <[^>]*> mfsr	\$r0, \$dimbr
100 0+0164 <[^>]*> mfsr	\$r0, \$tecr0
101 0+0168 <[^>]*> mfsr	\$r0, \$tecr1
102 0+016c <[^>]*> mfsr	\$r0, \$pfmc0
103 0+0170 <[^>]*> mfsr	\$r0, \$pfmc1
104 0+0174 <[^>]*> mfsr	\$r0, \$pfmc2
105 0+0178 <[^>]*> mfsr	\$r0, \$pfm_ctl
106 0+017c <[^>]*> mfsr	\$r0, \$prusr_acc_ctl
107 0+0180 <[^>]*> mfsr	\$r0, \$fucpr
108 0+0184 <[^>]*> mfsr	\$r0, \$dma_cfg
109 0+0188 <[^>]*> mfsr	\$r0, \$dma_gcsw
110 0+018c <[^>]*> mfsr	\$r0, \$dma_chnsel
111 0+0190 <[^>]*> mfsr	\$r0, \$dma_act
112 0+0194 <[^>]*> mfsr	\$r0, \$dma_setup
113 0+0198 <[^>]*> mfsr	\$r0, \$dma_isaddr
114 0+019c <[^>]*> mfsr	\$r0, \$dma_esaddr
115 0+01a0 <[^>]*> mfsr	\$r0, \$dma_tcnt
116 0+01a4 <[^>]*> mfsr	\$r0, \$dma_status
117 0+01a8 <[^>]*> mfsr	\$r0, \$dma_2dset
118 0+01ac <[^>]*> mfsr	\$r0, \$dma_2dsctl
119