1        LIST
2
3;==========================================================================
4; Build date : Oct 21 2015
5;  MPASM PIC12C508 processor include
6;
7;  (c) Copyright 1999-2015 Microchip Technology, All rights reserved
8;==========================================================================
9
10        NOLIST
11
12;==========================================================================
13;  This header file defines configurations, registers, and other useful
14;  bits of information for the PIC12C508 microcontroller.  These names
15;  are taken to match the data sheets as closely as possible.
16;
17;  Note that the processor must be selected before this file is included.
18;  The processor may be selected the following ways:
19;
20;       1. Command line switch:
21;               C:\MPASM MYFILE.ASM /PIC12C508
22;       2. LIST directive in the source file
23;               LIST   P=PIC12C508
24;       3. Processor Type entry in the MPASM full-screen interface
25;       4. Setting the processor in the MPLAB Project Dialog
26;==========================================================================
27
28;==========================================================================
29;
30;       Verify Processor
31;
32;==========================================================================
33        IFNDEF __12C508
34           MESSG "Processor-header file mismatch.  Verify selected processor."
35        ENDIF
36
37
38
39;==========================================================================
40;
41;       Register Definitions
42;
43;==========================================================================
44
45W                EQU  H'0000'
46F                EQU  H'0001'
47
48;----- Register Files -----------------------------------------------------
49
50;-----Bank0------------------
51INDF             EQU  H'0000'
52TMR0             EQU  H'0001'
53PCL              EQU  H'0002'
54STATUS           EQU  H'0003'
55FSR              EQU  H'0004'
56OSCCAL           EQU  H'0005'
57GPIO             EQU  H'0006'
58
59;----- STATUS Bits -----------------------------------------------------
60C                EQU  H'0000'
61DC               EQU  H'0001'
62Z                EQU  H'0002'
63NOT_PD           EQU  H'0003'
64NOT_TO           EQU  H'0004'
65PA0              EQU  H'0005'
66GPWUF            EQU  H'0007'
67
68
69;----- OSCCAL Bits -----------------------------------------------------
70CAL0             EQU  H'0004'
71CAL1             EQU  H'0005'
72CAL2             EQU  H'0006'
73CAL3             EQU  H'0007'
74
75
76;----- GPIO Bits -----------------------------------------------------
77GP0              EQU  H'0000'
78GP1              EQU  H'0001'
79GP2              EQU  H'0002'
80GP3              EQU  H'0003'
81GP4              EQU  H'0004'
82GP5              EQU  H'0005'
83
84
85
86;----- OPTION_REG Bits -----------------------------------------------------
87PSA              EQU  H'0003'
88T0SE             EQU  H'0004'
89T0CS             EQU  H'0005'
90NOT_GPPU         EQU  H'0006'
91NOT_GPWU         EQU  H'0007'
92
93PS0              EQU  H'0000'
94PS1              EQU  H'0001'
95PS2              EQU  H'0002'
96
97
98;----- TRIS Bits -----------------------------------------------------
99TRIS0            EQU  H'0000'
100TRIS1            EQU  H'0001'
101TRIS2            EQU  H'0002'
102TRIS3            EQU  H'0003'
103TRIS4            EQU  H'0004'
104TRIS5            EQU  H'0005'
105
106
107
108;==========================================================================
109;
110;       RAM Definitions
111;
112;==========================================================================
113       __MAXRAM  H'001F'
114
115;==========================================================================
116;
117;       Configuration Bits
118;
119;   NAME            Address
120;   CONFIG             FFFh
121;
122;==========================================================================
123
124; The following is an assignment of address values for all of the
125; configuration registers for the purpose of table reads
126_CONFIG          EQU  H'FFF'
127
128;----- CONFIG Options --------------------------------------------------
129_OSC_LP              EQU  H'0FFC'    ; LP oscillator
130_LP_OSC              EQU  H'0FFC'    ; LP oscillator
131_OSC_XT              EQU  H'0FFD'    ; XT oscillator
132_XT_OSC              EQU  H'0FFD'    ; XT oscillator
133_OSC_IntRC           EQU  H'0FFE'    ; internal RC oscillator
134_IntRC_OSC           EQU  H'0FFE'    ; internal RC oscillator
135_OSC_ExtRC           EQU  H'0FFF'    ; external RC oscillator
136_ExtRC_OSC           EQU  H'0FFF'    ; external RC oscillator
137
138_WDT_OFF             EQU  H'0FFB'    ; WDT disabled
139_WDT_ON              EQU  H'0FFF'    ; WDT enabled
140
141_CP_ON               EQU  H'0FF7'    ; Code protection on
142_CP_OFF              EQU  H'0FFF'    ; Code protection off
143
144_MCLRE_OFF           EQU  H'0FEF'    ; MCLR tied to VDD, (Internally)
145_MCLRE_ON            EQU  H'0FFF'    ; MCLR pin enabled
146
147
148;----- IDLOC Equates --------------------------------------------------
149_IDLOC0          EQU  H'200'
150_IDLOC1          EQU  H'201'
151_IDLOC2          EQU  H'202'
152_IDLOC3          EQU  H'203'
153
154        LIST
155