1 LIST 2 3;========================================================================== 4; Build date : Oct 21 2015 5; MPASM PIC18F1320 processor include 6; 7; (c) Copyright 1999-2015 Microchip Technology, All rights reserved 8;========================================================================== 9 10 NOLIST 11 12;========================================================================== 13; This header file defines configurations, registers, and other useful 14; bits of information for the PIC18F1320 microcontroller. These names 15; are taken to match the data sheets as closely as possible. 16; 17; Note that the processor must be selected before this file is included. 18; The processor may be selected the following ways: 19; 20; 1. Command line switch: 21; C:\MPASM MYFILE.ASM /PIC18F1320 22; 2. LIST directive in the source file 23; LIST P=PIC18F1320 24; 3. Processor Type entry in the MPASM full-screen interface 25; 4. Setting the processor in the MPLAB Project Dialog 26;========================================================================== 27 28;========================================================================== 29; 30; Verify Processor 31; 32;========================================================================== 33 IFNDEF __18F1320 34 MESSG "Processor-header file mismatch. Verify selected processor." 35 ENDIF 36 37;========================================================================== 38; 18xxxx Family EQUates 39;========================================================================== 40FSR0 EQU 0 41FSR1 EQU 1 42FSR2 EQU 2 43 44FAST EQU 1 45 46W EQU 0 47A EQU 0 48ACCESS EQU 0 49BANKED EQU 1 50;========================================================================== 51 52;========================================================================== 53; 16Cxxx/17Cxxx Substitutions 54;========================================================================== 55 #define DDRA TRISA ; PIC17Cxxx SFR substitution 56 #define DDRB TRISB ; PIC17Cxxx SFR substitution 57 #define DDRC TRISC ; PIC17Cxxx SFR substitution 58 #define DDRD TRISD ; PIC17Cxxx SFR substitution 59 #define DDRE TRISE ; PIC17Cxxx SFR substitution 60 61;========================================================================== 62; 63; Register Definitions 64; 65;========================================================================== 66 67;----- Register Files ----------------------------------------------------- 68PORTA EQU H'0F80' 69PORTB EQU H'0F81' 70LATA EQU H'0F89' 71LATB EQU H'0F8A' 72DDRA EQU H'0F92' 73TRISA EQU H'0F92' 74DDRB EQU H'0F93' 75TRISB EQU H'0F93' 76OSCTUNE EQU H'0F9B' 77PIE1 EQU H'0F9D' 78PIR1 EQU H'0F9E' 79IPR1 EQU H'0F9F' 80PIE2 EQU H'0FA0' 81PIR2 EQU H'0FA1' 82IPR2 EQU H'0FA2' 83EECON1 EQU H'0FA6' 84EECON2 EQU H'0FA7' 85EEDATA EQU H'0FA8' 86EEADR EQU H'0FA9' 87BAUDCTL EQU H'0FAA' 88RCSTA EQU H'0FAB' 89TXSTA EQU H'0FAC' 90TXREG EQU H'0FAD' 91RCREG EQU H'0FAE' 92SPBRG EQU H'0FAF' 93SPBRGH EQU H'0FB0' 94T3CON EQU H'0FB1' 95TMR3 EQU H'0FB2' 96TMR3L EQU H'0FB2' 97TMR3H EQU H'0FB3' 98ECCPAS EQU H'0FB6' 99PWM1CON EQU H'0FB7' 100CCP1CON EQU H'0FBD' 101CCPR1 EQU H'0FBE' 102CCPR1L EQU H'0FBE' 103CCPR1H EQU H'0FBF' 104ADCON2 EQU H'0FC0' 105ADCON1 EQU H'0FC1' 106ADCON0 EQU H'0FC2' 107ADRES EQU H'0FC3' 108ADRESL EQU H'0FC3' 109ADRESH EQU H'0FC4' 110T2CON EQU H'0FCA' 111PR2 EQU H'0FCB' 112TMR2 EQU H'0FCC' 113T1CON EQU H'0FCD' 114TMR1 EQU H'0FCE' 115TMR1L EQU H'0FCE' 116TMR1H EQU H'0FCF' 117RCON EQU H'0FD0' 118WDTCON EQU H'0FD1' 119LVDCON EQU H'0FD2' 120OSCCON EQU H'0FD3' 121T0CON EQU H'0FD5' 122TMR0 EQU H'0FD6' 123TMR0L EQU H'0FD6' 124TMR0H EQU H'0FD7' 125STATUS EQU H'0FD8' 126FSR2L EQU H'0FD9' 127FSR2H EQU H'0FDA' 128PLUSW2 EQU H'0FDB' 129PREINC2 EQU H'0FDC' 130POSTDEC2 EQU H'0FDD' 131POSTINC2 EQU H'0FDE' 132INDF2 EQU H'0FDF' 133BSR EQU H'0FE0' 134FSR1L EQU H'0FE1' 135FSR1H EQU H'0FE2' 136PLUSW1 EQU H'0FE3' 137PREINC1 EQU H'0FE4' 138POSTDEC1 EQU H'0FE5' 139POSTINC1 EQU H'0FE6' 140INDF1 EQU H'0FE7' 141WREG EQU H'0FE8' 142FSR0L EQU H'0FE9' 143FSR0H EQU H'0FEA' 144PLUSW0 EQU H'0FEB' 145PREINC0 EQU H'0FEC' 146POSTDEC0 EQU H'0FED' 147POSTINC0 EQU H'0FEE' 148INDF0 EQU H'0FEF' 149INTCON3 EQU H'0FF0' 150INTCON2 EQU H'0FF1' 151INTCON EQU H'0FF2' 152PROD EQU H'0FF3' 153PRODL EQU H'0FF3' 154PRODH EQU H'0FF4' 155TABLAT EQU H'0FF5' 156TBLPTR EQU H'0FF6' 157TBLPTRL EQU H'0FF6' 158TBLPTRH EQU H'0FF7' 159TBLPTRU EQU H'0FF8' 160PC EQU H'0FF9' 161PCL EQU H'0FF9' 162PCLATH EQU H'0FFA' 163PCLATU EQU H'0FFB' 164STKPTR EQU H'0FFC' 165TOS EQU H'0FFD' 166TOSL EQU H'0FFD' 167TOSH EQU H'0FFE' 168TOSU EQU H'0FFF' 169 170;----- PORTA Bits ----------------------------------------------------- 171RA0 EQU H'0000' 172RA1 EQU H'0001' 173RA2 EQU H'0002' 174RA3 EQU H'0003' 175RA4 EQU H'0004' 176RA5 EQU H'0005' 177RA6 EQU H'0006' 178RA7 EQU H'0007' 179 180AN0 EQU H'0000' 181AN1 EQU H'0001' 182AN2 EQU H'0002' 183AN3 EQU H'0003' 184MCLR EQU H'0005' 185CLKO EQU H'0006' 186CLKI EQU H'0007' 187 188LVDIN EQU H'0001' 189VREFM EQU H'0002' 190VREFP EQU H'0003' 191T0CKI EQU H'0004' 192OSC2 EQU H'0006' 193OSC1 EQU H'0007' 194 195NOT_MCLR EQU H'0005' 196CLKOUT EQU H'0006' 197CLKIN EQU H'0007' 198 199 200;----- PORTB Bits ----------------------------------------------------- 201RB0 EQU H'0000' 202RB1 EQU H'0001' 203RB2 EQU H'0002' 204RB3 EQU H'0003' 205RB4 EQU H'0004' 206RB5 EQU H'0005' 207RB6 EQU H'0006' 208RB7 EQU H'0007' 209 210AN4 EQU H'0000' 211AN5 EQU H'0001' 212CCP1 EQU H'0003' 213AN6 EQU H'0004' 214PGM EQU H'0005' 215PGC EQU H'0006' 216PGD EQU H'0007' 217 218INT0 EQU H'0000' 219INT1 EQU H'0001' 220INT2 EQU H'0002' 221KBI0 EQU H'0004' 222KBI1 EQU H'0005' 223KBI2 EQU H'0006' 224KBI3 EQU H'0007' 225 226CK EQU H'0001' 227P1B EQU H'0002' 228P1A EQU H'0003' 229; DT is a reserved word 230; DT EQU H'0004' 231P1C EQU H'0006' 232P1D EQU H'0007' 233 234TX EQU H'0001' 235RX EQU H'0004' 236T1OSO EQU H'0006' 237T1OSI EQU H'0007' 238 239T13CKI EQU H'0006' 240 241T1CKI EQU H'0006' 242 243 244;----- LATA Bits ----------------------------------------------------- 245LATA0 EQU H'0000' 246LATA1 EQU H'0001' 247LATA2 EQU H'0002' 248LATA3 EQU H'0003' 249LATA4 EQU H'0004' 250LATA6 EQU H'0006' 251LATA7 EQU H'0007' 252 253 254;----- LATB Bits ----------------------------------------------------- 255LATB0 EQU H'0000' 256LATB1 EQU H'0001' 257LATB2 EQU H'0002' 258LATB3 EQU H'0003' 259LATB4 EQU H'0004' 260LATB5 EQU H'0005' 261LATB6 EQU H'0006' 262LATB7 EQU H'0007' 263 264 265;----- DDRA Bits ----------------------------------------------------- 266TRISA0 EQU H'0000' 267TRISA1 EQU H'0001' 268TRISA2 EQU H'0002' 269TRISA3 EQU H'0003' 270TRISA4 EQU H'0004' 271TRISA6 EQU H'0006' 272TRISA7 EQU H'0007' 273 274RA0 EQU H'0000' 275RA1 EQU H'0001' 276RA2 EQU H'0002' 277RA3 EQU H'0003' 278RA4 EQU H'0004' 279RA6 EQU H'0006' 280RA7 EQU H'0007' 281 282 283;----- TRISA Bits ----------------------------------------------------- 284TRISA0 EQU H'0000' 285TRISA1 EQU H'0001' 286TRISA2 EQU H'0002' 287TRISA3 EQU H'0003' 288TRISA4 EQU H'0004' 289TRISA6 EQU H'0006' 290TRISA7 EQU H'0007' 291 292RA0 EQU H'0000' 293RA1 EQU H'0001' 294RA2 EQU H'0002' 295RA3 EQU H'0003' 296RA4 EQU H'0004' 297RA6 EQU H'0006' 298RA7 EQU H'0007' 299 300 301;----- DDRB Bits ----------------------------------------------------- 302TRISB0 EQU H'0000' 303TRISB1 EQU H'0001' 304TRISB2 EQU H'0002' 305TRISB3 EQU H'0003' 306TRISB4 EQU H'0004' 307TRISB5 EQU H'0005' 308TRISB6 EQU H'0006' 309TRISB7 EQU H'0007' 310 311RB0 EQU H'0000' 312RB1 EQU H'0001' 313RB2 EQU H'0002' 314RB3 EQU H'0003' 315RB4 EQU H'0004' 316RB5 EQU H'0005' 317RB6 EQU H'0006' 318RB7 EQU H'0007' 319 320 321;----- TRISB Bits ----------------------------------------------------- 322TRISB0 EQU H'0000' 323TRISB1 EQU H'0001' 324TRISB2 EQU H'0002' 325TRISB3 EQU H'0003' 326TRISB4 EQU H'0004' 327TRISB5 EQU H'0005' 328TRISB6 EQU H'0006' 329TRISB7 EQU H'0007' 330 331RB0 EQU H'0000' 332RB1 EQU H'0001' 333RB2 EQU H'0002' 334RB3 EQU H'0003' 335RB4 EQU H'0004' 336RB5 EQU H'0005' 337RB6 EQU H'0006' 338RB7 EQU H'0007' 339 340 341;----- OSCTUNE Bits ----------------------------------------------------- 342TUN0 EQU H'0000' 343TUN1 EQU H'0001' 344TUN2 EQU H'0002' 345TUN3 EQU H'0003' 346TUN4 EQU H'0004' 347TUN5 EQU H'0005' 348 349 350;----- PIE1 Bits ----------------------------------------------------- 351TMR1IE EQU H'0000' 352TMR2IE EQU H'0001' 353CCP1IE EQU H'0002' 354TXIE EQU H'0004' 355RCIE EQU H'0005' 356ADIE EQU H'0006' 357 358 359;----- PIR1 Bits ----------------------------------------------------- 360TMR1IF EQU H'0000' 361TMR2IF EQU H'0001' 362CCP1IF EQU H'0002' 363TXIF EQU H'0004' 364RCIF EQU H'0005' 365ADIF EQU H'0006' 366 367 368;----- IPR1 Bits ----------------------------------------------------- 369TMR1IP EQU H'0000' 370TMR2IP EQU H'0001' 371CCP1IP EQU H'0002' 372TXIP EQU H'0004' 373RCIP EQU H'0005' 374ADIP EQU H'0006' 375 376 377;----- PIE2 Bits ----------------------------------------------------- 378TMR3IE EQU H'0001' 379LVDIE EQU H'0002' 380EEIE EQU H'0004' 381OSCFIE EQU H'0007' 382 383 384;----- PIR2 Bits ----------------------------------------------------- 385TMR3IF EQU H'0001' 386LVDIF EQU H'0002' 387EEIF EQU H'0004' 388OSCFIF EQU H'0007' 389 390 391;----- IPR2 Bits ----------------------------------------------------- 392TMR3IP EQU H'0001' 393LVDIP EQU H'0002' 394EEIP EQU H'0004' 395OSCFIP EQU H'0007' 396 397 398;----- EECON1 Bits ----------------------------------------------------- 399RD EQU H'0000' 400WR EQU H'0001' 401WREN EQU H'0002' 402WRERR EQU H'0003' 403FREE EQU H'0004' 404CFGS EQU H'0006' 405EEPGD EQU H'0007' 406 407 408;----- BAUDCTL Bits ----------------------------------------------------- 409ABDEN EQU H'0000' 410WUE EQU H'0001' 411BRG16 EQU H'0003' 412SCKP EQU H'0004' 413RCIDL EQU H'0006' 414 415RCMT EQU H'0006' 416 417 418;----- RCSTA Bits ----------------------------------------------------- 419RX9D EQU H'0000' 420OERR EQU H'0001' 421FERR EQU H'0002' 422ADDEN EQU H'0003' 423CREN EQU H'0004' 424SREN EQU H'0005' 425RX9 EQU H'0006' 426SPEN EQU H'0007' 427 428ADEN EQU H'0003' 429 430 431;----- TXSTA Bits ----------------------------------------------------- 432TX9D EQU H'0000' 433TRMT EQU H'0001' 434BRGH EQU H'0002' 435SENDB EQU H'0003' 436SYNC EQU H'0004' 437TXEN EQU H'0005' 438TX9 EQU H'0006' 439CSRC EQU H'0007' 440 441 442;----- T3CON Bits ----------------------------------------------------- 443TMR3ON EQU H'0000' 444TMR3CS EQU H'0001' 445NOT_T3SYNC EQU H'0002' 446T3CCP1 EQU H'0003' 447T3CCP2 EQU H'0006' 448RD16 EQU H'0007' 449 450T3SYNC EQU H'0002' 451T3CKPS0 EQU H'0004' 452T3CKPS1 EQU H'0005' 453 454 455;----- ECCPAS Bits ----------------------------------------------------- 456ECCPASE EQU H'0007' 457 458PSSBD0 EQU H'0000' 459PSSBD1 EQU H'0001' 460PSSAC0 EQU H'0002' 461PSSAC1 EQU H'0003' 462ECCPAS0 EQU H'0004' 463ECCPAS1 EQU H'0005' 464ECCPAS2 EQU H'0006' 465 466 467;----- PWM1CON Bits ----------------------------------------------------- 468PRSEN EQU H'0007' 469 470PDC0 EQU H'0000' 471PDC1 EQU H'0001' 472PDC2 EQU H'0002' 473PDC3 EQU H'0003' 474PDC4 EQU H'0004' 475PDC5 EQU H'0005' 476PDC6 EQU H'0006' 477 478 479;----- CCP1CON Bits ----------------------------------------------------- 480CCP1M0 EQU H'0000' 481CCP1M1 EQU H'0001' 482CCP1M2 EQU H'0002' 483CCP1M3 EQU H'0003' 484DC1B0 EQU H'0004' 485DC1B1 EQU H'0005' 486P1M0 EQU H'0006' 487P1M1 EQU H'0007' 488 489CCP1Y EQU H'0004' 490CCP1X EQU H'0005' 491 492 493;----- ADCON2 Bits ----------------------------------------------------- 494ADFM EQU H'0007' 495 496ADCS0 EQU H'0000' 497ADCS1 EQU H'0001' 498ADCS2 EQU H'0002' 499ACQT0 EQU H'0003' 500ACQT1 EQU H'0004' 501ACQT2 EQU H'0005' 502 503 504;----- ADCON1 Bits ----------------------------------------------------- 505PCFG0 EQU H'0000' 506PCFG1 EQU H'0001' 507PCFG2 EQU H'0002' 508PCFG3 EQU H'0003' 509PCFG4 EQU H'0004' 510PCFG5 EQU H'0005' 511PCFG6 EQU H'0006' 512 513 514;----- ADCON0 Bits ----------------------------------------------------- 515ADON EQU H'0000' 516GO_NOT_DONE EQU H'0001' 517 518GO EQU H'0001' 519CHS0 EQU H'0002' 520CHS1 EQU H'0003' 521CHS2 EQU H'0004' 522VCFG0 EQU H'0006' 523VCFG1 EQU H'0007' 524 525DONE EQU H'0001' 526 527NOT_DONE EQU H'0001' 528 529GO_DONE EQU H'0001' 530 531 532;----- T2CON Bits ----------------------------------------------------- 533TMR2ON EQU H'0002' 534 535T2CKPS0 EQU H'0000' 536T2CKPS1 EQU H'0001' 537TOUTPS0 EQU H'0003' 538TOUTPS1 EQU H'0004' 539TOUTPS2 EQU H'0005' 540TOUTPS3 EQU H'0006' 541 542 543;----- T1CON Bits ----------------------------------------------------- 544TMR1ON EQU H'0000' 545TMR1CS EQU H'0001' 546NOT_T1SYNC EQU H'0002' 547T1OSCEN EQU H'0003' 548T1RUN EQU H'0006' 549RD16 EQU H'0007' 550 551T1CKPS0 EQU H'0004' 552T1CKPS1 EQU H'0005' 553 554T1SYNC EQU H'0002' 555 556 557;----- RCON Bits ----------------------------------------------------- 558NOT_BOR EQU H'0000' 559NOT_POR EQU H'0001' 560NOT_PD EQU H'0002' 561NOT_TO EQU H'0003' 562NOT_RI EQU H'0004' 563IPEN EQU H'0007' 564 565BOR EQU H'0000' 566POR EQU H'0001' 567PD EQU H'0002' 568TO EQU H'0003' 569RI EQU H'0004' 570 571 572;----- WDTCON Bits ----------------------------------------------------- 573SWDTEN EQU H'0000' 574 575SWDTE EQU H'0000' 576 577 578;----- LVDCON Bits ----------------------------------------------------- 579LVDEN EQU H'0004' 580IRVST EQU H'0005' 581 582LVDL0 EQU H'0000' 583LVDL1 EQU H'0001' 584LVDL2 EQU H'0002' 585LVDL3 EQU H'0003' 586IVRST EQU H'0005' 587 588 589;----- OSCCON Bits ----------------------------------------------------- 590SCS0 EQU H'0000' 591SCS1 EQU H'0001' 592IOFS EQU H'0002' 593OSTS EQU H'0003' 594IDLEN EQU H'0007' 595 596SCS EQU H'0000' 597FLTS EQU H'0002' 598IRCF0 EQU H'0004' 599IRCF1 EQU H'0005' 600IRCF2 EQU H'0006' 601 602 603;----- T0CON Bits ----------------------------------------------------- 604PSA EQU H'0003' 605T0SE EQU H'0004' 606T0CS EQU H'0005' 607T08BIT EQU H'0006' 608TMR0ON EQU H'0007' 609 610T0PS0 EQU H'0000' 611T0PS1 EQU H'0001' 612T0PS2 EQU H'0002' 613T016BIT EQU H'0006' 614 615 616;----- STATUS Bits ----------------------------------------------------- 617C EQU H'0000' 618DC EQU H'0001' 619Z EQU H'0002' 620OV EQU H'0003' 621N EQU H'0004' 622 623 624;----- INTCON3 Bits ----------------------------------------------------- 625INT1IF EQU H'0000' 626INT2IF EQU H'0001' 627INT1IE EQU H'0003' 628INT2IE EQU H'0004' 629INT1IP EQU H'0006' 630INT2IP EQU H'0007' 631 632INT1F EQU H'0000' 633INT2F EQU H'0001' 634INT1E EQU H'0003' 635INT2E EQU H'0004' 636INT1P EQU H'0006' 637INT2P EQU H'0007' 638 639 640;----- INTCON2 Bits ----------------------------------------------------- 641RBIP EQU H'0000' 642TMR0IP EQU H'0002' 643INTEDG2 EQU H'0004' 644INTEDG1 EQU H'0005' 645INTEDG0 EQU H'0006' 646NOT_RBPU EQU H'0007' 647 648T0IP EQU H'0002' 649RBPU EQU H'0007' 650 651 652;----- INTCON Bits ----------------------------------------------------- 653RBIF EQU H'0000' 654INT0IF EQU H'0001' 655TMR0IF EQU H'0002' 656RBIE EQU H'0003' 657INT0IE EQU H'0004' 658TMR0IE EQU H'0005' 659PEIE_GIEL EQU H'0006' 660GIE_GIEH EQU H'0007' 661 662INT0F EQU H'0001' 663T0IF EQU H'0002' 664INT0E EQU H'0004' 665T0IE EQU H'0005' 666PEIE EQU H'0006' 667GIE EQU H'0007' 668 669INTF EQU H'0001' 670INTE EQU H'0004' 671GIEL EQU H'0006' 672GIEH EQU H'0007' 673 674 675;----- STKPTR Bits ----------------------------------------------------- 676STKUNF EQU H'0006' 677STKFUL EQU H'0007' 678 679STKPTR0 EQU H'0000' 680STKPTR1 EQU H'0001' 681STKPTR2 EQU H'0002' 682STKPTR3 EQU H'0003' 683STKPTR4 EQU H'0004' 684STKOVF EQU H'0007' 685 686SP0 EQU H'0000' 687SP1 EQU H'0001' 688SP2 EQU H'0002' 689SP3 EQU H'0003' 690SP4 EQU H'0004' 691 692 693 694;========================================================================== 695; 696; RAM Definitions 697; 698;========================================================================== 699 __MAXRAM H'0FFF' 700 __BADRAM H'0100'-H'0F7F' 701 __BADRAM H'0F82'-H'0F88' 702 __BADRAM H'0F8B'-H'0F91' 703 __BADRAM H'0F94'-H'0F9A' 704 __BADRAM H'0F9C' 705 __BADRAM H'0FA3'-H'0FA5' 706 __BADRAM H'0FB4'-H'0FB5' 707 __BADRAM H'0FB8'-H'0FBC' 708 __BADRAM H'0FC5'-H'0FC9' 709 __BADRAM H'0FD4' 710 711;========================================================================== 712; 713; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been 714; superseded by the CONFIG directive. The following settings 715; are available for this device. 716; 717; Oscillator Selection bits: 718; OSC = LP LP Oscillator 719; OSC = XT XT Oscillator 720; OSC = HS HS Oscillator 721; OSC = EC EC oscillator, CLKO function on RA6 722; OSC = ECIO EC oscillator, port function on RA6 723; OSC = HSPLL HS oscillator, PLL enabled (clock frequency = 4 x FOSC1) 724; OSC = RCIO External RC oscillator, port function on RA6 725; OSC = INTIO2 Internal RC oscillator, port function on RA6 and port function on RA7 726; OSC = INTIO1 Internal RC oscillator, CLKO function on RA6 and port function on RA7 727; OSC = RC External RC oscillator, CLKO function on RA6 728; 729; Fail-Safe Clock Monitor Enable bit: 730; FSCM = OFF Fail-Safe Clock Monitor disabled 731; FSCM = ON Fail-Safe Clock Monitor enabled 732; 733; Internal External Switchover bit: 734; IESO = OFF Internal External Switchover mode disabled 735; IESO = ON Internal External Switchover mode enabled 736; 737; Power-up Timer Enable bit: 738; PWRT = ON PWRT enabled 739; PWRT = OFF PWRT disabled 740; 741; Brown-out Reset Enable bit: 742; BOR = OFF Brown-out Reset disabled 743; BOR = ON Brown-out Reset enabled 744; 745; Brown-out Reset Voltage bits: 746; BORV = 45 VBOR set to 4.5V 747; BORV = 42 VBOR set to 4.2V 748; BORV = 27 VBOR set to 2.7V 749; 750; Watchdog Timer Enable bit: 751; WDT = OFF WDT disabled (control is placed on the SWDTEN bit) 752; WDT = ON WDT enabled 753; 754; Watchdog Timer Postscale Select bits: 755; WDTPS = 1 1:1 756; WDTPS = 2 1:2 757; WDTPS = 4 1:4 758; WDTPS = 8 1:8 759; WDTPS = 16 1:16 760; WDTPS = 32 1:32 761; WDTPS = 64 1:64 762; WDTPS = 128 1:128 763; WDTPS = 256 1:256 764; WDTPS = 512 1:512 765; WDTPS = 1024 1:1024 766; WDTPS = 2048 1:2048 767; WDTPS = 4096 1:4096 768; WDTPS = 8192 1:8192 769; WDTPS = 16384 1:16384 770; WDTPS = 32768 1:32768 771; 772; MCLR Pin Enable bit: 773; MCLRE = OFF RA5 input pin enabled, MCLR disabled 774; MCLRE = ON MCLR pin enabled, RA5 input pin disabled 775; 776; Stack Full/Underflow Reset Enable bit: 777; STVR = OFF Stack full/underflow will not cause Reset 778; STVR = ON Stack full/underflow will cause Reset 779; 780; Low-Voltage ICSP Enable bit: 781; LVP = OFF Low-Voltage ICSP disabled 782; LVP = ON Low-Voltage ICSP enabled 783; 784; Background Debugger Enable bit: 785; DEBUG = ON Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug 786; DEBUG = OFF Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins 787; 788; Code Protection bit: 789; CP0 = ON Block 0 (00200-000FFFh) code-protected 790; CP0 = OFF Block 0 (00200-000FFFh) not code-protected 791; 792; Code Protection bit: 793; CP1 = ON Block 1 (001000-001FFFh) code-protected 794; CP1 = OFF Block 1 (001000-001FFFh) not code-protected 795; 796; Boot Block Code Protection bit: 797; CPB = ON Boot Block (000000-0001FFh) code-protected 798; CPB = OFF Boot Block (000000-0001FFh) not code-protected 799; 800; Data EEPROM Code Protection bit: 801; CPD = ON Data EEPROM code-protected 802; CPD = OFF Data EEPROM not code-protected 803; 804; Write Protection bit: 805; WRT0 = ON Block 0 (00200-000FFFh) write-protected 806; WRT0 = OFF Block 0 (00200-000FFFh) not write-protected 807; 808; Write Protection bit: 809; WRT1 = ON Block 1 (001000-001FFFh) write-protected 810; WRT1 = OFF Block 1 (001000-001FFFh) not write-protected 811; 812; Configuration Register Write Protection bit: 813; WRTC = ON Configuration registers (300000-3000FFh) write-protected 814; WRTC = OFF Configuration registers (300000-3000FFh) not write-protected 815; 816; Boot Block Write Protection bit: 817; WRTB = ON Boot Block (000000-0001FFh) write-protected 818; WRTB = OFF Boot Block (000000-0001FFh) not write-protected 819; 820; Data EEPROM Write Protection bit: 821; WRTD = ON Data EEPROM write-protected 822; WRTD = OFF Data EEPROM not write-protected 823; 824; Table Read Protection bit: 825; EBTR0 = ON Block 0 (00200-000FFFh) protected from table reads executed in other blocks 826; EBTR0 = OFF Block 0 (00200-000FFFh) not protected from table reads executed in other blocks 827; 828; Table Read Protection bit: 829; EBTR1 = ON Block 1 (001000-001FFFh) protected from table reads executed in other blocks 830; EBTR1 = OFF Block 1 (001000-001FFFh) not protected from table reads executed in other blocks 831; 832; Boot Block Table Read Protection bit: 833; EBTRB = ON Boot Block (000000-0001FFh) protected from table reads executed in other blocks 834; EBTRB = OFF Boot Block (000000-0001FFh) not protected from table reads executed in other blocks 835; 836;========================================================================== 837;========================================================================== 838; 839; Configuration Bits 840; 841; NAME Address 842; CONFIG1H 300001h 843; CONFIG2L 300002h 844; CONFIG2H 300003h 845; CONFIG3H 300005h 846; CONFIG4L 300006h 847; CONFIG5L 300008h 848; CONFIG5H 300009h 849; CONFIG6L 30000Ah 850; CONFIG6H 30000Bh 851; CONFIG7L 30000Ch 852; CONFIG7H 30000Dh 853; 854;========================================================================== 855 856; The following is an assignment of address values for all of the 857; configuration registers for the purpose of table reads 858_CONFIG1H EQU H'300001' 859_CONFIG2L EQU H'300002' 860_CONFIG2H EQU H'300003' 861_CONFIG3H EQU H'300005' 862_CONFIG4L EQU H'300006' 863_CONFIG5L EQU H'300008' 864_CONFIG5H EQU H'300009' 865_CONFIG6L EQU H'30000A' 866_CONFIG6H EQU H'30000B' 867_CONFIG7L EQU H'30000C' 868_CONFIG7H EQU H'30000D' 869 870;----- CONFIG1H Options -------------------------------------------------- 871_LP_OSC_1H EQU H'F0' ; LP Oscillator 872_XT_OSC_1H EQU H'F1' ; XT Oscillator 873_HS_OSC_1H EQU H'F2' ; HS Oscillator 874_EC_OSC_1H EQU H'F4' ; EC oscillator, CLKO function on RA6 875_ECIOP_OSC_1H EQU H'F5' ; EC oscillator, port function on RA6 876_HSPLL_OSC_1H EQU H'F6' ; HS oscillator, PLL enabled (clock frequency = 4 x FOSC1) 877_RCIO_OSC_1H EQU H'F7' ; External RC oscillator, port function on RA6 878_INTIO2_OSC_1H EQU H'F8' ; Internal RC oscillator, port function on RA6 and port function on RA7 879_INTIO1_OSC_1H EQU H'F9' ; Internal RC oscillator, CLKO function on RA6 and port function on RA7 880_RC_OSC_1H EQU H'FC' ; External RC oscillator, CLKO function on RA6 881 882_FSCM_OFF_1H EQU H'BF' ; Fail-Safe Clock Monitor disabled 883_FSCM_ON_1H EQU H'FF' ; Fail-Safe Clock Monitor enabled 884 885_IESO_OFF_1H EQU H'7F' ; Internal External Switchover mode disabled 886_IESO_ON_1H EQU H'FF' ; Internal External Switchover mode enabled 887 888;----- CONFIG2L Options -------------------------------------------------- 889_PWRT_ON_2L EQU H'FE' ; PWRT enabled 890_PWRT_OFF_2L EQU H'FF' ; PWRT disabled 891 892_BOR_OFF_2L EQU H'FD' ; Brown-out Reset disabled 893_BOR_ON_2L EQU H'FF' ; Brown-out Reset enabled 894 895_BORV_45_2L EQU H'F3' ; VBOR set to 4.5V 896_BORV_42_2L EQU H'F7' ; VBOR set to 4.2V 897_BORV_27_2L EQU H'FB' ; VBOR set to 2.7V 898 899;----- CONFIG2H Options -------------------------------------------------- 900_WDT_OFF_2H EQU H'FE' ; WDT disabled (control is placed on the SWDTEN bit) 901_WDT_ON_2H EQU H'FF' ; WDT enabled 902 903_WDTPS_1_2H EQU H'E1' ; 1:1 904_WDTPS_2_2H EQU H'E3' ; 1:2 905_WDTPS_4_2H EQU H'E5' ; 1:4 906_WDTPS_8_2H EQU H'E7' ; 1:8 907_WDTPS_16_2H EQU H'E9' ; 1:16 908_WDTPS_32_2H EQU H'EB' ; 1:32 909_WDTPS_64_2H EQU H'ED' ; 1:64 910_WDTPS_128_2H EQU H'EF' ; 1:128 911_WDTPS_256_2H EQU H'F1' ; 1:256 912_WDTPS_512_2H EQU H'F3' ; 1:512 913_WDTPS_1K_2H EQU H'F5' ; 1:1024 914_WDTPS_2K_2H EQU H'F7' ; 1:2048 915_WDTPS_4K_2H EQU H'F9' ; 1:4096 916_WDTPS_8K_2H EQU H'FB' ; 1:8192 917_WDTPS_16K_2H EQU H'FD' ; 1:16384 918_WDTPS_32K_2H EQU H'FF' ; 1:32768 919 920;----- CONFIG3H Options -------------------------------------------------- 921_MCLRE_OFF_3H EQU H'7F' ; RA5 input pin enabled, MCLR disabled 922_MCLRE_ON_3H EQU H'FF' ; MCLR pin enabled, RA5 input pin disabled 923 924;----- CONFIG4L Options -------------------------------------------------- 925_STVR_OFF_4L EQU H'FE' ; Stack full/underflow will not cause Reset 926_STVR_ON_4L EQU H'FF' ; Stack full/underflow will cause Reset 927 928_LVP_OFF_4L EQU H'FB' ; Low-Voltage ICSP disabled 929_LVP_ON_4L EQU H'FF' ; Low-Voltage ICSP enabled 930 931_DEBUG_ON_4L EQU H'7F' ; Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug 932_DEBUG_OFF_4L EQU H'FF' ; Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins 933 934;----- CONFIG5L Options -------------------------------------------------- 935_CP0_ON_5L EQU H'FE' ; Block 0 (00200-000FFFh) code-protected 936_CP0_OFF_5L EQU H'FF' ; Block 0 (00200-000FFFh) not code-protected 937 938_CP1_ON_5L EQU H'FD' ; Block 1 (001000-001FFFh) code-protected 939_CP1_OFF_5L EQU H'FF' ; Block 1 (001000-001FFFh) not code-protected 940 941;----- CONFIG5H Options -------------------------------------------------- 942_CPB_ON_5H EQU H'BF' ; Boot Block (000000-0001FFh) code-protected 943_CPB_OFF_5H EQU H'FF' ; Boot Block (000000-0001FFh) not code-protected 944 945_CPD_ON_5H EQU H'7F' ; Data EEPROM code-protected 946_CPD_OFF_5H EQU H'FF' ; Data EEPROM not code-protected 947 948;----- CONFIG6L Options -------------------------------------------------- 949_WRT0_ON_6L EQU H'FE' ; Block 0 (00200-000FFFh) write-protected 950_WRT0_OFF_6L EQU H'FF' ; Block 0 (00200-000FFFh) not write-protected 951 952_WRT1_ON_6L EQU H'FD' ; Block 1 (001000-001FFFh) write-protected 953_WRT1_OFF_6L EQU H'FF' ; Block 1 (001000-001FFFh) not write-protected 954 955;----- CONFIG6H Options -------------------------------------------------- 956_WRTC_ON_6H EQU H'DF' ; Configuration registers (300000-3000FFh) write-protected 957_WRTC_OFF_6H EQU H'FF' ; Configuration registers (300000-3000FFh) not write-protected 958 959_WRTB_ON_6H EQU H'BF' ; Boot Block (000000-0001FFh) write-protected 960_WRTB_OFF_6H EQU H'FF' ; Boot Block (000000-0001FFh) not write-protected 961 962_WRTD_ON_6H EQU H'7F' ; Data EEPROM write-protected 963_WRTD_OFF_6H EQU H'FF' ; Data EEPROM not write-protected 964 965;----- CONFIG7L Options -------------------------------------------------- 966_EBTR0_ON_7L EQU H'FE' ; Block 0 (00200-000FFFh) protected from table reads executed in other blocks 967_EBTR0_OFF_7L EQU H'FF' ; Block 0 (00200-000FFFh) not protected from table reads executed in other blocks 968 969_EBTR1_ON_7L EQU H'FD' ; Block 1 (001000-001FFFh) protected from table reads executed in other blocks 970_EBTR1_OFF_7L EQU H'FF' ; Block 1 (001000-001FFFh) not protected from table reads executed in other blocks 971 972;----- CONFIG7H Options -------------------------------------------------- 973_EBTRB_ON_7H EQU H'BF' ; Boot Block (000000-0001FFh) protected from table reads executed in other blocks 974_EBTRB_OFF_7H EQU H'FF' ; Boot Block (000000-0001FFh) not protected from table reads executed in other blocks 975 976 977;----- DEVID Equates -------------------------------------------------- 978_DEVID1 EQU H'3FFFFE' 979_DEVID2 EQU H'3FFFFF' 980 981;----- IDLOC Equates -------------------------------------------------- 982_IDLOC0 EQU H'200000' 983_IDLOC1 EQU H'200001' 984_IDLOC2 EQU H'200002' 985_IDLOC3 EQU H'200003' 986_IDLOC4 EQU H'200004' 987_IDLOC5 EQU H'200005' 988_IDLOC6 EQU H'200006' 989_IDLOC7 EQU H'200007' 990 991 LIST 992