1 /*========================== begin_copyright_notice ============================
2
3 Copyright (C) 2017-2021 Intel Corporation
4
5 SPDX-License-Identifier: MIT
6
7 ============================= end_copyright_notice ===========================*/
8
9 /*========================== begin_copyright_notice ============================
10
11 This file is distributed under the University of Illinois Open Source License.
12 See LICENSE.TXT for details.
13
14 ============================= end_copyright_notice ===========================*/
15
16 /*========================== begin_copyright_notice ============================
17
18 Copyright (C) 2014 Advanced Micro Devices, Inc. All rights reserved.
19
20 Permission is hereby granted, free of charge, to any person obtaining a
21 copy of this software and associated documentation files (the "Software"),
22 to deal with the Software without restriction, including without limitation
23 the rights to use, copy, modify, merge, publish, distribute, sublicense,
24 and/or sell copies of the Software, and to permit persons to whom the
25 Software is furnished to do so, subject to the following conditions:
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27 Redistributions of source code must retain the above copyright notice,
28 this list of conditions and the following disclaimers.
29 Redistributions in binary form must reproduce the above copyright notice,
30 this list of conditions and the following disclaimers in the documentation
31 and/or other materials provided with the distribution.
32 Neither the names of Advanced Micro Devices, Inc., nor the names of its
33 contributors may be used to endorse or promote products derived from this
34 Software without specific prior written permission.
35 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
36 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
37 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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40 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH
41 THE SOFTWARE.
42
43 ============================= end_copyright_notice ===========================*/
44
45 // This file defines SPIR-V enums.
46
47 #ifndef SPIRVENUM_HPP_
48 #define SPIRVENUM_HPP_
49
50 #include "spirv.hpp"
51 #include "SPIRVOpCode.h"
52 #include <cstdint>
53
54
55 namespace igc_spv{
56
57 typedef uint32_t SPIRVWord;
58 typedef uint32_t SPIRVId;
59 #define SPIRVID_MAX ~0U
60 #define SPIRVID_INVALID ~0U
61 #define SPIRVWORD_MAX ~0U
62
63 inline bool
isValid(SPIRVId Id)64 isValid(SPIRVId Id) { return Id != SPIRVID_INVALID;}
65
66 inline SPIRVWord
mkWord(unsigned WordCount,Op OpCode)67 mkWord(unsigned WordCount, Op OpCode) {
68 return (WordCount << 16) | OpCode;
69 }
70
71 const SPIRVWord SPIRVMagicNumber = igc_spv::MagicNumber;
72
73 enum SPIRVVersionSupported {
74 fullyCompliant = igc_spv::Version
75 };
76
77
78 enum SPIRVGeneratorKind {
79 SPIRVGEN_AMDOpenSourceLLVMSPIRVTranslator = 1,
80 };
81
82 enum SPIRVInstructionSchemaKind {
83 SPIRVISCH_Default,
84 };
85
86 typedef igc_spv::Capability SPIRVCapabilityKind;
87 typedef igc_spv::ExecutionModel SPIRVExecutionModelKind;
88 typedef igc_spv::ExecutionMode SPIRVExecutionModeKind;
89 typedef igc_spv::AccessQualifier SPIRVAccessQualifierKind;
90 typedef igc_spv::AddressingModel SPIRVAddressingModelKind;
91 typedef igc_spv::LinkageType SPIRVLinkageTypeKind;
92 typedef igc_spv::MemoryModel SPIRVMemoryModelKind;
93 typedef igc_spv::StorageClass SPIRVStorageClassKind;
94 typedef igc_spv::FunctionControlMask SPIRVFunctionControlMaskKind;
95 typedef igc_spv::FPRoundingMode SPIRVFPRoundingModeKind;
96 typedef igc_spv::FunctionParameterAttribute SPIRVFuncParamAttrKind;
97 typedef igc_spv::BuiltIn SPIRVBuiltinVariableKind;
98 typedef igc_spv::MemoryAccessMask SPIRVMemoryAccessKind;
99 typedef igc_spv::GroupOperation SPIRVGroupOperationKind;
100 typedef igc_spv::Dim SPIRVImageDimKind;
101
102 template<typename K>
103 SPIRVCapabilityKind
getCapability(K Key)104 getCapability(K Key) {
105 return SPIRVMap<K, SPIRVCapabilityKind>::map(Key);
106 }
107
108 template<> inline void
init()109 SPIRVMap<SPIRVExecutionModelKind, SPIRVCapabilityKind>::init() {
110 add(ExecutionModelVertex, CapabilityShader);
111 add(ExecutionModelTessellationControl, CapabilityTessellation);
112 add(ExecutionModelTessellationEvaluation, CapabilityShader);
113 add(ExecutionModelGeometry, CapabilityGeometry);
114 add(ExecutionModelFragment, CapabilityShader);
115 add(ExecutionModelGLCompute, CapabilityShader);
116 add(ExecutionModelKernel, CapabilityKernel);
117 }
118
119 inline bool
isValid(SPIRVExecutionModelKind E)120 isValid(SPIRVExecutionModelKind E) {
121 return (unsigned)E < (unsigned)ExecutionModelCount;
122 }
123
124 template<> inline void
init()125 SPIRVMap<SPIRVExecutionModeKind, SPIRVCapabilityKind>::init() {
126 add(ExecutionModeInvocations, CapabilityGeometry);
127 add(ExecutionModeSpacingEqual, CapabilityTessellation);
128 add(ExecutionModeSpacingFractionalEven, CapabilityTessellation);
129 add(ExecutionModeSpacingFractionalOdd, CapabilityTessellation);
130 add(ExecutionModeVertexOrderCw, CapabilityTessellation);
131 add(ExecutionModeVertexOrderCcw, CapabilityTessellation);
132 add(ExecutionModePixelCenterInteger, CapabilityShader);
133 add(ExecutionModeOriginUpperLeft, CapabilityShader);
134 add(ExecutionModeOriginLowerLeft, CapabilityShader);
135 add(ExecutionModeEarlyFragmentTests, CapabilityShader);
136 add(ExecutionModePointMode, CapabilityTessellation);
137 add(ExecutionModeXfb, CapabilityShader);
138 add(ExecutionModeDepthReplacing, CapabilityShader);
139 add(ExecutionModeDepthGreater, CapabilityShader);
140 add(ExecutionModeDepthLess, CapabilityShader);
141 add(ExecutionModeDepthUnchanged, CapabilityShader);
142 add(ExecutionModeLocalSize, CapabilityNone);
143 add(ExecutionModeLocalSizeHint, CapabilityKernel);
144 add(ExecutionModeInputPoints, CapabilityGeometry);
145 add(ExecutionModeInputLines, CapabilityGeometry);
146 add(ExecutionModeInputLinesAdjacency, CapabilityGeometry);
147 add(ExecutionModeInputTriangles, CapabilityTessellation);
148 add(ExecutionModeInputTrianglesAdjacency, CapabilityGeometry);
149 add(ExecutionModeInputQuads, CapabilityGeometry);
150 add(ExecutionModeInputIsolines, CapabilityGeometry);
151 add(ExecutionModeOutputVertices, CapabilityTessellation);
152 add(ExecutionModeOutputPoints, CapabilityGeometry);
153 add(ExecutionModeOutputLineStrip, CapabilityGeometry);
154 add(ExecutionModeOutputTriangleStrip, CapabilityGeometry);
155 add(ExecutionModeVecTypeHint, CapabilityKernel);
156 add(ExecutionModeContractionOff, CapabilityKernel);
157 add(ExecutionModeInitializer, CapabilityKernel);
158 add(ExecutionModeFinalizer, CapabilityKernel);
159 add(ExecutionModeSubgroupSize, CapabilitySubgroupDispatch);
160 add(ExecutionModeSubgroupsPerWorkgroup, CapabilitySubgroupDispatch);
161 }
162
163 inline bool
isValid(SPIRVExecutionModeKind E)164 isValid(SPIRVExecutionModeKind E) {
165 return (unsigned)E < (unsigned)ExecutionModeCount;
166 }
167
168 inline bool
isValid(SPIRVLinkageTypeKind L)169 isValid(SPIRVLinkageTypeKind L) {
170 return (unsigned)L < (unsigned)LinkageTypeCount;
171 }
172
173 template<> inline void
init()174 SPIRVMap<SPIRVStorageClassKind, SPIRVCapabilityKind>::init() {
175 add(StorageClassUniformConstant, CapabilityNone);
176 add(StorageClassInput, CapabilityShader);
177 add(StorageClassUniform, CapabilityShader);
178 add(StorageClassOutput, CapabilityShader);
179 add(StorageClassWorkgroupLocal, CapabilityNone);
180 add(StorageClassWorkgroupGlobal, CapabilityNone);
181 add(StorageClassPrivateGlobal, CapabilityShader);
182 add(StorageClassFunction, CapabilityShader);
183 add(StorageClassGeneric, CapabilityKernel);
184 add(StorageClassAtomicCounter, CapabilityShader);
185 }
186
187 inline bool
isValid(SPIRVStorageClassKind StorageClass)188 isValid(SPIRVStorageClassKind StorageClass) {
189 return (unsigned)StorageClass < (unsigned)StorageClassCount;
190 }
191
192 inline bool
isValid(SPIRVFuncParamAttrKind FPA)193 isValid(SPIRVFuncParamAttrKind FPA) {
194 return (unsigned)FPA < (unsigned)FunctionParameterAttributeCount;
195 }
196
197 enum SPIRVExtInstSetKind {
198 SPIRVEIS_OpenCL,
199 SPIRVEIS_DebugInfo,
200 SPIRVEIS_OpenCL_DebugInfo_100,
201 SPIRVEIS_Count,
202 };
203
204 inline bool
isValid(SPIRVExtInstSetKind BIS)205 isValid(SPIRVExtInstSetKind BIS) {
206 return (unsigned)BIS < (unsigned)SPIRVEIS_Count;
207 }
208
209 template<> inline void
init()210 SPIRVMap<SPIRVExtInstSetKind, std::string>::init() {
211 add(SPIRVEIS_OpenCL, "OpenCL.std");
212 add(SPIRVEIS_DebugInfo, "SPIRV.debug");
213 add(SPIRVEIS_OpenCL_DebugInfo_100, "OpenCL.DebugInfo.100");
214 }
215 typedef SPIRVMap<SPIRVExtInstSetKind, std::string> SPIRVBuiltinSetNameMap;
216
217 inline bool
isValid(SPIRVBuiltinVariableKind Kind)218 isValid(SPIRVBuiltinVariableKind Kind) {
219 return (unsigned)Kind < (unsigned)BuiltInCount;
220 }
221
isValid(Scope Kind)222 inline bool isValid(Scope Kind) {
223 return (unsigned)Kind <= (unsigned)ScopeInvocation;
224 }
225
isValidSPIRVMemSemanticsMask(SPIRVWord MemMask)226 inline bool isValidSPIRVMemSemanticsMask(SPIRVWord MemMask) {
227 return MemMask < 1 << ((unsigned)MemorySemanticsImageMemoryShift + 1);
228 }
229
230 //enum SPIRVSamplerAddressingModeKind
231 typedef igc_spv::SamplerAddressingMode SPIRVSamplerAddressingModeKind;
232
233 //enum SPIRVSamplerFilterModeKind
234 typedef igc_spv::SamplerFilterMode SPIRVSamplerFilterModeKind;
235
isValid(SPIRVGroupOperationKind G)236 inline bool isValid(SPIRVGroupOperationKind G) {
237 return (unsigned)G < (unsigned)GroupOperationCount;
238 }
239
getImageDimension(SPIRVImageDimKind K)240 inline unsigned getImageDimension(SPIRVImageDimKind K) {
241 switch(K){
242 case Dim1D: return 1;
243 case Dim2D: return 2;
244 case Dim3D: return 3;
245 case DimCube: return 2;
246 case DimRect: return 2;
247 case DimBuffer: return 1;
248 default: return 0;
249 }
250 }
251
252 }
253
254
255 #endif /* SPIRVENUM_HPP_ */
256