1;=========================== begin_copyright_notice ============================
2;
3; Copyright (C) 2021 Intel Corporation
4;
5; SPDX-License-Identifier: MIT
6;
7;============================ end_copyright_notice =============================
8
9
10; RUN:          igc_opt -S --inpuths --platformskl --igc-merge-urb-writes %s | FileCheck %s -check-prefix=SKL
11;
12; SKL:          call void @llvm.genx.GenISA.URBWrite
13; SKL-SAME:    (i32 0, i32 17, float 0x3FD5555560000000, float undef, float undef, float undef, float 0x3FD5555560000000, float undef, float undef, float undef)
14; SKL-NOT:      call void @llvm.genx.GenISA.URBWrite({{.*}})
15
16define void @entry() #0 {
17Label-1:
18  call void @llvm.genx.GenISA.URBWrite(i32 0, i32 1, float 0x3FD5555560000000, float undef, float undef, float undef, float undef, float undef, float undef, float undef)
19  call void @llvm.genx.GenISA.URBWrite(i32 1, i32 1, float 0x3FD5555560000000, float undef, float undef, float undef, float undef, float undef, float undef, float undef)
20  ret void
21}
22
23; Function Attrs: nounwind
24declare void @llvm.genx.GenISA.URBWrite(i32, i32, float, float, float, float, float, float, float, float) #1
25
26attributes #0 = { "null-pointer-is-valid"="true" }
27attributes #1 = { nounwind }