1<!---======================= begin_copyright_notice ============================
2
3Copyright (C) 2020-2021 Intel Corporation
4
5SPDX-License-Identifier: MIT
6
7============================= end_copyright_notice ==========================-->
8
9
10
11## Opcode
12
13  AND = 0x20
14
15## Format
16
17| | | | | |
18| --- | --- | --- | --- | --- |
19| 0x20(AND) | Exec_size | Pred | Dst | Src0 | Src1 |
20
21
22## Semantics
23
24
25
26
27                    for (i = 0; < exec_size; ++i) {
28                      if (ChEn[i]) {
29                        dst[i] = src0[i] & src1[i];
30                      }
31                    }
32
33## Description
34
35
36    Performs component-wise bitwise AND of <src0> and <src1> and stores the result into <dst>.
37
38- **Exec_size(ub):** Execution size
39
40  - Bit[2..0]: size of the region for source and destination operands
41
42    - 0b000:  1 element (scalar)
43    - 0b001:  2 elements
44    - 0b010:  4 elements
45    - 0b011:  8 elements
46    - 0b100:  16 elements
47    - 0b101:  32 elements
48  - Bit[7..4]: execution mask (explicit control over the enabled channels)
49
50    - 0b0000:  M1
51    - 0b0001:  M2
52    - 0b0010:  M3
53    - 0b0011:  M4
54    - 0b0100:  M5
55    - 0b0101:  M6
56    - 0b0110:  M7
57    - 0b0111:  M8
58    - 0b1000:  M1_NM
59    - 0b1001:  M2_NM
60    - 0b1010:  M3_NM
61    - 0b1011:  M4_NM
62    - 0b1100:  M5_NM
63    - 0b1101:  M6_NM
64    - 0b1110:  M7_NM
65    - 0b1111:  M8_NM
66- **Pred(uw):** Predication control
67
68- **Dst(vec_operand):** The destination operand. Operand class: general,indirect,predicate
69
70- **Src0(vec_operand):** The first source operand. Operand class: general,indirect,predicate,immediate
71
72- **Src1(vec_operand):** The second source operand. Operand class: general,indirect,predicate,immediate
73
74#### Properties
75- **Supported Types:** B,BOOL,D,Q,UB,UD,UQ,UW,W
76- **Source Modifier:** logic
77
78
79## Text
80```
81
82
83  [(<P>)] AND (<exec_size>) <dst> <src0> <src1>
84    //(<P>) must be absent for predicate operands.
85```
86
87
88
89## Notes
90
91
92
93    The instruction may operate on predicate operands. In this mode, all operands must be predicates, and <pred> must be zero (no predication). If the operands are not predicates, all operands must have integer type.
94