1// REQUIRES: arm 2// RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t 3// RUN: ld.lld --emit-relocs %t -o %t2 4// RUN: llvm-objdump -s --triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s 5// RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s 6 7/// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations 8/// from synthetic table entries won't be represented. Given the known use cases 9/// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't 10/// use exceptions and the latter can derive the relocations from the table if 11/// they need them. 12 .syntax unified 13 /// Will produce an ARM.exidx entry with inline unwinding instructions 14 .section .text.func1, "ax",%progbits 15 .global func1 16func1: 17 .fnstart 18 bx lr 19 .save {r7, lr} 20 .setfp r7, sp, #0 21 .fnend 22 23 .syntax unified 24 .section .text.func2, "ax",%progbits 25/// A function with the same inline unwinding instructions, expect merge. 26 .global func2 27func2: 28 .fnstart 29 bx lr 30 .save {r7, lr} 31 .setfp r7, sp, #0 32 .fnend 33 34 .section .text.25, "ax", %progbits 35 .global func25 36func25: 37 .fnstart 38 bx lr 39 .cantunwind 40 .fnend 41 42 .section .text.26, "ax", %progbits 43 .global func26 44func26: 45 .fnstart 46 bx lr 47 .cantunwind 48 .fnend 49 50 .syntax unified 51 .section .text.func3, "ax",%progbits 52/// A function with the same inline unwinding instructions, expect merge. 53 .global func3 54func3: 55 .fnstart 56 bx lr 57 .save {r7, lr} 58 .setfp r7, sp, #0 59 .fnend 60 61 .section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits 62 .global __aeabi_unwind_cpp_pr0 63__aeabi_unwind_cpp_pr0: 64 bx lr 65 66// CHECK: Contents of section .ARM.exidx: 67// CHECK-NEXT: 100d4 28000100 08849780 28000100 01000000 68// CHECK-NEXT: 100e4 28000100 08849780 24000100 01000000 69// CHECK-NEXT: 100f4 20000100 01000000 70 71// CHECK-RELOCS-NOT: Relocation section '.rel.ARM.exidx' 72