1 //===-- MVEVPTBlockPass.cpp - Insert MVE VPT blocks -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "ARM.h"
10 #include "ARMMachineFunctionInfo.h"
11 #include "ARMSubtarget.h"
12 #include "MCTargetDesc/ARMBaseInfo.h"
13 #include "Thumb2InstrInfo.h"
14 #include "llvm/ADT/SmallSet.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineInstrBundle.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/IR/DebugLoc.h"
26 #include "llvm/MC/MCInstrDesc.h"
27 #include "llvm/MC/MCRegisterInfo.h"
28 #include "llvm/Support/Debug.h"
29 #include <cassert>
30 #include <new>
31
32 using namespace llvm;
33
34 #define DEBUG_TYPE "arm-mve-vpt"
35
36 namespace {
37 class MVEVPTBlock : public MachineFunctionPass {
38 public:
39 static char ID;
40 const Thumb2InstrInfo *TII;
41 const TargetRegisterInfo *TRI;
42
MVEVPTBlock()43 MVEVPTBlock() : MachineFunctionPass(ID) {}
44
45 bool runOnMachineFunction(MachineFunction &Fn) override;
46
getRequiredProperties() const47 MachineFunctionProperties getRequiredProperties() const override {
48 return MachineFunctionProperties().set(
49 MachineFunctionProperties::Property::NoVRegs);
50 }
51
getPassName() const52 StringRef getPassName() const override {
53 return "MVE VPT block insertion pass";
54 }
55
56 private:
57 bool InsertVPTBlocks(MachineBasicBlock &MBB);
58 };
59
60 char MVEVPTBlock::ID = 0;
61
62 } // end anonymous namespace
63
64 INITIALIZE_PASS(MVEVPTBlock, DEBUG_TYPE, "ARM MVE VPT block pass", false, false)
65
findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI,const TargetRegisterInfo * TRI,unsigned & NewOpcode)66 static MachineInstr *findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI,
67 const TargetRegisterInfo *TRI,
68 unsigned &NewOpcode) {
69 // Search backwards to the instruction that defines VPR. This may or not
70 // be a VCMP, we check that after this loop. If we find another instruction
71 // that reads cpsr, we return nullptr.
72 MachineBasicBlock::iterator CmpMI = MI;
73 while (CmpMI != MI->getParent()->begin()) {
74 --CmpMI;
75 if (CmpMI->modifiesRegister(ARM::VPR, TRI))
76 break;
77 if (CmpMI->readsRegister(ARM::VPR, TRI))
78 break;
79 }
80
81 if (CmpMI == MI)
82 return nullptr;
83 NewOpcode = VCMPOpcodeToVPT(CmpMI->getOpcode());
84 if (NewOpcode == 0)
85 return nullptr;
86
87 // Search forward from CmpMI to MI, checking if either register was def'd
88 if (registerDefinedBetween(CmpMI->getOperand(1).getReg(), std::next(CmpMI),
89 MI, TRI))
90 return nullptr;
91 if (registerDefinedBetween(CmpMI->getOperand(2).getReg(), std::next(CmpMI),
92 MI, TRI))
93 return nullptr;
94 return &*CmpMI;
95 }
96
97 // Advances Iter past a block of predicated instructions.
98 // Returns true if it successfully skipped the whole block of predicated
99 // instructions. Returns false when it stopped early (due to MaxSteps), or if
100 // Iter didn't point to a predicated instruction.
StepOverPredicatedInstrs(MachineBasicBlock::instr_iterator & Iter,MachineBasicBlock::instr_iterator EndIter,unsigned MaxSteps,unsigned & NumInstrsSteppedOver)101 static bool StepOverPredicatedInstrs(MachineBasicBlock::instr_iterator &Iter,
102 MachineBasicBlock::instr_iterator EndIter,
103 unsigned MaxSteps,
104 unsigned &NumInstrsSteppedOver) {
105 ARMVCC::VPTCodes NextPred = ARMVCC::None;
106 Register PredReg;
107 NumInstrsSteppedOver = 0;
108
109 while (Iter != EndIter) {
110 NextPred = getVPTInstrPredicate(*Iter, PredReg);
111 assert(NextPred != ARMVCC::Else &&
112 "VPT block pass does not expect Else preds");
113 if (NextPred == ARMVCC::None || MaxSteps == 0)
114 break;
115 --MaxSteps;
116 ++Iter;
117 ++NumInstrsSteppedOver;
118 };
119
120 return NumInstrsSteppedOver != 0 &&
121 (NextPred == ARMVCC::None || Iter == EndIter);
122 }
123
124 // Returns true if at least one instruction in the range [Iter, End) defines
125 // or kills VPR.
IsVPRDefinedOrKilledByBlock(MachineBasicBlock::iterator Iter,MachineBasicBlock::iterator End)126 static bool IsVPRDefinedOrKilledByBlock(MachineBasicBlock::iterator Iter,
127 MachineBasicBlock::iterator End) {
128 for (; Iter != End; ++Iter)
129 if (Iter->definesRegister(ARM::VPR) || Iter->killsRegister(ARM::VPR))
130 return true;
131 return false;
132 }
133
134 // Creates a T, TT, TTT or TTTT BlockMask depending on BlockSize.
GetInitialBlockMask(unsigned BlockSize)135 static ARM::PredBlockMask GetInitialBlockMask(unsigned BlockSize) {
136 switch (BlockSize) {
137 case 1:
138 return ARM::PredBlockMask::T;
139 case 2:
140 return ARM::PredBlockMask::TT;
141 case 3:
142 return ARM::PredBlockMask::TTT;
143 case 4:
144 return ARM::PredBlockMask::TTTT;
145 default:
146 llvm_unreachable("Invalid BlockSize!");
147 }
148 }
149
150 // Given an iterator (Iter) that points at an instruction with a "Then"
151 // predicate, tries to create the largest block of continuous predicated
152 // instructions possible, and returns the VPT Block Mask of that block.
153 //
154 // This will try to perform some minor optimization in order to maximize the
155 // size of the block.
156 static ARM::PredBlockMask
CreateVPTBlock(MachineBasicBlock::instr_iterator & Iter,MachineBasicBlock::instr_iterator EndIter,SmallVectorImpl<MachineInstr * > & DeadInstructions)157 CreateVPTBlock(MachineBasicBlock::instr_iterator &Iter,
158 MachineBasicBlock::instr_iterator EndIter,
159 SmallVectorImpl<MachineInstr *> &DeadInstructions) {
160 MachineBasicBlock::instr_iterator BlockBeg = Iter;
161 (void)BlockBeg;
162 assert(getVPTInstrPredicate(*Iter) == ARMVCC::Then &&
163 "Expected a Predicated Instruction");
164
165 LLVM_DEBUG(dbgs() << "VPT block created for: "; Iter->dump());
166
167 unsigned BlockSize;
168 StepOverPredicatedInstrs(Iter, EndIter, 4, BlockSize);
169
170 LLVM_DEBUG(for (MachineBasicBlock::instr_iterator AddedInstIter =
171 std::next(BlockBeg);
172 AddedInstIter != Iter; ++AddedInstIter) {
173 dbgs() << " adding: ";
174 AddedInstIter->dump();
175 });
176
177 // Generate the initial BlockMask
178 ARM::PredBlockMask BlockMask = GetInitialBlockMask(BlockSize);
179
180 // Remove VPNOTs while there's still room in the block, so we can make the
181 // largest block possible.
182 ARMVCC::VPTCodes CurrentPredicate = ARMVCC::Else;
183 while (BlockSize < 4 && Iter != EndIter &&
184 Iter->getOpcode() == ARM::MVE_VPNOT) {
185
186 // Try to skip all of the predicated instructions after the VPNOT, stopping
187 // after (4 - BlockSize). If we can't skip them all, stop.
188 unsigned ElseInstCnt = 0;
189 MachineBasicBlock::instr_iterator VPNOTBlockEndIter = std::next(Iter);
190 if (!StepOverPredicatedInstrs(VPNOTBlockEndIter, EndIter, (4 - BlockSize),
191 ElseInstCnt))
192 break;
193
194 // Check if this VPNOT can be removed or not: It can only be removed if at
195 // least one of the predicated instruction that follows it kills or sets
196 // VPR.
197 if (!IsVPRDefinedOrKilledByBlock(Iter, VPNOTBlockEndIter))
198 break;
199
200 LLVM_DEBUG(dbgs() << " removing VPNOT: "; Iter->dump(););
201
202 // Record the new size of the block
203 BlockSize += ElseInstCnt;
204 assert(BlockSize <= 4 && "Block is too large!");
205
206 // Record the VPNot to remove it later.
207 DeadInstructions.push_back(&*Iter);
208 ++Iter;
209
210 // Replace the predicates of the instructions we're adding.
211 // Note that we are using "Iter" to iterate over the block so we can update
212 // it at the same time.
213 for (; Iter != VPNOTBlockEndIter; ++Iter) {
214 // Find the register in which the predicate is
215 int OpIdx = findFirstVPTPredOperandIdx(*Iter);
216 assert(OpIdx != -1);
217
218 // Change the predicate and update the mask
219 Iter->getOperand(OpIdx).setImm(CurrentPredicate);
220 BlockMask = expandPredBlockMask(BlockMask, CurrentPredicate);
221
222 LLVM_DEBUG(dbgs() << " adding : "; Iter->dump());
223 }
224
225 CurrentPredicate =
226 (CurrentPredicate == ARMVCC::Then ? ARMVCC::Else : ARMVCC::Then);
227 }
228 return BlockMask;
229 }
230
InsertVPTBlocks(MachineBasicBlock & Block)231 bool MVEVPTBlock::InsertVPTBlocks(MachineBasicBlock &Block) {
232 bool Modified = false;
233 MachineBasicBlock::instr_iterator MBIter = Block.instr_begin();
234 MachineBasicBlock::instr_iterator EndIter = Block.instr_end();
235
236 SmallVector<MachineInstr *, 4> DeadInstructions;
237
238 while (MBIter != EndIter) {
239 MachineInstr *MI = &*MBIter;
240 Register PredReg;
241 DebugLoc DL = MI->getDebugLoc();
242
243 ARMVCC::VPTCodes Pred = getVPTInstrPredicate(*MI, PredReg);
244
245 // The idea of the predicate is that None, Then and Else are for use when
246 // handling assembly language: they correspond to the three possible
247 // suffixes "", "t" and "e" on the mnemonic. So when instructions are read
248 // from assembly source or disassembled from object code, you expect to
249 // see a mixture whenever there's a long VPT block. But in code
250 // generation, we hope we'll never generate an Else as input to this pass.
251 assert(Pred != ARMVCC::Else && "VPT block pass does not expect Else preds");
252
253 if (Pred == ARMVCC::None) {
254 ++MBIter;
255 continue;
256 }
257
258 ARM::PredBlockMask BlockMask =
259 CreateVPTBlock(MBIter, EndIter, DeadInstructions);
260
261 // Search back for a VCMP that can be folded to create a VPT, or else
262 // create a VPST directly
263 MachineInstrBuilder MIBuilder;
264 unsigned NewOpcode;
265 LLVM_DEBUG(dbgs() << " final block mask: " << (unsigned)BlockMask << "\n");
266 if (MachineInstr *VCMP = findVCMPToFoldIntoVPST(MI, TRI, NewOpcode)) {
267 LLVM_DEBUG(dbgs() << " folding VCMP into VPST: "; VCMP->dump());
268 MIBuilder = BuildMI(Block, MI, DL, TII->get(NewOpcode));
269 MIBuilder.addImm((uint64_t)BlockMask);
270 MIBuilder.add(VCMP->getOperand(1));
271 MIBuilder.add(VCMP->getOperand(2));
272 MIBuilder.add(VCMP->getOperand(3));
273 VCMP->eraseFromParent();
274 } else {
275 MIBuilder = BuildMI(Block, MI, DL, TII->get(ARM::MVE_VPST));
276 MIBuilder.addImm((uint64_t)BlockMask);
277 }
278
279 finalizeBundle(
280 Block, MachineBasicBlock::instr_iterator(MIBuilder.getInstr()), MBIter);
281
282 Modified = true;
283 }
284
285 // Erase all dead instructions
286 for (MachineInstr *DeadMI : DeadInstructions) {
287 if (DeadMI->isInsideBundle())
288 DeadMI->eraseFromBundle();
289 else
290 DeadMI->eraseFromParent();
291 }
292
293 return Modified;
294 }
295
runOnMachineFunction(MachineFunction & Fn)296 bool MVEVPTBlock::runOnMachineFunction(MachineFunction &Fn) {
297 const ARMSubtarget &STI =
298 static_cast<const ARMSubtarget &>(Fn.getSubtarget());
299
300 if (!STI.isThumb2() || !STI.hasMVEIntegerOps())
301 return false;
302
303 TII = static_cast<const Thumb2InstrInfo *>(STI.getInstrInfo());
304 TRI = STI.getRegisterInfo();
305
306 LLVM_DEBUG(dbgs() << "********** ARM MVE VPT BLOCKS **********\n"
307 << "********** Function: " << Fn.getName() << '\n');
308
309 bool Modified = false;
310 for (MachineBasicBlock &MBB : Fn)
311 Modified |= InsertVPTBlocks(MBB);
312
313 LLVM_DEBUG(dbgs() << "**************************************\n");
314 return Modified;
315 }
316
317 /// createMVEVPTBlock - Returns an instance of the MVE VPT block
318 /// insertion pass.
createMVEVPTBlockPass()319 FunctionPass *llvm::createMVEVPTBlockPass() { return new MVEVPTBlock(); }
320