1 //===-- MipsBaseInfo.h - Top level definitions for MIPS MC ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains small standalone helper functions and enum definitions for 10 // the Mips target useful for the compiler back-end and the MC libraries. 11 // 12 //===----------------------------------------------------------------------===// 13 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSBASEINFO_H 14 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSBASEINFO_H 15 16 #include "MipsFixupKinds.h" 17 #include "MipsMCTargetDesc.h" 18 #include "llvm/MC/MCExpr.h" 19 #include "llvm/MC/MCInstrDesc.h" 20 #include "llvm/Support/DataTypes.h" 21 #include "llvm/Support/ErrorHandling.h" 22 23 namespace llvm { 24 25 namespace Mips { 26 enum OperandType { 27 /// Operands with register or 32-bit immediate 28 OPERAND_CHERI_GPR_OR_DDC = MCOI::OPERAND_FIRST_TARGET, 29 OPERAND_CHERI_GPR_OR_NULL 30 }; 31 } 32 33 /// MipsII - This namespace holds all of the target specific flags that 34 /// instruction info tracks. 35 /// 36 namespace MipsII { 37 /// Target Operand Flag enum. 38 enum TOF { 39 //===------------------------------------------------------------------===// 40 // Mips Specific MachineOperand flags. 41 42 MO_NO_FLAG, 43 44 /// MO_GOT - Represents the offset into the global offset table at which 45 /// the address the relocation entry symbol resides during execution. 46 MO_GOT, 47 48 /// MO_GOT_CALL - Represents the offset into the global offset table at 49 /// which the address of a call site relocation entry symbol resides 50 /// during execution. This is different from the above since this flag 51 /// can only be present in call instructions. 52 MO_GOT_CALL, 53 54 /// MO_GPREL - Represents the offset from the current gp value to be used 55 /// for the relocatable object file being produced. 56 MO_GPREL, 57 58 /// MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol 59 /// address. 60 MO_ABS_HI, 61 MO_ABS_LO, 62 63 /// MO_TLSGD - Represents the offset into the global offset table at which 64 // the module ID and TSL block offset reside during execution (General 65 // Dynamic TLS). 66 MO_TLSGD, 67 68 /// MO_TLSLDM - Represents the offset into the global offset table at which 69 // the module ID and TSL block offset reside during execution (Local 70 // Dynamic TLS). 71 MO_TLSLDM, 72 MO_DTPREL_HI, 73 MO_DTPREL_LO, 74 75 /// MO_GOTTPREL - Represents the offset from the thread pointer (Initial 76 // Exec TLS). 77 MO_GOTTPREL, 78 79 /// MO_TPREL_HI/LO - Represents the hi and low part of the offset from 80 // the thread pointer (Local Exec TLS). 81 MO_TPREL_HI, 82 MO_TPREL_LO, 83 84 // N32/64 Flags. 85 MO_GPOFF_HI, 86 MO_GPOFF_LO, 87 MO_GOT_DISP, 88 MO_GOT_PAGE, 89 MO_GOT_OFST, 90 91 /// MO_HIGHER/HIGHEST - Represents the highest or higher half word of a 92 /// 64-bit symbol address. 93 MO_HIGHER, 94 MO_HIGHEST, 95 96 /// MO_GOT_HI16/LO16, MO_CALL_HI16/LO16 - Relocations used for large GOTs. 97 MO_GOT_HI16, 98 MO_GOT_LO16, 99 MO_CALL_HI16, 100 MO_CALL_LO16, 101 102 /// Helper operand used to generate R_MIPS_JALR 103 MO_JALR, 104 105 /// MO_PCREL_HI/LO - Represents the hi or low part of an PC-relative symbol 106 /// address. 107 MO_PCREL_HI, 108 MO_PCREL_LO, 109 110 /// CHERI capability relocations: 111 MO_CAPTAB11, // offset into the capability table 112 MO_CAPTAB_CALL11, // same as above but only for calls 113 // same with 16-bit immediate shifted by 4 version using new clc/csc instructions: 114 MO_CAPTAB20, 115 MO_CAPTAB_CALL20, 116 /// Same relocations with large offsets: 117 MO_CAPTAB_LO16, 118 MO_CAPTAB_HI16, 119 MO_CAPTAB_CALL_LO16, 120 MO_CAPTAB_CALL_HI16, 121 122 // Offset to the capability table 123 MO_CAPTABLE_OFF_HI, 124 MO_CAPTABLE_OFF_LO, 125 126 /// MO_CAPTAB_TLSGD* - Represents the offset into the capability table at 127 // which the module ID and TSL block offset reside during execution (General 128 // Dynamic TLS). 129 MO_CAPTAB_TLSGD_HI16, 130 MO_CAPTAB_TLSGD_LO16, 131 132 /// MO_CAPTAB_TLSLDM* - Represents the offset into the capability table at 133 // which the module ID and TSL block offset reside during execution (Local 134 // Dynamic TLS). 135 MO_CAPTAB_TLSLDM_HI16, 136 MO_CAPTAB_TLSLDM_LO16, 137 138 /// MO_CAPTAB_TPREL* - Represents the offset into the capability table at 139 // which the offset from the thread pointer resides during execution 140 // (Initial Exec TLS). 141 MO_CAPTAB_TPREL_HI16, 142 MO_CAPTAB_TPREL_LO16, 143 }; 144 145 enum { 146 //===------------------------------------------------------------------===// 147 // Instruction encodings. These are the standard/most common forms for 148 // Mips instructions. 149 // 150 151 // Pseudo - This represents an instruction that is a pseudo instruction 152 // or one that has not been implemented yet. It is illegal to code generate 153 // it, but tolerated for intermediate implementation stages. 154 Pseudo = 0, 155 156 /// FrmR - This form is for instructions of the format R. 157 FrmR = 1, 158 /// FrmI - This form is for instructions of the format I. 159 FrmI = 2, 160 /// FrmJ - This form is for instructions of the format J. 161 FrmJ = 3, 162 /// FrmFR - This form is for instructions of the format FR. 163 FrmFR = 4, 164 /// FrmFI - This form is for instructions of the format FI. 165 FrmFI = 5, 166 /// FrmOther - This form is for instructions that have no specific format. 167 FrmOther = 6, 168 169 FormMask = 15, 170 /// IsCTI - Instruction is a Control Transfer Instruction. 171 IsCTI = 1 << 4, 172 /// HasForbiddenSlot - Instruction has a forbidden slot. 173 HasForbiddenSlot = 1 << 5, 174 /// HasFCCRegOperand - Instruction uses an $fcc<x> register. 175 HasFCCRegOperand = 1 << 6 176 177 }; 178 179 enum OperandType : unsigned { 180 OPERAND_FIRST_MIPS_MEM_IMM = MCOI::OPERAND_FIRST_TARGET, 181 OPERAND_MEM_SIMM9 = OPERAND_FIRST_MIPS_MEM_IMM, 182 OPERAND_LAST_MIPS_MEM_IMM = OPERAND_MEM_SIMM9 183 }; 184 } 185 } 186 187 #endif 188