1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -instcombine < %s | FileCheck %s 3; <rdar://problem/8558713> 4 5declare void @throwAnExceptionOrWhatever() 6 7define i32 @test1(i32 %a, i32 %b) nounwind ssp { 8; CHECK-LABEL: @test1( 9; CHECK-NEXT: entry: 10; CHECK-NEXT: [[SADD:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[B:%.*]], i32 [[A:%.*]]) 11; CHECK-NEXT: [[TMP0:%.*]] = extractvalue { i32, i1 } [[SADD]], 1 12; CHECK-NEXT: br i1 [[TMP0]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 13; CHECK: if.then: 14; CHECK-NEXT: tail call void @throwAnExceptionOrWhatever() #2 15; CHECK-NEXT: br label [[IF_END]] 16; CHECK: if.end: 17; CHECK-NEXT: [[SADD_RESULT:%.*]] = extractvalue { i32, i1 } [[SADD]], 0 18; CHECK-NEXT: ret i32 [[SADD_RESULT]] 19; 20entry: 21 %conv = sext i32 %a to i64 22 %conv2 = sext i32 %b to i64 23 %add = add nsw i64 %conv2, %conv 24 %add.off = add i64 %add, 2147483648 25 %0 = icmp ugt i64 %add.off, 4294967295 26 br i1 %0, label %if.then, label %if.end 27 28if.then: 29 tail call void @throwAnExceptionOrWhatever() nounwind 30 br label %if.end 31 32if.end: 33 %conv9 = trunc i64 %add to i32 34 ret i32 %conv9 35} 36 37; This form should not be promoted for two reasons: 1) it is unprofitable to 38; promote it since the add.off instruction has another use, and 2) it is unsafe 39; because the add-with-off makes the high bits of the original add live. 40 41define i32 @test2(i32 %a, i32 %b, i64* %P) nounwind ssp { 42; CHECK-LABEL: @test2( 43; CHECK-NEXT: entry: 44; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64 45; CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[B:%.*]] to i64 46; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV2]], [[CONV]] 47; CHECK-NEXT: [[ADD_OFF:%.*]] = add nsw i64 [[ADD]], 2147483648 48; CHECK-NEXT: store i64 [[ADD_OFF]], i64* [[P:%.*]], align 4 49; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i64 [[ADD_OFF]], 4294967295 50; CHECK-NEXT: br i1 [[TMP0]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 51; CHECK: if.then: 52; CHECK-NEXT: tail call void @throwAnExceptionOrWhatever() #2 53; CHECK-NEXT: br label [[IF_END]] 54; CHECK: if.end: 55; CHECK-NEXT: [[CONV9:%.*]] = trunc i64 [[ADD]] to i32 56; CHECK-NEXT: ret i32 [[CONV9]] 57; 58entry: 59 %conv = sext i32 %a to i64 60 %conv2 = sext i32 %b to i64 61 %add = add nsw i64 %conv2, %conv 62 %add.off = add i64 %add, 2147483648 63 store i64 %add.off, i64* %P 64 %0 = icmp ugt i64 %add.off, 4294967295 65 br i1 %0, label %if.then, label %if.end 66 67if.then: 68 tail call void @throwAnExceptionOrWhatever() nounwind 69 br label %if.end 70 71if.end: 72 %conv9 = trunc i64 %add to i32 73 ret i32 %conv9 74} 75 76; PR8816 77; This is illegal to transform because the high bits of the original add are 78; live out. 79define i64 @test3(i32 %a, i32 %b) nounwind ssp { 80; CHECK-LABEL: @test3( 81; CHECK-NEXT: entry: 82; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64 83; CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[B:%.*]] to i64 84; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV2]], [[CONV]] 85; CHECK-NEXT: [[ADD_OFF:%.*]] = add nsw i64 [[ADD]], 2147483648 86; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i64 [[ADD_OFF]], 4294967295 87; CHECK-NEXT: br i1 [[TMP0]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 88; CHECK: if.then: 89; CHECK-NEXT: tail call void @throwAnExceptionOrWhatever() #2 90; CHECK-NEXT: br label [[IF_END]] 91; CHECK: if.end: 92; CHECK-NEXT: ret i64 [[ADD]] 93; 94entry: 95 %conv = sext i32 %a to i64 96 %conv2 = sext i32 %b to i64 97 %add = add nsw i64 %conv2, %conv 98 %add.off = add i64 %add, 2147483648 99 %0 = icmp ugt i64 %add.off, 4294967295 100 br i1 %0, label %if.then, label %if.end 101 102if.then: 103 tail call void @throwAnExceptionOrWhatever() nounwind 104 br label %if.end 105 106if.end: 107 ret i64 %add 108} 109 110; Should be able to form an i8 sadd computed in an i32. 111 112define zeroext i8 @test4(i8 signext %a, i8 signext %b) nounwind ssp { 113; CHECK-LABEL: @test4( 114; CHECK-NEXT: entry: 115; CHECK-NEXT: [[SADD:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[B:%.*]], i8 [[A:%.*]]) 116; CHECK-NEXT: [[CMP:%.*]] = extractvalue { i8, i1 } [[SADD]], 1 117; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 118; CHECK: if.then: 119; CHECK-NEXT: tail call void @throwAnExceptionOrWhatever() #2 120; CHECK-NEXT: unreachable 121; CHECK: if.end: 122; CHECK-NEXT: [[SADD_RESULT:%.*]] = extractvalue { i8, i1 } [[SADD]], 0 123; CHECK-NEXT: ret i8 [[SADD_RESULT]] 124; 125entry: 126 %conv = sext i8 %a to i32 127 %conv2 = sext i8 %b to i32 128 %add = add nsw i32 %conv2, %conv 129 %add4 = add nsw i32 %add, 128 130 %cmp = icmp ugt i32 %add4, 255 131 br i1 %cmp, label %if.then, label %if.end 132if.then: 133 tail call void @throwAnExceptionOrWhatever() nounwind 134 unreachable 135 136if.end: 137 %conv7 = trunc i32 %add to i8 138 ret i8 %conv7 139} 140 141; PR11438 142; This is @test1, but the operands are not sign-extended. Make sure 143; we don't transform this case. 144 145define i32 @test8(i64 %a, i64 %b) nounwind ssp { 146; CHECK-LABEL: @test8( 147; CHECK-NEXT: entry: 148; CHECK-NEXT: [[ADD:%.*]] = add i64 [[A:%.*]], [[B:%.*]] 149; CHECK-NEXT: [[ADD_OFF:%.*]] = add i64 [[ADD]], 2147483648 150; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i64 [[ADD_OFF]], 4294967295 151; CHECK-NEXT: br i1 [[TMP0]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 152; CHECK: if.then: 153; CHECK-NEXT: tail call void @throwAnExceptionOrWhatever() #2 154; CHECK-NEXT: br label [[IF_END]] 155; CHECK: if.end: 156; CHECK-NEXT: [[CONV9:%.*]] = trunc i64 [[ADD]] to i32 157; CHECK-NEXT: ret i32 [[CONV9]] 158; 159entry: 160 %add = add i64 %a, %b 161 %add.off = add i64 %add, 2147483648 162 %0 = icmp ugt i64 %add.off, 4294967295 163 br i1 %0, label %if.then, label %if.end 164 165if.then: 166 tail call void @throwAnExceptionOrWhatever() nounwind 167 br label %if.end 168 169if.end: 170 %conv9 = trunc i64 %add to i32 171 ret i32 %conv9 172} 173 174