1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK2
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK4
8
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK12
22
23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 template <class T>
34 struct S {
35 T f;
SS36 S(T a) : f(a) {}
SS37 S() : f() {}
operator TS38 operator T() { return T(); }
~SS39 ~S() {}
40 };
41
42 template <typename T>
tmain()43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target
50 #pragma omp teams
51 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var)
52 for (int i = 0; i < 2; ++i) {
53 vec[i] = t_var;
54 s_arr[i] = var;
55 }
56 return T();
57 }
58
main()59 int main() {
60 static int svar;
61 volatile double g;
62 volatile double &g1 = g;
63
64 #ifdef LAMBDA
65 [&]() {
66 static float sfvar;
67
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute firstprivate(g, g1, svar, sfvar)
71 for (int i = 0; i < 2; ++i) {
72 // Private alloca's for conversion
73
74 // Actual private variables to be used in the body (tmp is used for the reference type)
75
76 // Store input parameter addresses into private alloca's for conversion
77
78 g += 1;
79 g1 += 1;
80 svar += 3;
81 sfvar += 4.0;
82
83 // call inner lambda (use refs to private alloca's)
84 [&]() {
85 g += 2;
86 g1 += 2;
87 svar += 4;
88 sfvar += 8.0;
89
90
91
92 }();
93 }
94 }();
95 return 0;
96 #else
97 S<float> test;
98 int t_var = 0;
99 int vec[] = {1, 2};
100 S<float> s_arr[] = {1, 2};
101 S<float> &var = test;
102
103 #pragma omp target
104 #pragma omp teams
105 #pragma omp distribute firstprivate(t_var, vec, s_arr, s_arr, var, var, svar)
106 for (int i = 0; i < 2; ++i) {
107 vec[i] = t_var;
108 s_arr[i] = var;
109 }
110 return tmain<int>();
111 #endif
112 }
113
114
115
116
117 // discard omp loop variables
118
119
120
121 // init t_var
122
123 // init vec
124
125 // init s_arr
126
127
128 // init var
129
130 // init svar
131
132
133
134 // Template
135
136
137
138 // discard omp loop variables
139
140
141
142 // init t_var
143
144 // init vec
145
146 // init s_arr
147
148
149 // init var
150
151
152 #endif
153 // CHECK1-LABEL: define {{[^@]+}}@main
154 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
155 // CHECK1-NEXT: entry:
156 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
157 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
158 // CHECK1-NEXT: [[G1:%.*]] = alloca double*, align 8
159 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
160 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
161 // CHECK1-NEXT: store double* [[G]], double** [[G1]], align 8
162 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
163 // CHECK1-NEXT: store double* [[G]], double** [[TMP0]], align 8
164 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
165 // CHECK1-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
166 // CHECK1-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
167 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
168 // CHECK1-NEXT: ret i32 0
169 //
170 //
171 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
172 // CHECK1-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
173 // CHECK1-NEXT: entry:
174 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
175 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
176 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
177 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
178 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
179 // CHECK1-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
180 // CHECK1-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
181 // CHECK1-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
182 // CHECK1-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
183 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
184 // CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
185 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
186 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
187 // CHECK1-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
188 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
189 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
190 // CHECK1-NEXT: ret void
191 //
192 //
193 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
194 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
195 // CHECK1-NEXT: entry:
196 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
197 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
198 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
199 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
200 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
201 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
202 // CHECK1-NEXT: [[TMP:%.*]] = alloca double*, align 8
203 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
204 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
205 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
206 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
207 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
208 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
209 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
210 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
211 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
212 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
213 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
214 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
215 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
216 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
217 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
218 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
219 // CHECK1-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
220 // CHECK1-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
221 // CHECK1-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
222 // CHECK1-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
223 // CHECK1-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
224 // CHECK1-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
225 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
226 // CHECK1-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
227 // CHECK1-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
228 // CHECK1-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
229 // CHECK1-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
230 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
231 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
232 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
233 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
234 // CHECK1-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8
235 // CHECK1-NEXT: store double [[TMP5]], double* [[G3]], align 8
236 // CHECK1-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8
237 // CHECK1-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8
238 // CHECK1-NEXT: store double [[TMP7]], double* [[G14]], align 8
239 // CHECK1-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
240 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
241 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
242 // CHECK1-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
243 // CHECK1-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
244 // CHECK1-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
245 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
246 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
247 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
248 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
249 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
250 // CHECK1: cond.true:
251 // CHECK1-NEXT: br label [[COND_END:%.*]]
252 // CHECK1: cond.false:
253 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
254 // CHECK1-NEXT: br label [[COND_END]]
255 // CHECK1: cond.end:
256 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
257 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
258 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
259 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
260 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
261 // CHECK1: omp.inner.for.cond:
262 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
263 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
264 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
265 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
266 // CHECK1: omp.inner.for.body:
267 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
268 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
269 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
270 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
271 // CHECK1-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8
272 // CHECK1-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00
273 // CHECK1-NEXT: store double [[ADD9]], double* [[G3]], align 8
274 // CHECK1-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8
275 // CHECK1-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8
276 // CHECK1-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00
277 // CHECK1-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8
278 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4
279 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3
280 // CHECK1-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4
281 // CHECK1-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4
282 // CHECK1-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double
283 // CHECK1-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00
284 // CHECK1-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
285 // CHECK1-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4
286 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
287 // CHECK1-NEXT: store double* [[G3]], double** [[TMP23]], align 8
288 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
289 // CHECK1-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8
290 // CHECK1-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8
291 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
292 // CHECK1-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8
293 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
294 // CHECK1-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8
295 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
296 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
297 // CHECK1: omp.body.continue:
298 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
299 // CHECK1: omp.inner.for.inc:
300 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
301 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1
302 // CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
303 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
304 // CHECK1: omp.inner.for.end:
305 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
306 // CHECK1: omp.loop.exit:
307 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
308 // CHECK1-NEXT: ret void
309 //
310 //
311 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
312 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
313 // CHECK1-NEXT: entry:
314 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
315 // CHECK1-NEXT: ret void
316 //
317 //
318 // CHECK2-LABEL: define {{[^@]+}}@main
319 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
320 // CHECK2-NEXT: entry:
321 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
322 // CHECK2-NEXT: [[G:%.*]] = alloca double, align 8
323 // CHECK2-NEXT: [[G1:%.*]] = alloca double*, align 8
324 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
325 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4
326 // CHECK2-NEXT: store double* [[G]], double** [[G1]], align 8
327 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
328 // CHECK2-NEXT: store double* [[G]], double** [[TMP0]], align 8
329 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
330 // CHECK2-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 8
331 // CHECK2-NEXT: store double* [[TMP2]], double** [[TMP1]], align 8
332 // CHECK2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 8 dereferenceable(16) [[REF_TMP]])
333 // CHECK2-NEXT: ret i32 0
334 //
335 //
336 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
337 // CHECK2-SAME: (i64 [[G:%.*]], i64 [[G1:%.*]], i64 [[SVAR:%.*]], i64 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
338 // CHECK2-NEXT: entry:
339 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
340 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
341 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
342 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
343 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
344 // CHECK2-NEXT: store i64 [[G]], i64* [[G_ADDR]], align 8
345 // CHECK2-NEXT: store i64 [[G1]], i64* [[G1_ADDR]], align 8
346 // CHECK2-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
347 // CHECK2-NEXT: store i64 [[SFVAR]], i64* [[SFVAR_ADDR]], align 8
348 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[G_ADDR]] to double*
349 // CHECK2-NEXT: [[CONV1:%.*]] = bitcast i64* [[G1_ADDR]] to double*
350 // CHECK2-NEXT: [[CONV2:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
351 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[SFVAR_ADDR]] to float*
352 // CHECK2-NEXT: store double* [[CONV1]], double** [[TMP]], align 8
353 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[TMP]], align 8
354 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[CONV]], double* [[TMP0]], i32* [[CONV2]], float* [[CONV3]])
355 // CHECK2-NEXT: ret void
356 //
357 //
358 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
359 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 8 dereferenceable(8) [[G:%.*]], double* nonnull align 8 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
360 // CHECK2-NEXT: entry:
361 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
362 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
363 // CHECK2-NEXT: [[G_ADDR:%.*]] = alloca double*, align 8
364 // CHECK2-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 8
365 // CHECK2-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
366 // CHECK2-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 8
367 // CHECK2-NEXT: [[TMP:%.*]] = alloca double*, align 8
368 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca double*, align 8
369 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
370 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
371 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
372 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
373 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
374 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
375 // CHECK2-NEXT: [[G3:%.*]] = alloca double, align 8
376 // CHECK2-NEXT: [[G14:%.*]] = alloca double, align 8
377 // CHECK2-NEXT: [[_TMP5:%.*]] = alloca double*, align 8
378 // CHECK2-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
379 // CHECK2-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
380 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
381 // CHECK2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
382 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
383 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
384 // CHECK2-NEXT: store double* [[G]], double** [[G_ADDR]], align 8
385 // CHECK2-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 8
386 // CHECK2-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
387 // CHECK2-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 8
388 // CHECK2-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 8
389 // CHECK2-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 8
390 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
391 // CHECK2-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 8
392 // CHECK2-NEXT: store double* [[TMP1]], double** [[TMP]], align 8
393 // CHECK2-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 8
394 // CHECK2-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 8
395 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
396 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
397 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
398 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
399 // CHECK2-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8
400 // CHECK2-NEXT: store double [[TMP5]], double* [[G3]], align 8
401 // CHECK2-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 8
402 // CHECK2-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 8
403 // CHECK2-NEXT: store double [[TMP7]], double* [[G14]], align 8
404 // CHECK2-NEXT: store double* [[G14]], double** [[_TMP5]], align 8
405 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
406 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
407 // CHECK2-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
408 // CHECK2-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
409 // CHECK2-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
410 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
411 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
412 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
413 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
414 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
415 // CHECK2: cond.true:
416 // CHECK2-NEXT: br label [[COND_END:%.*]]
417 // CHECK2: cond.false:
418 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
419 // CHECK2-NEXT: br label [[COND_END]]
420 // CHECK2: cond.end:
421 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
422 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
423 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
424 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
425 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
426 // CHECK2: omp.inner.for.cond:
427 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
428 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
429 // CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
430 // CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
431 // CHECK2: omp.inner.for.body:
432 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
433 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
434 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
435 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
436 // CHECK2-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8
437 // CHECK2-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00
438 // CHECK2-NEXT: store double [[ADD9]], double* [[G3]], align 8
439 // CHECK2-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 8
440 // CHECK2-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 8
441 // CHECK2-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00
442 // CHECK2-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 8
443 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4
444 // CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3
445 // CHECK2-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4
446 // CHECK2-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4
447 // CHECK2-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double
448 // CHECK2-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00
449 // CHECK2-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
450 // CHECK2-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4
451 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
452 // CHECK2-NEXT: store double* [[G3]], double** [[TMP23]], align 8
453 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
454 // CHECK2-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 8
455 // CHECK2-NEXT: store double* [[TMP25]], double** [[TMP24]], align 8
456 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
457 // CHECK2-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 8
458 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
459 // CHECK2-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 8
460 // CHECK2-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(32) [[REF_TMP]])
461 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
462 // CHECK2: omp.body.continue:
463 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
464 // CHECK2: omp.inner.for.inc:
465 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
466 // CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1
467 // CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
468 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
469 // CHECK2: omp.inner.for.end:
470 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
471 // CHECK2: omp.loop.exit:
472 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
473 // CHECK2-NEXT: ret void
474 //
475 //
476 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
477 // CHECK2-SAME: () #[[ATTR4:[0-9]+]] {
478 // CHECK2-NEXT: entry:
479 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
480 // CHECK2-NEXT: ret void
481 //
482 //
483 // CHECK3-LABEL: define {{[^@]+}}@main
484 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
485 // CHECK3-NEXT: entry:
486 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
487 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
488 // CHECK3-NEXT: [[G1:%.*]] = alloca double*, align 4
489 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
490 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
491 // CHECK3-NEXT: store double* [[G]], double** [[G1]], align 4
492 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
493 // CHECK3-NEXT: store double* [[G]], double** [[TMP0]], align 4
494 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
495 // CHECK3-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
496 // CHECK3-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
497 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
498 // CHECK3-NEXT: ret i32 0
499 //
500 //
501 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
502 // CHECK3-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
503 // CHECK3-NEXT: entry:
504 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
505 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
506 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
507 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
508 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
509 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
510 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
511 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
512 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
513 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
514 // CHECK3-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
515 // CHECK3-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
516 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
517 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
518 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
519 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
520 // CHECK3-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
521 // CHECK3-NEXT: store double [[TMP2]], double* [[G2]], align 8
522 // CHECK3-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
523 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
524 // CHECK3-NEXT: store double [[TMP4]], double* [[G13]], align 8
525 // CHECK3-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
526 // CHECK3-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
527 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
528 // CHECK3-NEXT: ret void
529 //
530 //
531 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
532 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
533 // CHECK3-NEXT: entry:
534 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
535 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
536 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
537 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
538 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
539 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
540 // CHECK3-NEXT: [[TMP:%.*]] = alloca double*, align 4
541 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
542 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
543 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
544 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
545 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
546 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
547 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
548 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
549 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
550 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
551 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
552 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
553 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
554 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
555 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
556 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
557 // CHECK3-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
558 // CHECK3-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
559 // CHECK3-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
560 // CHECK3-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
561 // CHECK3-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
562 // CHECK3-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
563 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
564 // CHECK3-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
565 // CHECK3-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
566 // CHECK3-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
567 // CHECK3-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
568 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
569 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
570 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
571 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
572 // CHECK3-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8
573 // CHECK3-NEXT: store double [[TMP5]], double* [[G3]], align 8
574 // CHECK3-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4
575 // CHECK3-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4
576 // CHECK3-NEXT: store double [[TMP7]], double* [[G14]], align 8
577 // CHECK3-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
578 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
579 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
580 // CHECK3-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
581 // CHECK3-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
582 // CHECK3-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
583 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
584 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
585 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
586 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
587 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
588 // CHECK3: cond.true:
589 // CHECK3-NEXT: br label [[COND_END:%.*]]
590 // CHECK3: cond.false:
591 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
592 // CHECK3-NEXT: br label [[COND_END]]
593 // CHECK3: cond.end:
594 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
595 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
596 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
597 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
598 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
599 // CHECK3: omp.inner.for.cond:
600 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
601 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
602 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
603 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
604 // CHECK3: omp.inner.for.body:
605 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
606 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
607 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
608 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
609 // CHECK3-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8
610 // CHECK3-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00
611 // CHECK3-NEXT: store double [[ADD9]], double* [[G3]], align 8
612 // CHECK3-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4
613 // CHECK3-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4
614 // CHECK3-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00
615 // CHECK3-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4
616 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4
617 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3
618 // CHECK3-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4
619 // CHECK3-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4
620 // CHECK3-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double
621 // CHECK3-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00
622 // CHECK3-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
623 // CHECK3-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4
624 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
625 // CHECK3-NEXT: store double* [[G3]], double** [[TMP23]], align 4
626 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
627 // CHECK3-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4
628 // CHECK3-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4
629 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
630 // CHECK3-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4
631 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
632 // CHECK3-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4
633 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
634 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
635 // CHECK3: omp.body.continue:
636 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
637 // CHECK3: omp.inner.for.inc:
638 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
639 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1
640 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
641 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
642 // CHECK3: omp.inner.for.end:
643 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
644 // CHECK3: omp.loop.exit:
645 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
646 // CHECK3-NEXT: ret void
647 //
648 //
649 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
650 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
651 // CHECK3-NEXT: entry:
652 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
653 // CHECK3-NEXT: ret void
654 //
655 //
656 // CHECK4-LABEL: define {{[^@]+}}@main
657 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
658 // CHECK4-NEXT: entry:
659 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
660 // CHECK4-NEXT: [[G:%.*]] = alloca double, align 8
661 // CHECK4-NEXT: [[G1:%.*]] = alloca double*, align 4
662 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
663 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4
664 // CHECK4-NEXT: store double* [[G]], double** [[G1]], align 4
665 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 0
666 // CHECK4-NEXT: store double* [[G]], double** [[TMP0]], align 4
667 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], %class.anon* [[REF_TMP]], i32 0, i32 1
668 // CHECK4-NEXT: [[TMP2:%.*]] = load double*, double** [[G1]], align 4
669 // CHECK4-NEXT: store double* [[TMP2]], double** [[TMP1]], align 4
670 // CHECK4-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 4 dereferenceable(8) [[REF_TMP]])
671 // CHECK4-NEXT: ret i32 0
672 //
673 //
674 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
675 // CHECK4-SAME: (double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 [[SVAR:%.*]], i32 [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
676 // CHECK4-NEXT: entry:
677 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
678 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
679 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
680 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
681 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
682 // CHECK4-NEXT: [[G2:%.*]] = alloca double, align 8
683 // CHECK4-NEXT: [[G13:%.*]] = alloca double, align 8
684 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca double*, align 4
685 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
686 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
687 // CHECK4-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
688 // CHECK4-NEXT: store i32 [[SFVAR]], i32* [[SFVAR_ADDR]], align 4
689 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
690 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
691 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i32* [[SFVAR_ADDR]] to float*
692 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
693 // CHECK4-NEXT: [[TMP2:%.*]] = load double, double* [[TMP0]], align 8
694 // CHECK4-NEXT: store double [[TMP2]], double* [[G2]], align 8
695 // CHECK4-NEXT: [[TMP3:%.*]] = load double*, double** [[TMP]], align 4
696 // CHECK4-NEXT: [[TMP4:%.*]] = load volatile double, double* [[TMP3]], align 4
697 // CHECK4-NEXT: store double [[TMP4]], double* [[G13]], align 8
698 // CHECK4-NEXT: store double* [[G13]], double** [[_TMP4]], align 4
699 // CHECK4-NEXT: [[TMP5:%.*]] = load double*, double** [[_TMP4]], align 4
700 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, double*, double*, i32*, float*)* @.omp_outlined. to void (i32*, i32*, ...)*), double* [[G2]], double* [[TMP5]], i32* [[SVAR_ADDR]], float* [[CONV]])
701 // CHECK4-NEXT: ret void
702 //
703 //
704 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
705 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], double* nonnull align 4 dereferenceable(8) [[G:%.*]], double* nonnull align 4 dereferenceable(8) [[G1:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]], float* nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
706 // CHECK4-NEXT: entry:
707 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
708 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
709 // CHECK4-NEXT: [[G_ADDR:%.*]] = alloca double*, align 4
710 // CHECK4-NEXT: [[G1_ADDR:%.*]] = alloca double*, align 4
711 // CHECK4-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
712 // CHECK4-NEXT: [[SFVAR_ADDR:%.*]] = alloca float*, align 4
713 // CHECK4-NEXT: [[TMP:%.*]] = alloca double*, align 4
714 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca double*, align 4
715 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
716 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
717 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
718 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
719 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
720 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
721 // CHECK4-NEXT: [[G3:%.*]] = alloca double, align 8
722 // CHECK4-NEXT: [[G14:%.*]] = alloca double, align 8
723 // CHECK4-NEXT: [[_TMP5:%.*]] = alloca double*, align 4
724 // CHECK4-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
725 // CHECK4-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
726 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
727 // CHECK4-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
728 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
729 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
730 // CHECK4-NEXT: store double* [[G]], double** [[G_ADDR]], align 4
731 // CHECK4-NEXT: store double* [[G1]], double** [[G1_ADDR]], align 4
732 // CHECK4-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
733 // CHECK4-NEXT: store float* [[SFVAR]], float** [[SFVAR_ADDR]], align 4
734 // CHECK4-NEXT: [[TMP0:%.*]] = load double*, double** [[G_ADDR]], align 4
735 // CHECK4-NEXT: [[TMP1:%.*]] = load double*, double** [[G1_ADDR]], align 4
736 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
737 // CHECK4-NEXT: [[TMP3:%.*]] = load float*, float** [[SFVAR_ADDR]], align 4
738 // CHECK4-NEXT: store double* [[TMP1]], double** [[TMP]], align 4
739 // CHECK4-NEXT: [[TMP4:%.*]] = load double*, double** [[TMP]], align 4
740 // CHECK4-NEXT: store double* [[TMP4]], double** [[_TMP1]], align 4
741 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
742 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
743 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
744 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
745 // CHECK4-NEXT: [[TMP5:%.*]] = load volatile double, double* [[TMP0]], align 8
746 // CHECK4-NEXT: store double [[TMP5]], double* [[G3]], align 8
747 // CHECK4-NEXT: [[TMP6:%.*]] = load double*, double** [[_TMP1]], align 4
748 // CHECK4-NEXT: [[TMP7:%.*]] = load volatile double, double* [[TMP6]], align 4
749 // CHECK4-NEXT: store double [[TMP7]], double* [[G14]], align 8
750 // CHECK4-NEXT: store double* [[G14]], double** [[_TMP5]], align 4
751 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP2]], align 4
752 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[SVAR6]], align 4
753 // CHECK4-NEXT: [[TMP9:%.*]] = load float, float* [[TMP3]], align 4
754 // CHECK4-NEXT: store float [[TMP9]], float* [[SFVAR7]], align 4
755 // CHECK4-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
756 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
757 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
758 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
759 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
760 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
761 // CHECK4: cond.true:
762 // CHECK4-NEXT: br label [[COND_END:%.*]]
763 // CHECK4: cond.false:
764 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
765 // CHECK4-NEXT: br label [[COND_END]]
766 // CHECK4: cond.end:
767 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
768 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
769 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
770 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
771 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
772 // CHECK4: omp.inner.for.cond:
773 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
774 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
775 // CHECK4-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
776 // CHECK4-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
777 // CHECK4: omp.inner.for.body:
778 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
779 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
780 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
781 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
782 // CHECK4-NEXT: [[TMP18:%.*]] = load double, double* [[G3]], align 8
783 // CHECK4-NEXT: [[ADD9:%.*]] = fadd double [[TMP18]], 1.000000e+00
784 // CHECK4-NEXT: store double [[ADD9]], double* [[G3]], align 8
785 // CHECK4-NEXT: [[TMP19:%.*]] = load double*, double** [[_TMP5]], align 4
786 // CHECK4-NEXT: [[TMP20:%.*]] = load volatile double, double* [[TMP19]], align 4
787 // CHECK4-NEXT: [[ADD10:%.*]] = fadd double [[TMP20]], 1.000000e+00
788 // CHECK4-NEXT: store volatile double [[ADD10]], double* [[TMP19]], align 4
789 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[SVAR6]], align 4
790 // CHECK4-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 3
791 // CHECK4-NEXT: store i32 [[ADD11]], i32* [[SVAR6]], align 4
792 // CHECK4-NEXT: [[TMP22:%.*]] = load float, float* [[SFVAR7]], align 4
793 // CHECK4-NEXT: [[CONV:%.*]] = fpext float [[TMP22]] to double
794 // CHECK4-NEXT: [[ADD12:%.*]] = fadd double [[CONV]], 4.000000e+00
795 // CHECK4-NEXT: [[CONV13:%.*]] = fptrunc double [[ADD12]] to float
796 // CHECK4-NEXT: store float [[CONV13]], float* [[SFVAR7]], align 4
797 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
798 // CHECK4-NEXT: store double* [[G3]], double** [[TMP23]], align 4
799 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
800 // CHECK4-NEXT: [[TMP25:%.*]] = load double*, double** [[_TMP5]], align 4
801 // CHECK4-NEXT: store double* [[TMP25]], double** [[TMP24]], align 4
802 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
803 // CHECK4-NEXT: store i32* [[SVAR6]], i32** [[TMP26]], align 4
804 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
805 // CHECK4-NEXT: store float* [[SFVAR7]], float** [[TMP27]], align 4
806 // CHECK4-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 4 dereferenceable(16) [[REF_TMP]])
807 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
808 // CHECK4: omp.body.continue:
809 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
810 // CHECK4: omp.inner.for.inc:
811 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
812 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP28]], 1
813 // CHECK4-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4
814 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
815 // CHECK4: omp.inner.for.end:
816 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
817 // CHECK4: omp.loop.exit:
818 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP11]])
819 // CHECK4-NEXT: ret void
820 //
821 //
822 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
823 // CHECK4-SAME: () #[[ATTR4:[0-9]+]] {
824 // CHECK4-NEXT: entry:
825 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
826 // CHECK4-NEXT: ret void
827 //
828 //
829 // CHECK9-LABEL: define {{[^@]+}}@main
830 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
831 // CHECK9-NEXT: entry:
832 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
833 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
834 // CHECK9-NEXT: [[G1:%.*]] = alloca double*, align 8
835 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
836 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
837 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
838 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
839 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
840 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
841 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
842 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
843 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
844 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
845 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
846 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
847 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
848 // CHECK9-NEXT: store double* [[G]], double** [[G1]], align 8
849 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
850 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
851 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
852 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
853 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
854 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
855 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
856 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
857 // CHECK9-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
858 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
859 // CHECK9-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
860 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
861 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
862 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
863 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
864 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
865 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
866 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
867 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
868 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
869 // CHECK9-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
870 // CHECK9-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
871 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
872 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
873 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
874 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
875 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
876 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
877 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
878 // CHECK9-NEXT: store i8* null, i8** [[TMP13]], align 8
879 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
880 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
881 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
882 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
883 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
884 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
885 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
886 // CHECK9-NEXT: store i8* null, i8** [[TMP18]], align 8
887 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
888 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
889 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
890 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
891 // CHECK9-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
892 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
893 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
894 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
895 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
896 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
897 // CHECK9-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
898 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
899 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
900 // CHECK9-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
901 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
902 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
903 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
904 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
905 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
906 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
907 // CHECK9-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
908 // CHECK9-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
909 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
910 // CHECK9-NEXT: store i8* null, i8** [[TMP33]], align 8
911 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
912 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
913 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
914 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
915 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
916 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
917 // CHECK9: omp_offload.failed:
918 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
919 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
920 // CHECK9: omp_offload.cont:
921 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
922 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
923 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
924 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
925 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
926 // CHECK9: arraydestroy.body:
927 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
928 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
929 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
930 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
931 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
932 // CHECK9: arraydestroy.done3:
933 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
934 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
935 // CHECK9-NEXT: ret i32 [[TMP39]]
936 //
937 //
938 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
939 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
940 // CHECK9-NEXT: entry:
941 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
942 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
943 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
944 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
945 // CHECK9-NEXT: ret void
946 //
947 //
948 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
949 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
950 // CHECK9-NEXT: entry:
951 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
952 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
953 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
954 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
955 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
956 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
957 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
958 // CHECK9-NEXT: ret void
959 //
960 //
961 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103
962 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
963 // CHECK9-NEXT: entry:
964 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
965 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
966 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
967 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
968 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
969 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
970 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
971 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
972 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
973 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
974 // CHECK9-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
975 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
976 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
977 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
978 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
979 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
980 // CHECK9-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
981 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
982 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
983 // CHECK9-NEXT: ret void
984 //
985 //
986 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
987 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
988 // CHECK9-NEXT: entry:
989 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
990 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
991 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
992 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
993 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
994 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
995 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
996 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
997 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
998 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
999 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1000 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1001 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1002 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1003 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1004 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1005 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1006 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1007 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1008 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8
1009 // CHECK9-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
1010 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1011 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1012 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1013 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1014 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1015 // CHECK9-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1016 // CHECK9-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1017 // CHECK9-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1018 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1019 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1020 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1021 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1022 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1023 // CHECK9-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1024 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1025 // CHECK9-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1026 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1027 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1028 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1029 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1030 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1031 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
1032 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1033 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1034 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false)
1035 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1036 // CHECK9-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
1037 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1038 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
1039 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1040 // CHECK9: omp.arraycpy.body:
1041 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1042 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1043 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1044 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1045 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false)
1046 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1047 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1048 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
1049 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1050 // CHECK9: omp.arraycpy.done6:
1051 // CHECK9-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1052 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
1053 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
1054 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1055 // CHECK9-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
1056 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
1057 // CHECK9-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
1058 // CHECK9-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1059 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1060 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1061 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1062 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
1063 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1064 // CHECK9: cond.true:
1065 // CHECK9-NEXT: br label [[COND_END:%.*]]
1066 // CHECK9: cond.false:
1067 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1068 // CHECK9-NEXT: br label [[COND_END]]
1069 // CHECK9: cond.end:
1070 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
1071 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1072 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1073 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
1074 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1075 // CHECK9: omp.inner.for.cond:
1076 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1077 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1078 // CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
1079 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1080 // CHECK9: omp.inner.for.cond.cleanup:
1081 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1082 // CHECK9: omp.inner.for.body:
1083 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1084 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1
1085 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1086 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1087 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
1088 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
1089 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64
1090 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1091 // CHECK9-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4
1092 // CHECK9-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
1093 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4
1094 // CHECK9-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64
1095 // CHECK9-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]]
1096 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8*
1097 // CHECK9-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8*
1098 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false)
1099 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1100 // CHECK9: omp.body.continue:
1101 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1102 // CHECK9: omp.inner.for.inc:
1103 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1104 // CHECK9-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1
1105 // CHECK9-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
1106 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1107 // CHECK9: omp.inner.for.end:
1108 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1109 // CHECK9: omp.loop.exit:
1110 // CHECK9-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1111 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
1112 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
1113 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1114 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1115 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1116 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1117 // CHECK9: arraydestroy.body:
1118 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1119 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1120 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1121 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1122 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1123 // CHECK9: arraydestroy.done15:
1124 // CHECK9-NEXT: ret void
1125 //
1126 //
1127 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1128 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1129 // CHECK9-NEXT: entry:
1130 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1131 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1132 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1133 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1134 // CHECK9-NEXT: ret void
1135 //
1136 //
1137 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1138 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1139 // CHECK9-NEXT: entry:
1140 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1141 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1142 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1143 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1144 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1145 // CHECK9-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1146 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1147 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1148 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1149 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1150 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1151 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1152 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1153 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
1154 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1155 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1156 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1157 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1158 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1159 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1160 // CHECK9-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1161 // CHECK9-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1162 // CHECK9-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1163 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1164 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1165 // CHECK9-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1166 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1167 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1168 // CHECK9-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1169 // CHECK9-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1170 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1171 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1172 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1173 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1174 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1175 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1176 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1177 // CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
1178 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1179 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1180 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1181 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1182 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1183 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1184 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1185 // CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
1186 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1187 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1188 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1189 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1190 // CHECK9-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1191 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1192 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1193 // CHECK9-NEXT: store i8* null, i8** [[TMP21]], align 8
1194 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1195 // CHECK9-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1196 // CHECK9-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1197 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1198 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1199 // CHECK9-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1200 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1201 // CHECK9-NEXT: store i8* null, i8** [[TMP26]], align 8
1202 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1203 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1204 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1205 // CHECK9-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1206 // CHECK9-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1207 // CHECK9-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1208 // CHECK9: omp_offload.failed:
1209 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1210 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1211 // CHECK9: omp_offload.cont:
1212 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1213 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1214 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1215 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1216 // CHECK9: arraydestroy.body:
1217 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1218 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1219 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1220 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1221 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1222 // CHECK9: arraydestroy.done2:
1223 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1224 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1225 // CHECK9-NEXT: ret i32 [[TMP32]]
1226 //
1227 //
1228 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1229 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1230 // CHECK9-NEXT: entry:
1231 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1232 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1233 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1234 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1235 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
1236 // CHECK9-NEXT: ret void
1237 //
1238 //
1239 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1240 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1241 // CHECK9-NEXT: entry:
1242 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1243 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1244 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1245 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1246 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1247 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1248 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1249 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
1250 // CHECK9-NEXT: ret void
1251 //
1252 //
1253 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1254 // CHECK9-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1255 // CHECK9-NEXT: entry:
1256 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1257 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1258 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1259 // CHECK9-NEXT: ret void
1260 //
1261 //
1262 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1263 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1264 // CHECK9-NEXT: entry:
1265 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1266 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1267 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1268 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1269 // CHECK9-NEXT: ret void
1270 //
1271 //
1272 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1273 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1274 // CHECK9-NEXT: entry:
1275 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1276 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1277 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1278 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1279 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1280 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1281 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1282 // CHECK9-NEXT: ret void
1283 //
1284 //
1285 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1286 // CHECK9-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1287 // CHECK9-NEXT: entry:
1288 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1289 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1290 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1291 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1292 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1293 // CHECK9-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1294 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1295 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1296 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1297 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1298 // CHECK9-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1299 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1300 // CHECK9-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1301 // CHECK9-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1302 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1303 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1304 // CHECK9-NEXT: ret void
1305 //
1306 //
1307 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1308 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1309 // CHECK9-NEXT: entry:
1310 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1311 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1312 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1313 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1314 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1315 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1316 // CHECK9-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1317 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1318 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1319 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1320 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1321 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1322 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1323 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1324 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1325 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1326 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1327 // CHECK9-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1328 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1329 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1330 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1331 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1332 // CHECK9-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1333 // CHECK9-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1334 // CHECK9-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1335 // CHECK9-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1336 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1337 // CHECK9-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1338 // CHECK9-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1339 // CHECK9-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1340 // CHECK9-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
1341 // CHECK9-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1342 // CHECK9-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
1343 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1344 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1345 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1346 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1347 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1348 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
1349 // CHECK9-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1350 // CHECK9-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1351 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false)
1352 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1353 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
1354 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1355 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
1356 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1357 // CHECK9: omp.arraycpy.body:
1358 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1359 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1360 // CHECK9-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1361 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1362 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false)
1363 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1364 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1365 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1366 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1367 // CHECK9: omp.arraycpy.done6:
1368 // CHECK9-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
1369 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
1370 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
1371 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
1372 // CHECK9-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
1373 // CHECK9-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1374 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
1375 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1376 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1377 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
1378 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1379 // CHECK9: cond.true:
1380 // CHECK9-NEXT: br label [[COND_END:%.*]]
1381 // CHECK9: cond.false:
1382 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1383 // CHECK9-NEXT: br label [[COND_END]]
1384 // CHECK9: cond.end:
1385 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
1386 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1387 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1388 // CHECK9-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
1389 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1390 // CHECK9: omp.inner.for.cond:
1391 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1392 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1393 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
1394 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1395 // CHECK9: omp.inner.for.cond.cleanup:
1396 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1397 // CHECK9: omp.inner.for.body:
1398 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1399 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
1400 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1401 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1402 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
1403 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4
1404 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64
1405 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1406 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4
1407 // CHECK9-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
1408 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
1409 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64
1410 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1411 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
1412 // CHECK9-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8*
1413 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false)
1414 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1415 // CHECK9: omp.body.continue:
1416 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1417 // CHECK9: omp.inner.for.inc:
1418 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1419 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1
1420 // CHECK9-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
1421 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1422 // CHECK9: omp.inner.for.end:
1423 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1424 // CHECK9: omp.loop.exit:
1425 // CHECK9-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1426 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
1427 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]])
1428 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1429 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
1430 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
1431 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1432 // CHECK9: arraydestroy.body:
1433 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1434 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1435 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1436 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1437 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1438 // CHECK9: arraydestroy.done14:
1439 // CHECK9-NEXT: ret void
1440 //
1441 //
1442 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1443 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1444 // CHECK9-NEXT: entry:
1445 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1446 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1447 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1448 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1449 // CHECK9-NEXT: ret void
1450 //
1451 //
1452 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1453 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1454 // CHECK9-NEXT: entry:
1455 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1456 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1457 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1458 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1459 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
1460 // CHECK9-NEXT: ret void
1461 //
1462 //
1463 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1464 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1465 // CHECK9-NEXT: entry:
1466 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1467 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1468 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1469 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1470 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1471 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1472 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1473 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1474 // CHECK9-NEXT: ret void
1475 //
1476 //
1477 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1478 // CHECK9-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1479 // CHECK9-NEXT: entry:
1480 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1481 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1482 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1483 // CHECK9-NEXT: ret void
1484 //
1485 //
1486 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1487 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1488 // CHECK9-NEXT: entry:
1489 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1490 // CHECK9-NEXT: ret void
1491 //
1492 //
1493 // CHECK10-LABEL: define {{[^@]+}}@main
1494 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1495 // CHECK10-NEXT: entry:
1496 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1497 // CHECK10-NEXT: [[G:%.*]] = alloca double, align 8
1498 // CHECK10-NEXT: [[G1:%.*]] = alloca double*, align 8
1499 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1500 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1501 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1502 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1503 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 8
1504 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1505 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1506 // CHECK10-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
1507 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1508 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1509 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1510 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1511 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1512 // CHECK10-NEXT: store double* [[G]], double** [[G1]], align 8
1513 // CHECK10-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
1514 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1515 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1516 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
1517 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
1518 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
1519 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
1520 // CHECK10-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
1521 // CHECK10-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 8
1522 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 8
1523 // CHECK10-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 8
1524 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1525 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1526 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1527 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1528 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1529 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
1530 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_CASTED]] to i32*
1531 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV1]], align 4
1532 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[SVAR_CASTED]], align 8
1533 // CHECK10-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1534 // CHECK10-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1535 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1536 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1537 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1538 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1539 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i64*
1540 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP12]], align 8
1541 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1542 // CHECK10-NEXT: store i8* null, i8** [[TMP13]], align 8
1543 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1544 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1545 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1546 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1547 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
1548 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 8
1549 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1550 // CHECK10-NEXT: store i8* null, i8** [[TMP18]], align 8
1551 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1552 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
1553 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 8
1554 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1555 // CHECK10-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
1556 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 8
1557 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1558 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
1559 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1560 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
1561 // CHECK10-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 8
1562 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1563 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
1564 // CHECK10-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 8
1565 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1566 // CHECK10-NEXT: store i8* null, i8** [[TMP28]], align 8
1567 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1568 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i64*
1569 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP30]], align 8
1570 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1571 // CHECK10-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i64*
1572 // CHECK10-NEXT: store i64 [[TMP6]], i64* [[TMP32]], align 8
1573 // CHECK10-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1574 // CHECK10-NEXT: store i8* null, i8** [[TMP33]], align 8
1575 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1576 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1577 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
1578 // CHECK10-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1579 // CHECK10-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1580 // CHECK10-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1581 // CHECK10: omp_offload.failed:
1582 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i64 [[TMP6]]) #[[ATTR4:[0-9]+]]
1583 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1584 // CHECK10: omp_offload.cont:
1585 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v()
1586 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1587 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1588 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1589 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1590 // CHECK10: arraydestroy.body:
1591 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1592 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1593 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1594 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1595 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1596 // CHECK10: arraydestroy.done3:
1597 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1598 // CHECK10-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
1599 // CHECK10-NEXT: ret i32 [[TMP39]]
1600 //
1601 //
1602 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1603 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1604 // CHECK10-NEXT: entry:
1605 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1606 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1607 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1608 // CHECK10-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
1609 // CHECK10-NEXT: ret void
1610 //
1611 //
1612 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1613 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1614 // CHECK10-NEXT: entry:
1615 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1616 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1617 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1618 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1619 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1620 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1621 // CHECK10-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
1622 // CHECK10-NEXT: ret void
1623 //
1624 //
1625 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103
1626 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1627 // CHECK10-NEXT: entry:
1628 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1629 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1630 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1631 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1632 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
1633 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1634 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1635 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1636 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1637 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1638 // CHECK10-NEXT: store i64 [[SVAR]], i64* [[SVAR_ADDR]], align 8
1639 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1640 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1641 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1642 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1643 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[SVAR_ADDR]] to i32*
1644 // CHECK10-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 8
1645 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1646 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[CONV1]])
1647 // CHECK10-NEXT: ret void
1648 //
1649 //
1650 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1651 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1652 // CHECK10-NEXT: entry:
1653 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1654 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1655 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1656 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1657 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 8
1658 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 8
1659 // CHECK10-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 8
1660 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 8
1661 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 8
1662 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1663 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1664 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1665 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1666 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1667 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1668 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1669 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1670 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1671 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1672 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 8
1673 // CHECK10-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
1674 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1675 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1676 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1677 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1678 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1679 // CHECK10-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1680 // CHECK10-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 8
1681 // CHECK10-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 8
1682 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
1683 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1684 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 8
1685 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 8
1686 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 8
1687 // CHECK10-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 8
1688 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 8
1689 // CHECK10-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 8
1690 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1691 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1692 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1693 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1694 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
1695 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
1696 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
1697 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
1698 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i64 8, i1 false)
1699 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1700 // CHECK10-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
1701 // CHECK10-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
1702 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
1703 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1704 // CHECK10: omp.arraycpy.body:
1705 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1706 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1707 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
1708 // CHECK10-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
1709 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i64 4, i1 false)
1710 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1711 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1712 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
1713 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1714 // CHECK10: omp.arraycpy.done6:
1715 // CHECK10-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8
1716 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
1717 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
1718 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i64 4, i1 false)
1719 // CHECK10-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 8
1720 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
1721 // CHECK10-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
1722 // CHECK10-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1723 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
1724 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1725 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1726 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
1727 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1728 // CHECK10: cond.true:
1729 // CHECK10-NEXT: br label [[COND_END:%.*]]
1730 // CHECK10: cond.false:
1731 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1732 // CHECK10-NEXT: br label [[COND_END]]
1733 // CHECK10: cond.end:
1734 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
1735 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1736 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1737 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
1738 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1739 // CHECK10: omp.inner.for.cond:
1740 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1741 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1742 // CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
1743 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1744 // CHECK10: omp.inner.for.cond.cleanup:
1745 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1746 // CHECK10: omp.inner.for.body:
1747 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1748 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1
1749 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1750 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1751 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
1752 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
1753 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP26]] to i64
1754 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
1755 // CHECK10-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4
1756 // CHECK10-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 8
1757 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4
1758 // CHECK10-NEXT: [[IDXPROM11:%.*]] = sext i32 [[TMP28]] to i64
1759 // CHECK10-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i64 0, i64 [[IDXPROM11]]
1760 // CHECK10-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX12]] to i8*
1761 // CHECK10-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8*
1762 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i64 4, i1 false)
1763 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1764 // CHECK10: omp.body.continue:
1765 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1766 // CHECK10: omp.inner.for.inc:
1767 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1768 // CHECK10-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP31]], 1
1769 // CHECK10-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4
1770 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
1771 // CHECK10: omp.inner.for.end:
1772 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1773 // CHECK10: omp.loop.exit:
1774 // CHECK10-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1775 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
1776 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
1777 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1778 // CHECK10-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
1779 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN14]], i64 2
1780 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1781 // CHECK10: arraydestroy.body:
1782 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1783 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1784 // CHECK10-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1785 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1786 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1787 // CHECK10: arraydestroy.done15:
1788 // CHECK10-NEXT: ret void
1789 //
1790 //
1791 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1792 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1793 // CHECK10-NEXT: entry:
1794 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1795 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1796 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1797 // CHECK10-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1798 // CHECK10-NEXT: ret void
1799 //
1800 //
1801 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1802 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
1803 // CHECK10-NEXT: entry:
1804 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1805 // CHECK10-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1806 // CHECK10-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1807 // CHECK10-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1808 // CHECK10-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1809 // CHECK10-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 8
1810 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1811 // CHECK10-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1812 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 8
1813 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 8
1814 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 8
1815 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1816 // CHECK10-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
1817 // CHECK10-NEXT: store i32 0, i32* [[T_VAR]], align 4
1818 // CHECK10-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1819 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1820 // CHECK10-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
1821 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 signext 1)
1822 // CHECK10-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
1823 // CHECK10-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 signext 2)
1824 // CHECK10-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 8
1825 // CHECK10-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 8
1826 // CHECK10-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 8
1827 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
1828 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
1829 // CHECK10-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4
1830 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
1831 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1832 // CHECK10-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1833 // CHECK10-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1834 // CHECK10-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1835 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
1836 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP8]], align 8
1837 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1838 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
1839 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP10]], align 8
1840 // CHECK10-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1841 // CHECK10-NEXT: store i8* null, i8** [[TMP11]], align 8
1842 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1843 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
1844 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 8
1845 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1846 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
1847 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 8
1848 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1849 // CHECK10-NEXT: store i8* null, i8** [[TMP16]], align 8
1850 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1851 // CHECK10-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
1852 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 8
1853 // CHECK10-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1854 // CHECK10-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
1855 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 8
1856 // CHECK10-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1857 // CHECK10-NEXT: store i8* null, i8** [[TMP21]], align 8
1858 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1859 // CHECK10-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
1860 // CHECK10-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 8
1861 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1862 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
1863 // CHECK10-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 8
1864 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1865 // CHECK10-NEXT: store i8* null, i8** [[TMP26]], align 8
1866 // CHECK10-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1867 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1868 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
1869 // CHECK10-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1870 // CHECK10-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1871 // CHECK10-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1872 // CHECK10: omp_offload.failed:
1873 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
1874 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1875 // CHECK10: omp_offload.cont:
1876 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1877 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1878 // CHECK10-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
1879 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1880 // CHECK10: arraydestroy.body:
1881 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1882 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1883 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1884 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1885 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1886 // CHECK10: arraydestroy.done2:
1887 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1888 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
1889 // CHECK10-NEXT: ret i32 [[TMP32]]
1890 //
1891 //
1892 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1893 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1894 // CHECK10-NEXT: entry:
1895 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1896 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1897 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1898 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1899 // CHECK10-NEXT: store float 0.000000e+00, float* [[F]], align 4
1900 // CHECK10-NEXT: ret void
1901 //
1902 //
1903 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1904 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1905 // CHECK10-NEXT: entry:
1906 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1907 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1908 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1909 // CHECK10-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1910 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1911 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1912 // CHECK10-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1913 // CHECK10-NEXT: store float [[TMP0]], float* [[F]], align 4
1914 // CHECK10-NEXT: ret void
1915 //
1916 //
1917 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1918 // CHECK10-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1919 // CHECK10-NEXT: entry:
1920 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
1921 // CHECK10-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
1922 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
1923 // CHECK10-NEXT: ret void
1924 //
1925 //
1926 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1927 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1928 // CHECK10-NEXT: entry:
1929 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1930 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1931 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1932 // CHECK10-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
1933 // CHECK10-NEXT: ret void
1934 //
1935 //
1936 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1937 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1938 // CHECK10-NEXT: entry:
1939 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1940 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1941 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1942 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1943 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1944 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1945 // CHECK10-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 signext [[TMP0]])
1946 // CHECK10-NEXT: ret void
1947 //
1948 //
1949 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1950 // CHECK10-SAME: (i64 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1951 // CHECK10-NEXT: entry:
1952 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1953 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1954 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1955 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1956 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1957 // CHECK10-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
1958 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1959 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1960 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
1961 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
1962 // CHECK10-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
1963 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1964 // CHECK10-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
1965 // CHECK10-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 8
1966 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
1967 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
1968 // CHECK10-NEXT: ret void
1969 //
1970 //
1971 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
1972 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1973 // CHECK10-NEXT: entry:
1974 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1975 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1976 // CHECK10-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
1977 // CHECK10-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 8
1978 // CHECK10-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 8
1979 // CHECK10-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 8
1980 // CHECK10-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 8
1981 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 8
1982 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1983 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1984 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1985 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1986 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1987 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1988 // CHECK10-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1989 // CHECK10-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1990 // CHECK10-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1991 // CHECK10-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1992 // CHECK10-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 8
1993 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1994 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1995 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1996 // CHECK10-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
1997 // CHECK10-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 8
1998 // CHECK10-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
1999 // CHECK10-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 8
2000 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
2001 // CHECK10-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 8
2002 // CHECK10-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 8
2003 // CHECK10-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 8
2004 // CHECK10-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 8
2005 // CHECK10-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 8
2006 // CHECK10-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 8
2007 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2008 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2009 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2010 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2011 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2012 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
2013 // CHECK10-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2014 // CHECK10-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2015 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i64 8, i1 false)
2016 // CHECK10-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2017 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
2018 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
2019 // CHECK10-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
2020 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2021 // CHECK10: omp.arraycpy.body:
2022 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2023 // CHECK10-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2024 // CHECK10-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2025 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2026 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i64 4, i1 false)
2027 // CHECK10-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2028 // CHECK10-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2029 // CHECK10-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
2030 // CHECK10-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2031 // CHECK10: omp.arraycpy.done6:
2032 // CHECK10-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8
2033 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
2034 // CHECK10-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2035 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i64 4, i1 false)
2036 // CHECK10-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 8
2037 // CHECK10-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2038 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
2039 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2040 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2041 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
2042 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2043 // CHECK10: cond.true:
2044 // CHECK10-NEXT: br label [[COND_END:%.*]]
2045 // CHECK10: cond.false:
2046 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2047 // CHECK10-NEXT: br label [[COND_END]]
2048 // CHECK10: cond.end:
2049 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
2050 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2051 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2052 // CHECK10-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
2053 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2054 // CHECK10: omp.inner.for.cond:
2055 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2056 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2057 // CHECK10-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2058 // CHECK10-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2059 // CHECK10: omp.inner.for.cond.cleanup:
2060 // CHECK10-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2061 // CHECK10: omp.inner.for.body:
2062 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2063 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
2064 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2065 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2066 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
2067 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4
2068 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64
2069 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i64 0, i64 [[IDXPROM]]
2070 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4
2071 // CHECK10-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 8
2072 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
2073 // CHECK10-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP26]] to i64
2074 // CHECK10-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
2075 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX11]] to i8*
2076 // CHECK10-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8*
2077 // CHECK10-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i64 4, i1 false)
2078 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2079 // CHECK10: omp.body.continue:
2080 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2081 // CHECK10: omp.inner.for.inc:
2082 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2083 // CHECK10-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP29]], 1
2084 // CHECK10-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
2085 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2086 // CHECK10: omp.inner.for.end:
2087 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2088 // CHECK10: omp.loop.exit:
2089 // CHECK10-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2090 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
2091 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]])
2092 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2093 // CHECK10-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2094 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN13]], i64 2
2095 // CHECK10-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2096 // CHECK10: arraydestroy.body:
2097 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2098 // CHECK10-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2099 // CHECK10-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2100 // CHECK10-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2101 // CHECK10-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2102 // CHECK10: arraydestroy.done14:
2103 // CHECK10-NEXT: ret void
2104 //
2105 //
2106 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2107 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2108 // CHECK10-NEXT: entry:
2109 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2110 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2111 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2112 // CHECK10-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2113 // CHECK10-NEXT: ret void
2114 //
2115 //
2116 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2117 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2118 // CHECK10-NEXT: entry:
2119 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2120 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2121 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2122 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2123 // CHECK10-NEXT: store i32 0, i32* [[F]], align 4
2124 // CHECK10-NEXT: ret void
2125 //
2126 //
2127 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2128 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2129 // CHECK10-NEXT: entry:
2130 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2131 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2132 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2133 // CHECK10-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2134 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2135 // CHECK10-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2136 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2137 // CHECK10-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2138 // CHECK10-NEXT: ret void
2139 //
2140 //
2141 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2142 // CHECK10-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2143 // CHECK10-NEXT: entry:
2144 // CHECK10-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
2145 // CHECK10-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
2146 // CHECK10-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
2147 // CHECK10-NEXT: ret void
2148 //
2149 //
2150 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2151 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2152 // CHECK10-NEXT: entry:
2153 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2154 // CHECK10-NEXT: ret void
2155 //
2156 //
2157 // CHECK11-LABEL: define {{[^@]+}}@main
2158 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
2159 // CHECK11-NEXT: entry:
2160 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2161 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
2162 // CHECK11-NEXT: [[G1:%.*]] = alloca double*, align 4
2163 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2164 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2165 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2166 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2167 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
2168 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2169 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2170 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
2171 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2172 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2173 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2174 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2175 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2176 // CHECK11-NEXT: store double* [[G]], double** [[G1]], align 4
2177 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2178 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
2179 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2180 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2181 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2182 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2183 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2184 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2185 // CHECK11-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2186 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
2187 // CHECK11-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
2188 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2189 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2190 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2191 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2192 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2193 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
2194 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2195 // CHECK11-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2196 // CHECK11-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2197 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2198 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2199 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2200 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2201 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2202 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
2203 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2204 // CHECK11-NEXT: store i8* null, i8** [[TMP13]], align 4
2205 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2206 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2207 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2208 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2209 // CHECK11-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2210 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
2211 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2212 // CHECK11-NEXT: store i8* null, i8** [[TMP18]], align 4
2213 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2214 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2215 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
2216 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2217 // CHECK11-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2218 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
2219 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2220 // CHECK11-NEXT: store i8* null, i8** [[TMP23]], align 4
2221 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2222 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2223 // CHECK11-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
2224 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2225 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2226 // CHECK11-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
2227 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2228 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
2229 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2230 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2231 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
2232 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2233 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2234 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
2235 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2236 // CHECK11-NEXT: store i8* null, i8** [[TMP33]], align 4
2237 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2238 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2239 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
2240 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2241 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2242 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2243 // CHECK11: omp_offload.failed:
2244 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
2245 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2246 // CHECK11: omp_offload.cont:
2247 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2248 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2249 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2250 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2251 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2252 // CHECK11: arraydestroy.body:
2253 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2254 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2255 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2256 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2257 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2258 // CHECK11: arraydestroy.done2:
2259 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2260 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2261 // CHECK11-NEXT: ret i32 [[TMP39]]
2262 //
2263 //
2264 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2265 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2266 // CHECK11-NEXT: entry:
2267 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2268 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2269 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2270 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2271 // CHECK11-NEXT: ret void
2272 //
2273 //
2274 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2275 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2276 // CHECK11-NEXT: entry:
2277 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2278 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2279 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2280 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2281 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2282 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2283 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2284 // CHECK11-NEXT: ret void
2285 //
2286 //
2287 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103
2288 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2289 // CHECK11-NEXT: entry:
2290 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2291 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2292 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2293 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2294 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2295 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2296 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2297 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2298 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2299 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2300 // CHECK11-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2301 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2302 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2303 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2304 // CHECK11-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2305 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2306 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
2307 // CHECK11-NEXT: ret void
2308 //
2309 //
2310 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2311 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2312 // CHECK11-NEXT: entry:
2313 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2314 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2315 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2316 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2317 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2318 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2319 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
2320 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2321 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2322 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2323 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2324 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2325 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2326 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2327 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2328 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2329 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2330 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2331 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2332 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4
2333 // CHECK11-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
2334 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2335 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2336 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2337 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2338 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2339 // CHECK11-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2340 // CHECK11-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2341 // CHECK11-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
2342 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2343 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2344 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2345 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2346 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
2347 // CHECK11-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
2348 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2349 // CHECK11-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
2350 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2351 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2352 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2353 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2354 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
2355 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
2356 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2357 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2358 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false)
2359 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2360 // CHECK11-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
2361 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2362 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
2363 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2364 // CHECK11: omp.arraycpy.body:
2365 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2366 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2367 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2368 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2369 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false)
2370 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2371 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2372 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
2373 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2374 // CHECK11: omp.arraycpy.done6:
2375 // CHECK11-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
2376 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
2377 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
2378 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
2379 // CHECK11-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
2380 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
2381 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
2382 // CHECK11-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2383 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
2384 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2385 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2386 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
2387 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2388 // CHECK11: cond.true:
2389 // CHECK11-NEXT: br label [[COND_END:%.*]]
2390 // CHECK11: cond.false:
2391 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2392 // CHECK11-NEXT: br label [[COND_END]]
2393 // CHECK11: cond.end:
2394 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
2395 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2396 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2397 // CHECK11-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
2398 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2399 // CHECK11: omp.inner.for.cond:
2400 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2401 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2402 // CHECK11-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
2403 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2404 // CHECK11: omp.inner.for.cond.cleanup:
2405 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2406 // CHECK11: omp.inner.for.body:
2407 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2408 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1
2409 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2410 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2411 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
2412 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
2413 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]]
2414 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4
2415 // CHECK11-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
2416 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4
2417 // CHECK11-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]]
2418 // CHECK11-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
2419 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8*
2420 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false)
2421 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2422 // CHECK11: omp.body.continue:
2423 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2424 // CHECK11: omp.inner.for.inc:
2425 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2426 // CHECK11-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1
2427 // CHECK11-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
2428 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2429 // CHECK11: omp.inner.for.end:
2430 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2431 // CHECK11: omp.loop.exit:
2432 // CHECK11-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2433 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
2434 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
2435 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2436 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
2437 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
2438 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2439 // CHECK11: arraydestroy.body:
2440 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2441 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2442 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2443 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2444 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2445 // CHECK11: arraydestroy.done14:
2446 // CHECK11-NEXT: ret void
2447 //
2448 //
2449 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2450 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2451 // CHECK11-NEXT: entry:
2452 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2453 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2454 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2455 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2456 // CHECK11-NEXT: ret void
2457 //
2458 //
2459 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2460 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
2461 // CHECK11-NEXT: entry:
2462 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2463 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2464 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2465 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2466 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2467 // CHECK11-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
2468 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2469 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2470 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
2471 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
2472 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
2473 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2474 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
2475 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
2476 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2477 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
2478 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2479 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
2480 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
2481 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
2482 // CHECK11-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
2483 // CHECK11-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
2484 // CHECK11-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
2485 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2486 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2487 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2488 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2489 // CHECK11-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2490 // CHECK11-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2491 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2492 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
2493 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
2494 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2495 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2496 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2497 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2498 // CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
2499 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2500 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
2501 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
2502 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2503 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2504 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2505 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2506 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
2507 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2508 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
2509 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
2510 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2511 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
2512 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
2513 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2514 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
2515 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2516 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
2517 // CHECK11-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
2518 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2519 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
2520 // CHECK11-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
2521 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2522 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
2523 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2524 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2525 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
2526 // CHECK11-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2527 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2528 // CHECK11-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2529 // CHECK11: omp_offload.failed:
2530 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
2531 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2532 // CHECK11: omp_offload.cont:
2533 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2534 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
2535 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2536 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2537 // CHECK11: arraydestroy.body:
2538 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2539 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2540 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2541 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2542 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2543 // CHECK11: arraydestroy.done2:
2544 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2545 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
2546 // CHECK11-NEXT: ret i32 [[TMP32]]
2547 //
2548 //
2549 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2550 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2551 // CHECK11-NEXT: entry:
2552 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2553 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2554 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2555 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2556 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
2557 // CHECK11-NEXT: ret void
2558 //
2559 //
2560 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2561 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2562 // CHECK11-NEXT: entry:
2563 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2564 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2565 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2566 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2567 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2568 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
2569 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2570 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
2571 // CHECK11-NEXT: ret void
2572 //
2573 //
2574 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2575 // CHECK11-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2576 // CHECK11-NEXT: entry:
2577 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2578 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2579 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2580 // CHECK11-NEXT: ret void
2581 //
2582 //
2583 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2584 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2585 // CHECK11-NEXT: entry:
2586 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2587 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2588 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2589 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
2590 // CHECK11-NEXT: ret void
2591 //
2592 //
2593 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2594 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2595 // CHECK11-NEXT: entry:
2596 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2597 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2598 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2599 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2600 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2601 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2602 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
2603 // CHECK11-NEXT: ret void
2604 //
2605 //
2606 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2607 // CHECK11-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2608 // CHECK11-NEXT: entry:
2609 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2610 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2611 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2612 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2613 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2614 // CHECK11-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2615 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2616 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2617 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2618 // CHECK11-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2619 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2620 // CHECK11-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2621 // CHECK11-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
2622 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2623 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
2624 // CHECK11-NEXT: ret void
2625 //
2626 //
2627 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2628 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2629 // CHECK11-NEXT: entry:
2630 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2631 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2632 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2633 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2634 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
2635 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
2636 // CHECK11-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
2637 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
2638 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2639 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2640 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2641 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2642 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2643 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2644 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2645 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2646 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2647 // CHECK11-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2648 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
2649 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2650 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2651 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2652 // CHECK11-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2653 // CHECK11-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2654 // CHECK11-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2655 // CHECK11-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
2656 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2657 // CHECK11-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2658 // CHECK11-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
2659 // CHECK11-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
2660 // CHECK11-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
2661 // CHECK11-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
2662 // CHECK11-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
2663 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2664 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
2665 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2666 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2667 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2668 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
2669 // CHECK11-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
2670 // CHECK11-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
2671 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false)
2672 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2673 // CHECK11-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
2674 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
2675 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
2676 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2677 // CHECK11: omp.arraycpy.body:
2678 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2679 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2680 // CHECK11-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
2681 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
2682 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false)
2683 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2684 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2685 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
2686 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2687 // CHECK11: omp.arraycpy.done6:
2688 // CHECK11-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
2689 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
2690 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
2691 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
2692 // CHECK11-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
2693 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2694 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
2695 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2696 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2697 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
2698 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2699 // CHECK11: cond.true:
2700 // CHECK11-NEXT: br label [[COND_END:%.*]]
2701 // CHECK11: cond.false:
2702 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2703 // CHECK11-NEXT: br label [[COND_END]]
2704 // CHECK11: cond.end:
2705 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
2706 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2707 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2708 // CHECK11-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
2709 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2710 // CHECK11: omp.inner.for.cond:
2711 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2712 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2713 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2714 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2715 // CHECK11: omp.inner.for.cond.cleanup:
2716 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2717 // CHECK11: omp.inner.for.body:
2718 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2719 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
2720 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2721 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2722 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
2723 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4
2724 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]]
2725 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4
2726 // CHECK11-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
2727 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
2728 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]]
2729 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
2730 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8*
2731 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false)
2732 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2733 // CHECK11: omp.body.continue:
2734 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2735 // CHECK11: omp.inner.for.inc:
2736 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2737 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1
2738 // CHECK11-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
2739 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2740 // CHECK11: omp.inner.for.end:
2741 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2742 // CHECK11: omp.loop.exit:
2743 // CHECK11-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2744 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
2745 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]])
2746 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2747 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
2748 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
2749 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2750 // CHECK11: arraydestroy.body:
2751 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2752 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2753 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2754 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2755 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2756 // CHECK11: arraydestroy.done13:
2757 // CHECK11-NEXT: ret void
2758 //
2759 //
2760 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2761 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2762 // CHECK11-NEXT: entry:
2763 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2764 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2765 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2766 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2767 // CHECK11-NEXT: ret void
2768 //
2769 //
2770 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2771 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2772 // CHECK11-NEXT: entry:
2773 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2774 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2775 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2776 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2777 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
2778 // CHECK11-NEXT: ret void
2779 //
2780 //
2781 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2782 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2783 // CHECK11-NEXT: entry:
2784 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2785 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2786 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2787 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
2788 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2789 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
2790 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
2791 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
2792 // CHECK11-NEXT: ret void
2793 //
2794 //
2795 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2796 // CHECK11-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2797 // CHECK11-NEXT: entry:
2798 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
2799 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
2800 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
2801 // CHECK11-NEXT: ret void
2802 //
2803 //
2804 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2805 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2806 // CHECK11-NEXT: entry:
2807 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2808 // CHECK11-NEXT: ret void
2809 //
2810 //
2811 // CHECK12-LABEL: define {{[^@]+}}@main
2812 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
2813 // CHECK12-NEXT: entry:
2814 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2815 // CHECK12-NEXT: [[G:%.*]] = alloca double, align 8
2816 // CHECK12-NEXT: [[G1:%.*]] = alloca double*, align 4
2817 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2818 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2819 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2820 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2821 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S*, align 4
2822 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2823 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2824 // CHECK12-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
2825 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2826 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2827 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2828 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2829 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
2830 // CHECK12-NEXT: store double* [[G]], double** [[G1]], align 4
2831 // CHECK12-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]])
2832 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
2833 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
2834 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
2835 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2836 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float 1.000000e+00)
2837 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
2838 // CHECK12-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float 2.000000e+00)
2839 // CHECK12-NEXT: store %struct.S* [[TEST]], %struct.S** [[VAR]], align 4
2840 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[VAR]], align 4
2841 // CHECK12-NEXT: store %struct.S* [[TMP1]], %struct.S** [[TMP]], align 4
2842 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
2843 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
2844 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
2845 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2846 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* @_ZZ4mainE4svar, align 4
2847 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[SVAR_CASTED]], align 4
2848 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[SVAR_CASTED]], align 4
2849 // CHECK12-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2850 // CHECK12-NEXT: [[TMP8:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2851 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2852 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
2853 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
2854 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2855 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2856 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP12]], align 4
2857 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2858 // CHECK12-NEXT: store i8* null, i8** [[TMP13]], align 4
2859 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2860 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
2861 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
2862 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2863 // CHECK12-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to [2 x i32]**
2864 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP17]], align 4
2865 // CHECK12-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2866 // CHECK12-NEXT: store i8* null, i8** [[TMP18]], align 4
2867 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2868 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S]**
2869 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP20]], align 4
2870 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2871 // CHECK12-NEXT: [[TMP22:%.*]] = bitcast i8** [[TMP21]] to [2 x %struct.S]**
2872 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[TMP22]], align 4
2873 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2874 // CHECK12-NEXT: store i8* null, i8** [[TMP23]], align 4
2875 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2876 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S**
2877 // CHECK12-NEXT: store %struct.S* [[TMP7]], %struct.S** [[TMP25]], align 4
2878 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2879 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to %struct.S**
2880 // CHECK12-NEXT: store %struct.S* [[TMP8]], %struct.S** [[TMP27]], align 4
2881 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2882 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4
2883 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2884 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2885 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP30]], align 4
2886 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2887 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2888 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[TMP32]], align 4
2889 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2890 // CHECK12-NEXT: store i8* null, i8** [[TMP33]], align 4
2891 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2892 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2893 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2:[0-9]+]], i64 -1, i64 2)
2894 // CHECK12-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103.region_id, i32 5, i8** [[TMP34]], i8** [[TMP35]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2895 // CHECK12-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2896 // CHECK12-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2897 // CHECK12: omp_offload.failed:
2898 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S]* [[S_ARR]], %struct.S* [[TMP4]], i32 [[TMP6]]) #[[ATTR4:[0-9]+]]
2899 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
2900 // CHECK12: omp_offload.cont:
2901 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v()
2902 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2903 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
2904 // CHECK12-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
2905 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2906 // CHECK12: arraydestroy.body:
2907 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2908 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2909 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2910 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2911 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2912 // CHECK12: arraydestroy.done2:
2913 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2914 // CHECK12-NEXT: [[TMP39:%.*]] = load i32, i32* [[RETVAL]], align 4
2915 // CHECK12-NEXT: ret i32 [[TMP39]]
2916 //
2917 //
2918 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2919 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2920 // CHECK12-NEXT: entry:
2921 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2922 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2923 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2924 // CHECK12-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]])
2925 // CHECK12-NEXT: ret void
2926 //
2927 //
2928 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2929 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2930 // CHECK12-NEXT: entry:
2931 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
2932 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2933 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
2934 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
2935 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
2936 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
2937 // CHECK12-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], float [[TMP0]])
2938 // CHECK12-NEXT: ret void
2939 //
2940 //
2941 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l103
2942 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2943 // CHECK12-NEXT: entry:
2944 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2945 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2946 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2947 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2948 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
2949 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2950 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
2951 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2952 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2953 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2954 // CHECK12-NEXT: store i32 [[SVAR]], i32* [[SVAR_ADDR]], align 4
2955 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2956 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2957 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
2958 // CHECK12-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP]], align 4
2959 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
2960 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S]*, %struct.S*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S]* [[TMP1]], %struct.S* [[TMP3]], i32* [[SVAR_ADDR]])
2961 // CHECK12-NEXT: ret void
2962 //
2963 //
2964 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
2965 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S* nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32* nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2966 // CHECK12-NEXT: entry:
2967 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2968 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2969 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
2970 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
2971 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S]*, align 4
2972 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S*, align 4
2973 // CHECK12-NEXT: [[SVAR_ADDR:%.*]] = alloca i32*, align 4
2974 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S*, align 4
2975 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S*, align 4
2976 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2977 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2978 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2979 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2980 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2981 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2982 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
2983 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
2984 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2985 // CHECK12-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2986 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca %struct.S*, align 4
2987 // CHECK12-NEXT: [[SVAR9:%.*]] = alloca i32, align 4
2988 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
2989 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2990 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2991 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
2992 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
2993 // CHECK12-NEXT: store [2 x %struct.S]* [[S_ARR]], [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2994 // CHECK12-NEXT: store %struct.S* [[VAR]], %struct.S** [[VAR_ADDR]], align 4
2995 // CHECK12-NEXT: store i32* [[SVAR]], i32** [[SVAR_ADDR]], align 4
2996 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
2997 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
2998 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S]*, [2 x %struct.S]** [[S_ARR_ADDR]], align 4
2999 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S*, %struct.S** [[VAR_ADDR]], align 4
3000 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[SVAR_ADDR]], align 4
3001 // CHECK12-NEXT: store %struct.S* [[TMP3]], %struct.S** [[TMP]], align 4
3002 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S*, %struct.S** [[TMP]], align 4
3003 // CHECK12-NEXT: store %struct.S* [[TMP5]], %struct.S** [[_TMP1]], align 4
3004 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3005 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3006 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3007 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3008 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP0]], align 4
3009 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[T_VAR3]], align 4
3010 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3011 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3012 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP7]], i8* align 4 [[TMP8]], i32 8, i1 false)
3013 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3014 // CHECK12-NEXT: [[TMP9:%.*]] = bitcast [2 x %struct.S]* [[TMP2]] to %struct.S*
3015 // CHECK12-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
3016 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP10]]
3017 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3018 // CHECK12: omp.arraycpy.body:
3019 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP9]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3020 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3021 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3022 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3023 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 [[TMP12]], i32 4, i1 false)
3024 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3025 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3026 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP10]]
3027 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
3028 // CHECK12: omp.arraycpy.done6:
3029 // CHECK12-NEXT: [[TMP13:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 4
3030 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S* [[VAR7]] to i8*
3031 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast %struct.S* [[TMP13]] to i8*
3032 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP14]], i8* align 4 [[TMP15]], i32 4, i1 false)
3033 // CHECK12-NEXT: store %struct.S* [[VAR7]], %struct.S** [[_TMP8]], align 4
3034 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP4]], align 4
3035 // CHECK12-NEXT: store i32 [[TMP16]], i32* [[SVAR9]], align 4
3036 // CHECK12-NEXT: [[TMP17:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3037 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP17]], align 4
3038 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP18]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3039 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3040 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP19]], 1
3041 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3042 // CHECK12: cond.true:
3043 // CHECK12-NEXT: br label [[COND_END:%.*]]
3044 // CHECK12: cond.false:
3045 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3046 // CHECK12-NEXT: br label [[COND_END]]
3047 // CHECK12: cond.end:
3048 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
3049 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3050 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3051 // CHECK12-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4
3052 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3053 // CHECK12: omp.inner.for.cond:
3054 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3055 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3056 // CHECK12-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP22]], [[TMP23]]
3057 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3058 // CHECK12: omp.inner.for.cond.cleanup:
3059 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3060 // CHECK12: omp.inner.for.body:
3061 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3062 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP24]], 1
3063 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3064 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3065 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[T_VAR3]], align 4
3066 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
3067 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP26]]
3068 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[ARRAYIDX]], align 4
3069 // CHECK12-NEXT: [[TMP27:%.*]] = load %struct.S*, %struct.S** [[_TMP8]], align 4
3070 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4
3071 // CHECK12-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 [[TMP28]]
3072 // CHECK12-NEXT: [[TMP29:%.*]] = bitcast %struct.S* [[ARRAYIDX11]] to i8*
3073 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast %struct.S* [[TMP27]] to i8*
3074 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP29]], i8* align 4 [[TMP30]], i32 4, i1 false)
3075 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3076 // CHECK12: omp.body.continue:
3077 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3078 // CHECK12: omp.inner.for.inc:
3079 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3080 // CHECK12-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1
3081 // CHECK12-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4
3082 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3083 // CHECK12: omp.inner.for.end:
3084 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3085 // CHECK12: omp.loop.exit:
3086 // CHECK12-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3087 // CHECK12-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
3088 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
3089 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3090 // CHECK12-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR5]], i32 0, i32 0
3091 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN13]], i32 2
3092 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3093 // CHECK12: arraydestroy.body:
3094 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP34]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3095 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3096 // CHECK12-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3097 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3098 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3099 // CHECK12: arraydestroy.done14:
3100 // CHECK12-NEXT: ret void
3101 //
3102 //
3103 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3104 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3105 // CHECK12-NEXT: entry:
3106 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3107 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3108 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3109 // CHECK12-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3110 // CHECK12-NEXT: ret void
3111 //
3112 //
3113 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3114 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] comdat {
3115 // CHECK12-NEXT: entry:
3116 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3117 // CHECK12-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3118 // CHECK12-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
3119 // CHECK12-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
3120 // CHECK12-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3121 // CHECK12-NEXT: [[VAR:%.*]] = alloca %struct.S.0*, align 4
3122 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3123 // CHECK12-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
3124 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x i8*], align 4
3125 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x i8*], align 4
3126 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x i8*], align 4
3127 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3128 // CHECK12-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]])
3129 // CHECK12-NEXT: store i32 0, i32* [[T_VAR]], align 4
3130 // CHECK12-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
3131 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
3132 // CHECK12-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3133 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 1)
3134 // CHECK12-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
3135 // CHECK12-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 2)
3136 // CHECK12-NEXT: store %struct.S.0* [[TEST]], %struct.S.0** [[VAR]], align 4
3137 // CHECK12-NEXT: [[TMP1:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR]], align 4
3138 // CHECK12-NEXT: store %struct.S.0* [[TMP1]], %struct.S.0** [[TMP]], align 4
3139 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR]], align 4
3140 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[T_VAR_CASTED]], align 4
3141 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
3142 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3143 // CHECK12-NEXT: [[TMP5:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3144 // CHECK12-NEXT: [[TMP6:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3145 // CHECK12-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3146 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
3147 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
3148 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3149 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
3150 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
3151 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3152 // CHECK12-NEXT: store i8* null, i8** [[TMP11]], align 4
3153 // CHECK12-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3154 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to [2 x i32]**
3155 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP13]], align 4
3156 // CHECK12-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3157 // CHECK12-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to [2 x i32]**
3158 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[TMP15]], align 4
3159 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3160 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4
3161 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3162 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to [2 x %struct.S.0]**
3163 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP18]], align 4
3164 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3165 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to [2 x %struct.S.0]**
3166 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[TMP20]], align 4
3167 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3168 // CHECK12-NEXT: store i8* null, i8** [[TMP21]], align 4
3169 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3170 // CHECK12-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to %struct.S.0**
3171 // CHECK12-NEXT: store %struct.S.0* [[TMP5]], %struct.S.0** [[TMP23]], align 4
3172 // CHECK12-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3173 // CHECK12-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to %struct.S.0**
3174 // CHECK12-NEXT: store %struct.S.0* [[TMP6]], %struct.S.0** [[TMP25]], align 4
3175 // CHECK12-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3176 // CHECK12-NEXT: store i8* null, i8** [[TMP26]], align 4
3177 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3178 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3179 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i64 2)
3180 // CHECK12-NEXT: [[TMP29:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB2]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, i32 4, i8** [[TMP27]], i8** [[TMP28]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_sizes.2, i32 0, i32 0), i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.3, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3181 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3182 // CHECK12-NEXT: br i1 [[TMP30]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3183 // CHECK12: omp_offload.failed:
3184 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP3]], [2 x i32]* [[VEC]], [2 x %struct.S.0]* [[S_ARR]], %struct.S.0* [[TMP4]]) #[[ATTR4]]
3185 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3186 // CHECK12: omp_offload.cont:
3187 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
3188 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
3189 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3190 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3191 // CHECK12: arraydestroy.body:
3192 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP31]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3193 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3194 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3195 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3196 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
3197 // CHECK12: arraydestroy.done2:
3198 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3199 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[RETVAL]], align 4
3200 // CHECK12-NEXT: ret i32 [[TMP32]]
3201 //
3202 //
3203 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3204 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3205 // CHECK12-NEXT: entry:
3206 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3207 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3208 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3209 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3210 // CHECK12-NEXT: store float 0.000000e+00, float* [[F]], align 4
3211 // CHECK12-NEXT: ret void
3212 //
3213 //
3214 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3215 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], float [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3216 // CHECK12-NEXT: entry:
3217 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3218 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
3219 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3220 // CHECK12-NEXT: store float [[A]], float* [[A_ADDR]], align 4
3221 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3222 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
3223 // CHECK12-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
3224 // CHECK12-NEXT: store float [[TMP0]], float* [[F]], align 4
3225 // CHECK12-NEXT: ret void
3226 //
3227 //
3228 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3229 // CHECK12-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3230 // CHECK12-NEXT: entry:
3231 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
3232 // CHECK12-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
3233 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
3234 // CHECK12-NEXT: ret void
3235 //
3236 //
3237 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3238 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3239 // CHECK12-NEXT: entry:
3240 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3241 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3242 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3243 // CHECK12-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]])
3244 // CHECK12-NEXT: ret void
3245 //
3246 //
3247 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3248 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3249 // CHECK12-NEXT: entry:
3250 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3251 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3252 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3253 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3254 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3255 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3256 // CHECK12-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]])
3257 // CHECK12-NEXT: ret void
3258 //
3259 //
3260 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
3261 // CHECK12-SAME: (i32 [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3262 // CHECK12-NEXT: entry:
3263 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
3264 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3265 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3266 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3267 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3268 // CHECK12-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
3269 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3270 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3271 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3272 // CHECK12-NEXT: [[TMP0:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3273 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3274 // CHECK12-NEXT: [[TMP2:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3275 // CHECK12-NEXT: store %struct.S.0* [[TMP2]], %struct.S.0** [[TMP]], align 4
3276 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3277 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB2]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, [2 x i32]*, [2 x %struct.S.0]*, %struct.S.0*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]], [2 x i32]* [[TMP0]], [2 x %struct.S.0]* [[TMP1]], %struct.S.0* [[TMP3]])
3278 // CHECK12-NEXT: ret void
3279 //
3280 //
3281 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3282 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], [2 x i32]* nonnull align 4 dereferenceable(8) [[VEC:%.*]], [2 x %struct.S.0]* nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], %struct.S.0* nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3283 // CHECK12-NEXT: entry:
3284 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3285 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3286 // CHECK12-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
3287 // CHECK12-NEXT: [[VEC_ADDR:%.*]] = alloca [2 x i32]*, align 4
3288 // CHECK12-NEXT: [[S_ARR_ADDR:%.*]] = alloca [2 x %struct.S.0]*, align 4
3289 // CHECK12-NEXT: [[VAR_ADDR:%.*]] = alloca %struct.S.0*, align 4
3290 // CHECK12-NEXT: [[TMP:%.*]] = alloca %struct.S.0*, align 4
3291 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca %struct.S.0*, align 4
3292 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3293 // CHECK12-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3294 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3295 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3296 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3297 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3298 // CHECK12-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
3299 // CHECK12-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
3300 // CHECK12-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
3301 // CHECK12-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3302 // CHECK12-NEXT: [[_TMP8:%.*]] = alloca %struct.S.0*, align 4
3303 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3304 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3305 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3306 // CHECK12-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
3307 // CHECK12-NEXT: store [2 x i32]* [[VEC]], [2 x i32]** [[VEC_ADDR]], align 4
3308 // CHECK12-NEXT: store [2 x %struct.S.0]* [[S_ARR]], [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3309 // CHECK12-NEXT: store %struct.S.0* [[VAR]], %struct.S.0** [[VAR_ADDR]], align 4
3310 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
3311 // CHECK12-NEXT: [[TMP1:%.*]] = load [2 x i32]*, [2 x i32]** [[VEC_ADDR]], align 4
3312 // CHECK12-NEXT: [[TMP2:%.*]] = load [2 x %struct.S.0]*, [2 x %struct.S.0]** [[S_ARR_ADDR]], align 4
3313 // CHECK12-NEXT: [[TMP3:%.*]] = load %struct.S.0*, %struct.S.0** [[VAR_ADDR]], align 4
3314 // CHECK12-NEXT: store %struct.S.0* [[TMP3]], %struct.S.0** [[TMP]], align 4
3315 // CHECK12-NEXT: [[TMP4:%.*]] = load %struct.S.0*, %struct.S.0** [[TMP]], align 4
3316 // CHECK12-NEXT: store %struct.S.0* [[TMP4]], %struct.S.0** [[_TMP1]], align 4
3317 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3318 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
3319 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3320 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3321 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
3322 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[T_VAR3]], align 4
3323 // CHECK12-NEXT: [[TMP6:%.*]] = bitcast [2 x i32]* [[VEC4]] to i8*
3324 // CHECK12-NEXT: [[TMP7:%.*]] = bitcast [2 x i32]* [[TMP1]] to i8*
3325 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 [[TMP7]], i32 8, i1 false)
3326 // CHECK12-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3327 // CHECK12-NEXT: [[TMP8:%.*]] = bitcast [2 x %struct.S.0]* [[TMP2]] to %struct.S.0*
3328 // CHECK12-NEXT: [[TMP9:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
3329 // CHECK12-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP9]]
3330 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3331 // CHECK12: omp.arraycpy.body:
3332 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP8]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3333 // CHECK12-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3334 // CHECK12-NEXT: [[TMP10:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8*
3335 // CHECK12-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8*
3336 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP10]], i8* align 4 [[TMP11]], i32 4, i1 false)
3337 // CHECK12-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3338 // CHECK12-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3339 // CHECK12-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
3340 // CHECK12-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
3341 // CHECK12: omp.arraycpy.done6:
3342 // CHECK12-NEXT: [[TMP12:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 4
3343 // CHECK12-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[VAR7]] to i8*
3344 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast %struct.S.0* [[TMP12]] to i8*
3345 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP13]], i8* align 4 [[TMP14]], i32 4, i1 false)
3346 // CHECK12-NEXT: store %struct.S.0* [[VAR7]], %struct.S.0** [[_TMP8]], align 4
3347 // CHECK12-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3348 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP15]], align 4
3349 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP16]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3350 // CHECK12-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3351 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP17]], 1
3352 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3353 // CHECK12: cond.true:
3354 // CHECK12-NEXT: br label [[COND_END:%.*]]
3355 // CHECK12: cond.false:
3356 // CHECK12-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3357 // CHECK12-NEXT: br label [[COND_END]]
3358 // CHECK12: cond.end:
3359 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP18]], [[COND_FALSE]] ]
3360 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3361 // CHECK12-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3362 // CHECK12-NEXT: store i32 [[TMP19]], i32* [[DOTOMP_IV]], align 4
3363 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3364 // CHECK12: omp.inner.for.cond:
3365 // CHECK12-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3366 // CHECK12-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3367 // CHECK12-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
3368 // CHECK12-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3369 // CHECK12: omp.inner.for.cond.cleanup:
3370 // CHECK12-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
3371 // CHECK12: omp.inner.for.body:
3372 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3373 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1
3374 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3375 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3376 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[T_VAR3]], align 4
3377 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4
3378 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC4]], i32 0, i32 [[TMP24]]
3379 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[ARRAYIDX]], align 4
3380 // CHECK12-NEXT: [[TMP25:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP8]], align 4
3381 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[I]], align 4
3382 // CHECK12-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 [[TMP26]]
3383 // CHECK12-NEXT: [[TMP27:%.*]] = bitcast %struct.S.0* [[ARRAYIDX10]] to i8*
3384 // CHECK12-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[TMP25]] to i8*
3385 // CHECK12-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP27]], i8* align 4 [[TMP28]], i32 4, i1 false)
3386 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3387 // CHECK12: omp.body.continue:
3388 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3389 // CHECK12: omp.inner.for.inc:
3390 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3391 // CHECK12-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP29]], 1
3392 // CHECK12-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4
3393 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3394 // CHECK12: omp.inner.for.end:
3395 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3396 // CHECK12: omp.loop.exit:
3397 // CHECK12-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3398 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4
3399 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP31]])
3400 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3401 // CHECK12-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR5]], i32 0, i32 0
3402 // CHECK12-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN12]], i32 2
3403 // CHECK12-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
3404 // CHECK12: arraydestroy.body:
3405 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3406 // CHECK12-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3407 // CHECK12-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3408 // CHECK12-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
3409 // CHECK12-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
3410 // CHECK12: arraydestroy.done13:
3411 // CHECK12-NEXT: ret void
3412 //
3413 //
3414 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3415 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3416 // CHECK12-NEXT: entry:
3417 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3418 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3419 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3420 // CHECK12-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3421 // CHECK12-NEXT: ret void
3422 //
3423 //
3424 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3425 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3426 // CHECK12-NEXT: entry:
3427 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3428 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3429 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3430 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3431 // CHECK12-NEXT: store i32 0, i32* [[F]], align 4
3432 // CHECK12-NEXT: ret void
3433 //
3434 //
3435 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3436 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3437 // CHECK12-NEXT: entry:
3438 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3439 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
3440 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3441 // CHECK12-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
3442 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3443 // CHECK12-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
3444 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
3445 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
3446 // CHECK12-NEXT: ret void
3447 //
3448 //
3449 // CHECK12-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3450 // CHECK12-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3451 // CHECK12-NEXT: entry:
3452 // CHECK12-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
3453 // CHECK12-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
3454 // CHECK12-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
3455 // CHECK12-NEXT: ret void
3456 //
3457 //
3458 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3459 // CHECK12-SAME: () #[[ATTR6:[0-9]+]] {
3460 // CHECK12-NEXT: entry:
3461 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
3462 // CHECK12-NEXT: ret void
3463 //
3464 //