1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X][Y];
25
fooSS26 int foo(void) {
27
28 #pragma omp target teams distribute parallel for collapse(2)
29 for(int i = 0; i < X; i++) {
30 for(int j = 0; j < Y; j++) {
31 a[i][j] = (T)0;
32 }
33 }
34
35 // discard loop variables not needed here
36
37
38 return a[0][0];
39 }
40 };
41
teams_template_struct(void)42 int teams_template_struct(void) {
43 SS<int, 123, 456> V;
44 return V.foo();
45
46 }
47 #endif // CK1
48
49 // Test host codegen.
50 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
51 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
52 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
53 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
54 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
56
57 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
58 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
59 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
60 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
61 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
63 #ifdef CK2
64
65 template <typename T, int n, int m>
tmain(T argc)66 int tmain(T argc) {
67 T a[n][m];
68 #pragma omp target teams distribute parallel for collapse(2)
69 for(int i = 0; i < n; i++) {
70 for(int j = 0; j < m; j++) {
71 a[i][j] = (T)0;
72 }
73 }
74 return 0;
75 }
76
main(int argc,char ** argv)77 int main (int argc, char **argv) {
78 int n = 100;
79 int m = 2;
80 int a[n][m];
81 #pragma omp target teams distribute parallel for collapse(2)
82 for(int i = 0; i < n; i++) {
83 for(int j = 0; j < m; j++) {
84 a[i][j] = 0;
85 }
86 }
87 return tmain<int, 10, 2>(argc);
88 }
89
90
91
92
93
94
95
96
97 // discard loop variables not needed here
98
99
100 #endif // CK2
101 #endif // #ifndef HEADER
102 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
103 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
104 // CHECK1-NEXT: entry:
105 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
106 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
107 // CHECK1-NEXT: ret i32 [[CALL]]
108 //
109 //
110 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
111 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
112 // CHECK1-NEXT: entry:
113 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
114 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
115 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
116 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
117 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
118 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
119 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
120 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
121 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
122 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
123 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
124 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
125 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
126 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
127 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
128 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
129 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
130 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
132 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
133 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
134 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
135 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
136 // CHECK1: omp_offload.failed:
137 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
138 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
139 // CHECK1: omp_offload.cont:
140 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
141 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
142 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
143 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
144 // CHECK1-NEXT: ret i32 [[TMP9]]
145 //
146 //
147 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
148 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
149 // CHECK1-NEXT: entry:
150 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
151 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
152 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
153 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
154 // CHECK1-NEXT: ret void
155 //
156 //
157 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
158 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
159 // CHECK1-NEXT: entry:
160 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
161 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
162 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
163 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
164 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
165 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
166 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
167 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
168 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
169 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
170 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
171 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
172 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
173 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
174 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
175 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
176 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
177 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
178 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
179 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
180 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
181 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
182 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
183 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
184 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
185 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
186 // CHECK1: cond.true:
187 // CHECK1-NEXT: br label [[COND_END:%.*]]
188 // CHECK1: cond.false:
189 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
190 // CHECK1-NEXT: br label [[COND_END]]
191 // CHECK1: cond.end:
192 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
193 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
194 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
195 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
196 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
197 // CHECK1: omp.inner.for.cond:
198 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
199 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
200 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
201 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
202 // CHECK1: omp.inner.for.body:
203 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
204 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
205 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
206 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
207 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
208 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
209 // CHECK1: omp.inner.for.inc:
210 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
211 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
212 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
213 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
214 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
215 // CHECK1: omp.inner.for.end:
216 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
217 // CHECK1: omp.loop.exit:
218 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
219 // CHECK1-NEXT: ret void
220 //
221 //
222 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
223 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
224 // CHECK1-NEXT: entry:
225 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
226 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
227 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
228 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
229 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
230 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
232 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
233 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
234 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
236 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
237 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
238 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
240 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
241 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
242 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
243 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
244 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
245 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
246 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
247 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
248 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
249 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
250 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
251 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
252 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
253 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
254 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
255 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
256 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
257 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
258 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
259 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
260 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
261 // CHECK1: cond.true:
262 // CHECK1-NEXT: br label [[COND_END:%.*]]
263 // CHECK1: cond.false:
264 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
265 // CHECK1-NEXT: br label [[COND_END]]
266 // CHECK1: cond.end:
267 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
268 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
269 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
270 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
271 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
272 // CHECK1: omp.inner.for.cond:
273 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
274 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
275 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
276 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
277 // CHECK1: omp.inner.for.body:
278 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
279 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
280 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
281 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
282 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
283 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
284 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
285 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
286 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
287 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
288 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
289 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
290 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
291 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
292 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
293 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
294 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
295 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
296 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
297 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
298 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
299 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
300 // CHECK1: omp.body.continue:
301 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
302 // CHECK1: omp.inner.for.inc:
303 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
304 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
305 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
306 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
307 // CHECK1: omp.inner.for.end:
308 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
309 // CHECK1: omp.loop.exit:
310 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
311 // CHECK1-NEXT: ret void
312 //
313 //
314 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
315 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
316 // CHECK1-NEXT: entry:
317 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
318 // CHECK1-NEXT: ret void
319 //
320 //
321 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
322 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
323 // CHECK2-NEXT: entry:
324 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
325 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
326 // CHECK2-NEXT: ret i32 [[CALL]]
327 //
328 //
329 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
330 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
331 // CHECK2-NEXT: entry:
332 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
333 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
334 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
335 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
336 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
337 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
338 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
339 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
340 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
341 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
342 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
343 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
344 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
345 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
346 // CHECK2-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
347 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
348 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8
349 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
350 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
351 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
352 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
353 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
354 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
355 // CHECK2: omp_offload.failed:
356 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
357 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
358 // CHECK2: omp_offload.cont:
359 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
360 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
361 // CHECK2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
362 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
363 // CHECK2-NEXT: ret i32 [[TMP9]]
364 //
365 //
366 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
367 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
368 // CHECK2-NEXT: entry:
369 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
370 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
371 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
372 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
373 // CHECK2-NEXT: ret void
374 //
375 //
376 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
377 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
378 // CHECK2-NEXT: entry:
379 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
380 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
381 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
382 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
383 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
384 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
385 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
386 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
387 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
388 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
389 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
390 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
391 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
392 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
393 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
394 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
395 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
396 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
397 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
398 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
399 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
400 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
401 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
402 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
403 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
404 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
405 // CHECK2: cond.true:
406 // CHECK2-NEXT: br label [[COND_END:%.*]]
407 // CHECK2: cond.false:
408 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
409 // CHECK2-NEXT: br label [[COND_END]]
410 // CHECK2: cond.end:
411 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
412 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
413 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
414 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
415 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
416 // CHECK2: omp.inner.for.cond:
417 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
418 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
419 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
420 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
421 // CHECK2: omp.inner.for.body:
422 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
423 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
424 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
425 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
426 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
427 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
428 // CHECK2: omp.inner.for.inc:
429 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
430 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
431 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
432 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
433 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
434 // CHECK2: omp.inner.for.end:
435 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
436 // CHECK2: omp.loop.exit:
437 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
438 // CHECK2-NEXT: ret void
439 //
440 //
441 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
442 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
443 // CHECK2-NEXT: entry:
444 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
445 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
446 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
447 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
448 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
449 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
450 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
451 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
452 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
453 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
454 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
455 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
456 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
457 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
458 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
459 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
460 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
461 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
462 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
463 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
464 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
465 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
466 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
467 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
468 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
469 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
470 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
471 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
472 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
473 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
474 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
475 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
476 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
477 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
478 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
479 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
480 // CHECK2: cond.true:
481 // CHECK2-NEXT: br label [[COND_END:%.*]]
482 // CHECK2: cond.false:
483 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
484 // CHECK2-NEXT: br label [[COND_END]]
485 // CHECK2: cond.end:
486 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
487 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
488 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
489 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
490 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
491 // CHECK2: omp.inner.for.cond:
492 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
493 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
494 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
495 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
496 // CHECK2: omp.inner.for.body:
497 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
498 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
499 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
500 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
501 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
502 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
503 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
504 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
505 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
506 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
507 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
508 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
509 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
510 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
511 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
512 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
513 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
514 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
515 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
516 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
517 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
518 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
519 // CHECK2: omp.body.continue:
520 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
521 // CHECK2: omp.inner.for.inc:
522 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
523 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
524 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
525 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]]
526 // CHECK2: omp.inner.for.end:
527 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
528 // CHECK2: omp.loop.exit:
529 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
530 // CHECK2-NEXT: ret void
531 //
532 //
533 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
534 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
535 // CHECK2-NEXT: entry:
536 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
537 // CHECK2-NEXT: ret void
538 //
539 //
540 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
541 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
542 // CHECK3-NEXT: entry:
543 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
544 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
545 // CHECK3-NEXT: ret i32 [[CALL]]
546 //
547 //
548 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
549 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
550 // CHECK3-NEXT: entry:
551 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
552 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
553 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
554 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
555 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
556 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
557 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
558 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
559 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
560 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
561 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
562 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
563 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
564 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
565 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
566 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
567 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
568 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
569 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
570 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
571 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
572 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
573 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
574 // CHECK3: omp_offload.failed:
575 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
576 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
577 // CHECK3: omp_offload.cont:
578 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
579 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
580 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
581 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
582 // CHECK3-NEXT: ret i32 [[TMP9]]
583 //
584 //
585 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
586 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
587 // CHECK3-NEXT: entry:
588 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
589 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
590 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
591 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
592 // CHECK3-NEXT: ret void
593 //
594 //
595 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
596 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
597 // CHECK3-NEXT: entry:
598 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
599 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
600 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
601 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
602 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
603 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
604 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
605 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
606 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
607 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
608 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
609 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
610 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
611 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
612 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
613 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
614 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
615 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
616 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
617 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
618 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
619 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
620 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
621 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
622 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
623 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
624 // CHECK3: cond.true:
625 // CHECK3-NEXT: br label [[COND_END:%.*]]
626 // CHECK3: cond.false:
627 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
628 // CHECK3-NEXT: br label [[COND_END]]
629 // CHECK3: cond.end:
630 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
631 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
632 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
633 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
634 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
635 // CHECK3: omp.inner.for.cond:
636 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
637 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
638 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
639 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
640 // CHECK3: omp.inner.for.body:
641 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
642 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
643 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
644 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
645 // CHECK3: omp.inner.for.inc:
646 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
647 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
648 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
649 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
650 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
651 // CHECK3: omp.inner.for.end:
652 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
653 // CHECK3: omp.loop.exit:
654 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
655 // CHECK3-NEXT: ret void
656 //
657 //
658 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
659 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
660 // CHECK3-NEXT: entry:
661 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
662 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
663 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
664 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
665 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
666 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
667 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
668 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
669 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
670 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
671 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
672 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
673 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
674 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
675 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
676 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
677 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
678 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
679 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
680 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
681 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
682 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
683 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
684 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
685 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
686 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
687 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
688 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
689 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
690 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
691 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
692 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
693 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
694 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
695 // CHECK3: cond.true:
696 // CHECK3-NEXT: br label [[COND_END:%.*]]
697 // CHECK3: cond.false:
698 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
699 // CHECK3-NEXT: br label [[COND_END]]
700 // CHECK3: cond.end:
701 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
702 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
703 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
704 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
705 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
706 // CHECK3: omp.inner.for.cond:
707 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
708 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
709 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
710 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
711 // CHECK3: omp.inner.for.body:
712 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
713 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
714 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
715 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
716 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
717 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
718 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
719 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
720 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
721 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
722 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
723 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
724 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
725 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
726 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
727 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
728 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
729 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
730 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
731 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
732 // CHECK3: omp.body.continue:
733 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
734 // CHECK3: omp.inner.for.inc:
735 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
736 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
737 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
738 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
739 // CHECK3: omp.inner.for.end:
740 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
741 // CHECK3: omp.loop.exit:
742 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
743 // CHECK3-NEXT: ret void
744 //
745 //
746 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
747 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
748 // CHECK3-NEXT: entry:
749 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
750 // CHECK3-NEXT: ret void
751 //
752 //
753 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
754 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
755 // CHECK4-NEXT: entry:
756 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
757 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
758 // CHECK4-NEXT: ret i32 [[CALL]]
759 //
760 //
761 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
762 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
763 // CHECK4-NEXT: entry:
764 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
765 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
766 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
767 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
768 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
769 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
770 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
771 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
772 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
773 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
774 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
775 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
776 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
777 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
778 // CHECK4-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
779 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
780 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4
781 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
782 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
783 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
784 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
785 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
786 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
787 // CHECK4: omp_offload.failed:
788 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
789 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
790 // CHECK4: omp_offload.cont:
791 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
792 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
793 // CHECK4-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
794 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
795 // CHECK4-NEXT: ret i32 [[TMP9]]
796 //
797 //
798 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
799 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
800 // CHECK4-NEXT: entry:
801 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
802 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
803 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
804 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
805 // CHECK4-NEXT: ret void
806 //
807 //
808 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
809 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
810 // CHECK4-NEXT: entry:
811 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
812 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
813 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
814 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
815 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
816 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
817 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
818 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
819 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
820 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
821 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
822 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
823 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
824 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
825 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
826 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
827 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
828 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
829 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
830 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
831 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
832 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
833 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
834 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
835 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
836 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
837 // CHECK4: cond.true:
838 // CHECK4-NEXT: br label [[COND_END:%.*]]
839 // CHECK4: cond.false:
840 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
841 // CHECK4-NEXT: br label [[COND_END]]
842 // CHECK4: cond.end:
843 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
844 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
845 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
846 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
847 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
848 // CHECK4: omp.inner.for.cond:
849 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
850 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
851 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
852 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
853 // CHECK4: omp.inner.for.body:
854 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
855 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
856 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
857 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
858 // CHECK4: omp.inner.for.inc:
859 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
860 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
861 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
862 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
863 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
864 // CHECK4: omp.inner.for.end:
865 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
866 // CHECK4: omp.loop.exit:
867 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
868 // CHECK4-NEXT: ret void
869 //
870 //
871 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
872 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
873 // CHECK4-NEXT: entry:
874 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
875 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
876 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
877 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
878 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
879 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
880 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
881 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
882 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
883 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
884 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
885 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
886 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
887 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
888 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
889 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
890 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
891 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
892 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
893 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
894 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
895 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
896 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
897 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
898 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
899 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
900 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
901 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
902 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
903 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
904 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
905 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
906 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
907 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
908 // CHECK4: cond.true:
909 // CHECK4-NEXT: br label [[COND_END:%.*]]
910 // CHECK4: cond.false:
911 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
912 // CHECK4-NEXT: br label [[COND_END]]
913 // CHECK4: cond.end:
914 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
915 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
916 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
917 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
918 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
919 // CHECK4: omp.inner.for.cond:
920 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
921 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
922 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
923 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
924 // CHECK4: omp.inner.for.body:
925 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
926 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
927 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
928 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
929 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
930 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
931 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
932 // CHECK4-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
933 // CHECK4-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
934 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
935 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
936 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
937 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
938 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
939 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
940 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
941 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
942 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
943 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
944 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
945 // CHECK4: omp.body.continue:
946 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
947 // CHECK4: omp.inner.for.inc:
948 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
949 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
950 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
951 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
952 // CHECK4: omp.inner.for.end:
953 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
954 // CHECK4: omp.loop.exit:
955 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
956 // CHECK4-NEXT: ret void
957 //
958 //
959 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
960 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
961 // CHECK4-NEXT: entry:
962 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
963 // CHECK4-NEXT: ret void
964 //
965 //
966 // CHECK9-LABEL: define {{[^@]+}}@main
967 // CHECK9-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
968 // CHECK9-NEXT: entry:
969 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
970 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
971 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
972 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
973 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
974 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
975 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
976 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
977 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
978 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
979 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
980 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
981 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
982 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
983 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
984 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
985 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
986 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
987 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
988 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
989 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
990 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
991 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
992 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4
993 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
994 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
995 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
996 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
997 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
998 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
999 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
1000 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
1001 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
1002 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
1003 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
1004 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1005 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
1006 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
1007 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
1008 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1009 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
1010 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
1011 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
1012 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
1013 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1014 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1015 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP13]], align 8
1016 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1017 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1018 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP15]], align 8
1019 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1020 // CHECK9-NEXT: store i64 4, i64* [[TMP16]], align 8
1021 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1022 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
1023 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1024 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
1025 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
1026 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1027 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
1028 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
1029 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
1030 // CHECK9-NEXT: store i64 4, i64* [[TMP22]], align 8
1031 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1032 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
1033 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1034 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1035 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP25]], align 8
1036 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1037 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
1038 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8
1039 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1040 // CHECK9-NEXT: store i64 8, i64* [[TMP28]], align 8
1041 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1042 // CHECK9-NEXT: store i8* null, i8** [[TMP29]], align 8
1043 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1044 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
1045 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
1046 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1047 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i64*
1048 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP33]], align 8
1049 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
1050 // CHECK9-NEXT: store i64 8, i64* [[TMP34]], align 8
1051 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1052 // CHECK9-NEXT: store i8* null, i8** [[TMP35]], align 8
1053 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1054 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32**
1055 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP37]], align 8
1056 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1057 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32**
1058 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP39]], align 8
1059 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1060 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP40]], align 8
1061 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1062 // CHECK9-NEXT: store i8* null, i8** [[TMP41]], align 8
1063 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1064 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1065 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1066 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[N]], align 4
1067 // CHECK9-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_]], align 4
1068 // CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[M]], align 4
1069 // CHECK9-NEXT: store i32 [[TMP46]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1070 // CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1071 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP47]], 0
1072 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1073 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
1074 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1075 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP48]], 0
1076 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1077 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1078 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
1079 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1080 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
1081 // CHECK9-NEXT: [[TMP49:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
1082 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP49]], 1
1083 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
1084 // CHECK9-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 5, i8** [[TMP42]], i8** [[TMP43]], i64* [[TMP44]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1085 // CHECK9-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
1086 // CHECK9-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1087 // CHECK9: omp_offload.failed:
1088 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1089 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1090 // CHECK9: omp_offload.cont:
1091 // CHECK9-NEXT: [[TMP52:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1092 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP52]])
1093 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1094 // CHECK9-NEXT: [[TMP53:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1095 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP53]])
1096 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[RETVAL]], align 4
1097 // CHECK9-NEXT: ret i32 [[TMP54]]
1098 //
1099 //
1100 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
1101 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1102 // CHECK9-NEXT: entry:
1103 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1104 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1105 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1106 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1107 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1108 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1109 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
1110 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1111 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1112 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1113 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1114 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1115 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1116 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1117 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1118 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1119 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1120 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1121 // CHECK9-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1122 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
1123 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1124 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
1125 // CHECK9-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1126 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
1127 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
1128 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
1129 // CHECK9-NEXT: ret void
1130 //
1131 //
1132 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1133 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1134 // CHECK9-NEXT: entry:
1135 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1136 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1137 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1138 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1139 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1140 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1141 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1142 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1143 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1144 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1145 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1146 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1147 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
1148 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1149 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1150 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1151 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1152 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1153 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1154 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4
1155 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4
1156 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1157 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
1158 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1159 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1160 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1161 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1162 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1163 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1164 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1165 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1166 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1167 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1168 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1169 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1170 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1171 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1172 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
1173 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1174 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1175 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1176 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1177 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
1178 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1179 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
1180 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1181 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
1182 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
1183 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
1184 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
1185 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1186 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
1187 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1188 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1189 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1190 // CHECK9: land.lhs.true:
1191 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1192 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
1193 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1194 // CHECK9: omp.precond.then:
1195 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1196 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1197 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
1198 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1199 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1200 // CHECK9-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1201 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1202 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1203 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1204 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1205 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
1206 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1207 // CHECK9: cond.true:
1208 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1209 // CHECK9-NEXT: br label [[COND_END:%.*]]
1210 // CHECK9: cond.false:
1211 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1212 // CHECK9-NEXT: br label [[COND_END]]
1213 // CHECK9: cond.end:
1214 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
1215 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1216 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1217 // CHECK9-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
1218 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1219 // CHECK9: omp.inner.for.cond:
1220 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1221 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1222 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
1223 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1224 // CHECK9: omp.inner.for.body:
1225 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1226 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1227 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
1228 // CHECK9-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1229 // CHECK9-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4
1230 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
1231 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 8
1232 // CHECK9-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1233 // CHECK9-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4
1234 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8
1235 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP19]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP24]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
1236 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1237 // CHECK9: omp.inner.for.inc:
1238 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1239 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1240 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
1241 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
1242 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1243 // CHECK9: omp.inner.for.end:
1244 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1245 // CHECK9: omp.loop.exit:
1246 // CHECK9-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1247 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1248 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
1249 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1250 // CHECK9: omp.precond.end:
1251 // CHECK9-NEXT: ret void
1252 //
1253 //
1254 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1255 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1256 // CHECK9-NEXT: entry:
1257 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1258 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1259 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1260 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1261 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1262 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1263 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1264 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1265 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1266 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1267 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1268 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1269 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1270 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1271 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
1272 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1273 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1274 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1275 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1276 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1277 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1278 // CHECK9-NEXT: [[I13:%.*]] = alloca i32, align 4
1279 // CHECK9-NEXT: [[J14:%.*]] = alloca i32, align 4
1280 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1281 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1282 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1283 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1284 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1285 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1286 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1287 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1288 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1289 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1290 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1291 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1292 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1293 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1294 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1295 // CHECK9-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1296 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
1297 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1298 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1299 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1300 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1301 // CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
1302 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1303 // CHECK9-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
1304 // CHECK9-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1305 // CHECK9-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
1306 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
1307 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
1308 // CHECK9-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
1309 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1310 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
1311 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1312 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1313 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1314 // CHECK9: land.lhs.true:
1315 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1316 // CHECK9-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
1317 // CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1318 // CHECK9: omp.precond.then:
1319 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1320 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1321 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
1322 // CHECK9-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1323 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1324 // CHECK9-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_LB]], align 8
1325 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1326 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1327 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1328 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1329 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1330 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1331 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1332 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1333 // CHECK9-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1334 // CHECK9-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1335 // CHECK9: cond.true:
1336 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1337 // CHECK9-NEXT: br label [[COND_END:%.*]]
1338 // CHECK9: cond.false:
1339 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1340 // CHECK9-NEXT: br label [[COND_END]]
1341 // CHECK9: cond.end:
1342 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1343 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1344 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1345 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1346 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1347 // CHECK9: omp.inner.for.cond:
1348 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1349 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1350 // CHECK9-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1351 // CHECK9-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1352 // CHECK9: omp.inner.for.body:
1353 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1354 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1355 // CHECK9-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
1356 // CHECK9-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
1357 // CHECK9-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
1358 // CHECK9-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
1359 // CHECK9-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
1360 // CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
1361 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
1362 // CHECK9-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
1363 // CHECK9-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
1364 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1365 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1366 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1367 // CHECK9-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
1368 // CHECK9-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
1369 // CHECK9-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
1370 // CHECK9-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
1371 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
1372 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1373 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
1374 // CHECK9-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
1375 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
1376 // CHECK9-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
1377 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
1378 // CHECK9-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
1379 // CHECK9-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
1380 // CHECK9-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
1381 // CHECK9-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
1382 // CHECK9-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
1383 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4
1384 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64
1385 // CHECK9-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]]
1386 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP28]]
1387 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4
1388 // CHECK9-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP29]] to i64
1389 // CHECK9-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM38]]
1390 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX39]], align 4
1391 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1392 // CHECK9: omp.body.continue:
1393 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1394 // CHECK9: omp.inner.for.inc:
1395 // CHECK9-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1396 // CHECK9-NEXT: [[ADD40:%.*]] = add nsw i64 [[TMP30]], 1
1397 // CHECK9-NEXT: store i64 [[ADD40]], i64* [[DOTOMP_IV]], align 8
1398 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1399 // CHECK9: omp.inner.for.end:
1400 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1401 // CHECK9: omp.loop.exit:
1402 // CHECK9-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1403 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
1404 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
1405 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1406 // CHECK9: omp.precond.end:
1407 // CHECK9-NEXT: ret void
1408 //
1409 //
1410 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1411 // CHECK9-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
1412 // CHECK9-NEXT: entry:
1413 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1414 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1415 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1416 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1417 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1418 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1419 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1420 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1421 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1422 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1423 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
1424 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1425 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1426 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
1427 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1428 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1429 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1430 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1431 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
1432 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1433 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1434 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1435 // CHECK9: omp_offload.failed:
1436 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1437 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1438 // CHECK9: omp_offload.cont:
1439 // CHECK9-NEXT: ret i32 0
1440 //
1441 //
1442 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
1443 // CHECK9-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1444 // CHECK9-NEXT: entry:
1445 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1446 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1447 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1448 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1449 // CHECK9-NEXT: ret void
1450 //
1451 //
1452 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1453 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1454 // CHECK9-NEXT: entry:
1455 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1456 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1457 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1458 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1459 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1460 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1461 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1462 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1463 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1464 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1465 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1466 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1467 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1468 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1469 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1470 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1471 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1472 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
1473 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1474 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1475 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1476 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1477 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1478 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1479 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1480 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1481 // CHECK9: cond.true:
1482 // CHECK9-NEXT: br label [[COND_END:%.*]]
1483 // CHECK9: cond.false:
1484 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1485 // CHECK9-NEXT: br label [[COND_END]]
1486 // CHECK9: cond.end:
1487 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1488 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1489 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1490 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1491 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1492 // CHECK9: omp.inner.for.cond:
1493 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1494 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1495 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1496 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1497 // CHECK9: omp.inner.for.body:
1498 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1499 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1500 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1501 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1502 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]])
1503 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1504 // CHECK9: omp.inner.for.inc:
1505 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1506 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1507 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1508 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1509 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1510 // CHECK9: omp.inner.for.end:
1511 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1512 // CHECK9: omp.loop.exit:
1513 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1514 // CHECK9-NEXT: ret void
1515 //
1516 //
1517 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1518 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1519 // CHECK9-NEXT: entry:
1520 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1521 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1522 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1523 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1524 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1525 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1526 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1527 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1528 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1529 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1530 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1531 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1532 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1533 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1534 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1535 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1536 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1537 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1538 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1539 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1540 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1541 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1542 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1543 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1544 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1545 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
1546 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1547 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1548 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1549 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1550 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1551 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1552 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1553 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1554 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
1555 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1556 // CHECK9: cond.true:
1557 // CHECK9-NEXT: br label [[COND_END:%.*]]
1558 // CHECK9: cond.false:
1559 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1560 // CHECK9-NEXT: br label [[COND_END]]
1561 // CHECK9: cond.end:
1562 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1563 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1564 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1565 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1566 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1567 // CHECK9: omp.inner.for.cond:
1568 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1569 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1570 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1571 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1572 // CHECK9: omp.inner.for.body:
1573 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1574 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
1575 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1576 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1577 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1578 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1579 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1580 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
1581 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
1582 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
1583 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
1584 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
1585 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
1586 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1587 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1588 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1589 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
1590 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
1591 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
1592 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
1593 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1594 // CHECK9: omp.body.continue:
1595 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1596 // CHECK9: omp.inner.for.inc:
1597 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1598 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
1599 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1600 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1601 // CHECK9: omp.inner.for.end:
1602 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1603 // CHECK9: omp.loop.exit:
1604 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1605 // CHECK9-NEXT: ret void
1606 //
1607 //
1608 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1609 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
1610 // CHECK9-NEXT: entry:
1611 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1612 // CHECK9-NEXT: ret void
1613 //
1614 //
1615 // CHECK10-LABEL: define {{[^@]+}}@main
1616 // CHECK10-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1617 // CHECK10-NEXT: entry:
1618 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1619 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1620 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
1621 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4
1622 // CHECK10-NEXT: [[M:%.*]] = alloca i32, align 4
1623 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
1624 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1625 // CHECK10-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
1626 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1627 // CHECK10-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
1628 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1629 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1630 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1631 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
1632 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1633 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1634 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1635 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1636 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
1637 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
1638 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1639 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
1640 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4
1641 // CHECK10-NEXT: store i32 2, i32* [[M]], align 4
1642 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1643 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1644 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
1645 // CHECK10-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
1646 // CHECK10-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
1647 // CHECK10-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
1648 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
1649 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
1650 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
1651 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
1652 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
1653 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1654 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
1655 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
1656 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
1657 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1658 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
1659 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
1660 // CHECK10-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
1661 // CHECK10-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
1662 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1663 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1664 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP13]], align 8
1665 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1666 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1667 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP15]], align 8
1668 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1669 // CHECK10-NEXT: store i64 4, i64* [[TMP16]], align 8
1670 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1671 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8
1672 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1673 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
1674 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
1675 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1676 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
1677 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
1678 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
1679 // CHECK10-NEXT: store i64 4, i64* [[TMP22]], align 8
1680 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1681 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
1682 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1683 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1684 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP25]], align 8
1685 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1686 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
1687 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8
1688 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1689 // CHECK10-NEXT: store i64 8, i64* [[TMP28]], align 8
1690 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1691 // CHECK10-NEXT: store i8* null, i8** [[TMP29]], align 8
1692 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1693 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
1694 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
1695 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1696 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i64*
1697 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP33]], align 8
1698 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
1699 // CHECK10-NEXT: store i64 8, i64* [[TMP34]], align 8
1700 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1701 // CHECK10-NEXT: store i8* null, i8** [[TMP35]], align 8
1702 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1703 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32**
1704 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP37]], align 8
1705 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1706 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32**
1707 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP39]], align 8
1708 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1709 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[TMP40]], align 8
1710 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1711 // CHECK10-NEXT: store i8* null, i8** [[TMP41]], align 8
1712 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1713 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1714 // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1715 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[N]], align 4
1716 // CHECK10-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_]], align 4
1717 // CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[M]], align 4
1718 // CHECK10-NEXT: store i32 [[TMP46]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1719 // CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1720 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP47]], 0
1721 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1722 // CHECK10-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
1723 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1724 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP48]], 0
1725 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1726 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1727 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
1728 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1729 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
1730 // CHECK10-NEXT: [[TMP49:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
1731 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP49]], 1
1732 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
1733 // CHECK10-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 5, i8** [[TMP42]], i8** [[TMP43]], i64* [[TMP44]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1734 // CHECK10-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
1735 // CHECK10-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1736 // CHECK10: omp_offload.failed:
1737 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1738 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
1739 // CHECK10: omp_offload.cont:
1740 // CHECK10-NEXT: [[TMP52:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1741 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP52]])
1742 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1743 // CHECK10-NEXT: [[TMP53:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1744 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP53]])
1745 // CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[RETVAL]], align 4
1746 // CHECK10-NEXT: ret i32 [[TMP54]]
1747 //
1748 //
1749 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
1750 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1751 // CHECK10-NEXT: entry:
1752 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1753 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1754 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1755 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1756 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1757 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1758 // CHECK10-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
1759 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1760 // CHECK10-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1761 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1762 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1763 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1764 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1765 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1766 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1767 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1768 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1769 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1770 // CHECK10-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1771 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[CONV4]], align 4
1772 // CHECK10-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
1773 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[CONV3]], align 8
1774 // CHECK10-NEXT: [[CONV5:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1775 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[CONV5]], align 4
1776 // CHECK10-NEXT: [[TMP6:%.*]] = load i64, i64* [[M_CASTED]], align 8
1777 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
1778 // CHECK10-NEXT: ret void
1779 //
1780 //
1781 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
1782 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1783 // CHECK10-NEXT: entry:
1784 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1785 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1786 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1787 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1788 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1789 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1790 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1791 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1792 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1793 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1794 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1795 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1796 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
1797 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1798 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
1799 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1800 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1801 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1802 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1803 // CHECK10-NEXT: [[I13:%.*]] = alloca i32, align 4
1804 // CHECK10-NEXT: [[J14:%.*]] = alloca i32, align 4
1805 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1806 // CHECK10-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
1807 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1808 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1809 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1810 // CHECK10-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1811 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1812 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1813 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1814 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1815 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1816 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1817 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1818 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1819 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1820 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1821 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
1822 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1823 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1824 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1825 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1826 // CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
1827 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1828 // CHECK10-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
1829 // CHECK10-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1830 // CHECK10-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
1831 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
1832 // CHECK10-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
1833 // CHECK10-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
1834 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
1835 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4
1836 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1837 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1838 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1839 // CHECK10: land.lhs.true:
1840 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1841 // CHECK10-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
1842 // CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1843 // CHECK10: omp.precond.then:
1844 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1845 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1846 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
1847 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1848 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1849 // CHECK10-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1850 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
1851 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1852 // CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1853 // CHECK10-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1854 // CHECK10-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
1855 // CHECK10-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1856 // CHECK10: cond.true:
1857 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1858 // CHECK10-NEXT: br label [[COND_END:%.*]]
1859 // CHECK10: cond.false:
1860 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1861 // CHECK10-NEXT: br label [[COND_END]]
1862 // CHECK10: cond.end:
1863 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
1864 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1865 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1866 // CHECK10-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
1867 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1868 // CHECK10: omp.inner.for.cond:
1869 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1870 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1871 // CHECK10-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
1872 // CHECK10-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1873 // CHECK10: omp.inner.for.body:
1874 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1875 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1876 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
1877 // CHECK10-NEXT: [[CONV17:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1878 // CHECK10-NEXT: store i32 [[TMP21]], i32* [[CONV17]], align 4
1879 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[N_CASTED]], align 8
1880 // CHECK10-NEXT: [[TMP23:%.*]] = load i32, i32* [[CONV3]], align 8
1881 // CHECK10-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1882 // CHECK10-NEXT: store i32 [[TMP23]], i32* [[CONV18]], align 4
1883 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[M_CASTED]], align 8
1884 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64, i64, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP19]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP24]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
1885 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1886 // CHECK10: omp.inner.for.inc:
1887 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1888 // CHECK10-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1889 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
1890 // CHECK10-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
1891 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
1892 // CHECK10: omp.inner.for.end:
1893 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1894 // CHECK10: omp.loop.exit:
1895 // CHECK10-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1896 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1897 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
1898 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
1899 // CHECK10: omp.precond.end:
1900 // CHECK10-NEXT: ret void
1901 //
1902 //
1903 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
1904 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1905 // CHECK10-NEXT: entry:
1906 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1907 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1908 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1909 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1910 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1911 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1912 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1913 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1914 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1915 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1916 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
1917 // CHECK10-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1918 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1919 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4
1920 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i64, align 8
1921 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
1922 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
1923 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1924 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1925 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1926 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1927 // CHECK10-NEXT: [[I13:%.*]] = alloca i32, align 4
1928 // CHECK10-NEXT: [[J14:%.*]] = alloca i32, align 4
1929 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1930 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1931 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1932 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1933 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1934 // CHECK10-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1935 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1936 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1937 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1938 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1939 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1940 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1941 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1942 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1943 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
1944 // CHECK10-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
1945 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV3]], align 8
1946 // CHECK10-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_5]], align 4
1947 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1948 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1949 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1950 // CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[DIV]] to i64
1951 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1952 // CHECK10-NEXT: [[SUB8:%.*]] = sub nsw i32 [[TMP6]], 0
1953 // CHECK10-NEXT: [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1954 // CHECK10-NEXT: [[CONV10:%.*]] = sext i32 [[DIV9]] to i64
1955 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV7]], [[CONV10]]
1956 // CHECK10-NEXT: [[SUB11:%.*]] = sub nsw i64 [[MUL]], 1
1957 // CHECK10-NEXT: store i64 [[SUB11]], i64* [[DOTCAPTURE_EXPR_6]], align 8
1958 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
1959 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4
1960 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1961 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1962 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1963 // CHECK10: land.lhs.true:
1964 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
1965 // CHECK10-NEXT: [[CMP12:%.*]] = icmp slt i32 0, [[TMP8]]
1966 // CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1967 // CHECK10: omp.precond.then:
1968 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1969 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1970 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
1971 // CHECK10-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1972 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1973 // CHECK10-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_LB]], align 8
1974 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1975 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1976 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1977 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1978 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1979 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1980 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1981 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1982 // CHECK10-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1983 // CHECK10-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1984 // CHECK10: cond.true:
1985 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_6]], align 8
1986 // CHECK10-NEXT: br label [[COND_END:%.*]]
1987 // CHECK10: cond.false:
1988 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1989 // CHECK10-NEXT: br label [[COND_END]]
1990 // CHECK10: cond.end:
1991 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1992 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1993 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1994 // CHECK10-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1995 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1996 // CHECK10: omp.inner.for.cond:
1997 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1998 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1999 // CHECK10-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
2000 // CHECK10-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2001 // CHECK10: omp.inner.for.body:
2002 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2003 // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
2004 // CHECK10-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
2005 // CHECK10-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
2006 // CHECK10-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
2007 // CHECK10-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
2008 // CHECK10-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
2009 // CHECK10-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
2010 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
2011 // CHECK10-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
2012 // CHECK10-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
2013 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2014 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2015 // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
2016 // CHECK10-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
2017 // CHECK10-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
2018 // CHECK10-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
2019 // CHECK10-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
2020 // CHECK10-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
2021 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4
2022 // CHECK10-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
2023 // CHECK10-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
2024 // CHECK10-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
2025 // CHECK10-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
2026 // CHECK10-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
2027 // CHECK10-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
2028 // CHECK10-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
2029 // CHECK10-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
2030 // CHECK10-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
2031 // CHECK10-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
2032 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4
2033 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64
2034 // CHECK10-NEXT: [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]]
2035 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP28]]
2036 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4
2037 // CHECK10-NEXT: [[IDXPROM38:%.*]] = sext i32 [[TMP29]] to i64
2038 // CHECK10-NEXT: [[ARRAYIDX39:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM38]]
2039 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX39]], align 4
2040 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2041 // CHECK10: omp.body.continue:
2042 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2043 // CHECK10: omp.inner.for.inc:
2044 // CHECK10-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2045 // CHECK10-NEXT: [[ADD40:%.*]] = add nsw i64 [[TMP30]], 1
2046 // CHECK10-NEXT: store i64 [[ADD40]], i64* [[DOTOMP_IV]], align 8
2047 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2048 // CHECK10: omp.inner.for.end:
2049 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2050 // CHECK10: omp.loop.exit:
2051 // CHECK10-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2052 // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
2053 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
2054 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
2055 // CHECK10: omp.precond.end:
2056 // CHECK10-NEXT: ret void
2057 //
2058 //
2059 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2060 // CHECK10-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2061 // CHECK10-NEXT: entry:
2062 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2063 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2064 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2065 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2066 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2067 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2068 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2069 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2070 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2071 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
2072 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
2073 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2074 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
2075 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
2076 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2077 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8
2078 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2079 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2080 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
2081 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2082 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2083 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2084 // CHECK10: omp_offload.failed:
2085 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
2086 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2087 // CHECK10: omp_offload.cont:
2088 // CHECK10-NEXT: ret i32 0
2089 //
2090 //
2091 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
2092 // CHECK10-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2093 // CHECK10-NEXT: entry:
2094 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
2095 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
2096 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
2097 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
2098 // CHECK10-NEXT: ret void
2099 //
2100 //
2101 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
2102 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2103 // CHECK10-NEXT: entry:
2104 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2105 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2106 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
2107 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2108 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2109 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2110 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2111 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2112 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2113 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2114 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2115 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
2116 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2117 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2118 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
2119 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
2120 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2121 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
2122 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2123 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2124 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2125 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2126 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2127 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2128 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
2129 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2130 // CHECK10: cond.true:
2131 // CHECK10-NEXT: br label [[COND_END:%.*]]
2132 // CHECK10: cond.false:
2133 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2134 // CHECK10-NEXT: br label [[COND_END]]
2135 // CHECK10: cond.end:
2136 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2137 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2138 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2139 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2140 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2141 // CHECK10: omp.inner.for.cond:
2142 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2143 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2144 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2145 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2146 // CHECK10: omp.inner.for.body:
2147 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2148 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2149 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2150 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2151 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]])
2152 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2153 // CHECK10: omp.inner.for.inc:
2154 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2155 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2156 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2157 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2158 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2159 // CHECK10: omp.inner.for.end:
2160 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2161 // CHECK10: omp.loop.exit:
2162 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2163 // CHECK10-NEXT: ret void
2164 //
2165 //
2166 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2167 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2168 // CHECK10-NEXT: entry:
2169 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2170 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2171 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2172 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2173 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
2174 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2175 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2176 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2177 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2178 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2179 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2180 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2181 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2182 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
2183 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2184 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2185 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2186 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2187 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
2188 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
2189 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2190 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2191 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2192 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2193 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2194 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
2195 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2196 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2197 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2198 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2199 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2200 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2201 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2202 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2203 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
2204 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2205 // CHECK10: cond.true:
2206 // CHECK10-NEXT: br label [[COND_END:%.*]]
2207 // CHECK10: cond.false:
2208 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2209 // CHECK10-NEXT: br label [[COND_END]]
2210 // CHECK10: cond.end:
2211 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2212 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2213 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2214 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2215 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2216 // CHECK10: omp.inner.for.cond:
2217 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2218 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2219 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2220 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2221 // CHECK10: omp.inner.for.body:
2222 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2223 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
2224 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2225 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2226 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2227 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2228 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2229 // CHECK10-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
2230 // CHECK10-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
2231 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
2232 // CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
2233 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
2234 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
2235 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2236 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2237 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2238 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
2239 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
2240 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
2241 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
2242 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2243 // CHECK10: omp.body.continue:
2244 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2245 // CHECK10: omp.inner.for.inc:
2246 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2247 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
2248 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
2249 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]]
2250 // CHECK10: omp.inner.for.end:
2251 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2252 // CHECK10: omp.loop.exit:
2253 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2254 // CHECK10-NEXT: ret void
2255 //
2256 //
2257 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2258 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
2259 // CHECK10-NEXT: entry:
2260 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2261 // CHECK10-NEXT: ret void
2262 //
2263 //
2264 // CHECK11-LABEL: define {{[^@]+}}@main
2265 // CHECK11-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2266 // CHECK11-NEXT: entry:
2267 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2268 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2269 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
2270 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
2271 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
2272 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2273 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2274 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
2275 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2276 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
2277 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2278 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2279 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2280 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
2281 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2282 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2283 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2284 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2285 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2286 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2287 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2288 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2289 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
2290 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4
2291 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2292 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
2293 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2294 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
2295 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2296 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
2297 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2298 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
2299 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
2300 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
2301 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
2302 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
2303 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
2304 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
2305 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2306 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
2307 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
2308 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2309 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2310 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP12]], align 4
2311 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2312 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
2313 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP14]], align 4
2314 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2315 // CHECK11-NEXT: store i64 4, i64* [[TMP15]], align 4
2316 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2317 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
2318 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2319 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
2320 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
2321 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2322 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
2323 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
2324 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2325 // CHECK11-NEXT: store i64 4, i64* [[TMP21]], align 4
2326 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2327 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
2328 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2329 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
2330 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP24]], align 4
2331 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2332 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
2333 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP26]], align 4
2334 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2335 // CHECK11-NEXT: store i64 4, i64* [[TMP27]], align 4
2336 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2337 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
2338 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2339 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2340 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
2341 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2342 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2343 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP32]], align 4
2344 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
2345 // CHECK11-NEXT: store i64 4, i64* [[TMP33]], align 4
2346 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2347 // CHECK11-NEXT: store i8* null, i8** [[TMP34]], align 4
2348 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2349 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
2350 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 4
2351 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2352 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32**
2353 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP38]], align 4
2354 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
2355 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP39]], align 4
2356 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2357 // CHECK11-NEXT: store i8* null, i8** [[TMP40]], align 4
2358 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2359 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2360 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2361 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[N]], align 4
2362 // CHECK11-NEXT: store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_]], align 4
2363 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[M]], align 4
2364 // CHECK11-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2365 // CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2366 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP46]], 0
2367 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2368 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2369 // CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2370 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP47]], 0
2371 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2372 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
2373 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
2374 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
2375 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
2376 // CHECK11-NEXT: [[TMP48:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
2377 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP48]], 1
2378 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
2379 // CHECK11-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 5, i8** [[TMP41]], i8** [[TMP42]], i64* [[TMP43]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2380 // CHECK11-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
2381 // CHECK11-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2382 // CHECK11: omp_offload.failed:
2383 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2384 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2385 // CHECK11: omp_offload.cont:
2386 // CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2387 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP51]])
2388 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2389 // CHECK11-NEXT: [[TMP52:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2390 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP52]])
2391 // CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4
2392 // CHECK11-NEXT: ret i32 [[TMP53]]
2393 //
2394 //
2395 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
2396 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2397 // CHECK11-NEXT: entry:
2398 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2399 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
2400 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2401 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
2402 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2403 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2404 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
2405 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2406 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
2407 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2408 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
2409 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2410 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2411 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
2412 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2413 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
2414 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
2415 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
2416 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[M_ADDR]], align 4
2417 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[M_CASTED]], align 4
2418 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M_CASTED]], align 4
2419 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
2420 // CHECK11-NEXT: ret void
2421 //
2422 //
2423 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2424 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2425 // CHECK11-NEXT: entry:
2426 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2427 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2428 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2429 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
2430 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2431 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
2432 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2433 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2434 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2435 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2436 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2437 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2438 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
2439 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2440 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2441 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
2442 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
2443 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
2444 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2445 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
2446 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
2447 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2448 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
2449 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2450 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2451 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2452 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
2453 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2454 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
2455 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2456 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2457 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
2458 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2459 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
2460 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2461 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
2462 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
2463 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2464 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
2465 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2466 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2467 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2468 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
2469 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2470 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
2471 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
2472 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
2473 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
2474 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2475 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
2476 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2477 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
2478 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2479 // CHECK11: land.lhs.true:
2480 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2481 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
2482 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2483 // CHECK11: omp.precond.then:
2484 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
2485 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2486 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
2487 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
2488 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2489 // CHECK11-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2490 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
2491 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
2492 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2493 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2494 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
2495 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2496 // CHECK11: cond.true:
2497 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2498 // CHECK11-NEXT: br label [[COND_END:%.*]]
2499 // CHECK11: cond.false:
2500 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2501 // CHECK11-NEXT: br label [[COND_END]]
2502 // CHECK11: cond.end:
2503 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
2504 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
2505 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
2506 // CHECK11-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
2507 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2508 // CHECK11: omp.inner.for.cond:
2509 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2510 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2511 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
2512 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2513 // CHECK11: omp.inner.for.body:
2514 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
2515 // CHECK11-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
2516 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2517 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
2518 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[N_ADDR]], align 4
2519 // CHECK11-NEXT: store i32 [[TMP23]], i32* [[N_CASTED]], align 4
2520 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[N_CASTED]], align 4
2521 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[M_ADDR]], align 4
2522 // CHECK11-NEXT: store i32 [[TMP25]], i32* [[M_CASTED]], align 4
2523 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[M_CASTED]], align 4
2524 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP20]], i32 [[TMP22]], i32 [[TMP24]], i32 [[TMP26]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
2525 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2526 // CHECK11: omp.inner.for.inc:
2527 // CHECK11-NEXT: [[TMP27:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2528 // CHECK11-NEXT: [[TMP28:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
2529 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP27]], [[TMP28]]
2530 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
2531 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2532 // CHECK11: omp.inner.for.end:
2533 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2534 // CHECK11: omp.loop.exit:
2535 // CHECK11-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2536 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
2537 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
2538 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2539 // CHECK11: omp.precond.end:
2540 // CHECK11-NEXT: ret void
2541 //
2542 //
2543 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2544 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2545 // CHECK11-NEXT: entry:
2546 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2547 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2548 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2549 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2550 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2551 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
2552 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2553 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
2554 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2555 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2556 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2557 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2558 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2559 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2560 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
2561 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2562 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2563 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2564 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2565 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
2566 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2567 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4
2568 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4
2569 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2570 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2571 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2572 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2573 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2574 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
2575 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2576 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
2577 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2578 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2579 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
2580 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2581 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
2582 // CHECK11-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
2583 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
2584 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
2585 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2586 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
2587 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2588 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2589 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2590 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
2591 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2592 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
2593 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
2594 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
2595 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
2596 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2597 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
2598 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2599 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
2600 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2601 // CHECK11: land.lhs.true:
2602 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2603 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
2604 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2605 // CHECK11: omp.precond.then:
2606 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
2607 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2608 // CHECK11-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
2609 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2610 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP10]] to i64
2611 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2612 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP11]] to i64
2613 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
2614 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
2615 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
2616 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2617 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2618 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2619 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
2620 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
2621 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2622 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
2623 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2624 // CHECK11: cond.true:
2625 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2626 // CHECK11-NEXT: br label [[COND_END:%.*]]
2627 // CHECK11: cond.false:
2628 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
2629 // CHECK11-NEXT: br label [[COND_END]]
2630 // CHECK11: cond.end:
2631 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2632 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
2633 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
2634 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
2635 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2636 // CHECK11: omp.inner.for.cond:
2637 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2638 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
2639 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
2640 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2641 // CHECK11: omp.inner.for.body:
2642 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2643 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2644 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
2645 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
2646 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
2647 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
2648 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
2649 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
2650 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
2651 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
2652 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
2653 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2654 // CHECK11-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2655 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2656 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
2657 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
2658 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
2659 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
2660 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
2661 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2662 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
2663 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
2664 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
2665 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
2666 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
2667 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
2668 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
2669 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
2670 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
2671 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
2672 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4
2673 // CHECK11-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP1]]
2674 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP28]]
2675 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4
2676 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP29]]
2677 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4
2678 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2679 // CHECK11: omp.body.continue:
2680 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2681 // CHECK11: omp.inner.for.inc:
2682 // CHECK11-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2683 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP30]], 1
2684 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8
2685 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2686 // CHECK11: omp.inner.for.end:
2687 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2688 // CHECK11: omp.loop.exit:
2689 // CHECK11-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2690 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
2691 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
2692 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2693 // CHECK11: omp.precond.end:
2694 // CHECK11-NEXT: ret void
2695 //
2696 //
2697 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2698 // CHECK11-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2699 // CHECK11-NEXT: entry:
2700 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2701 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2702 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2703 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2704 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2705 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2706 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2707 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2708 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2709 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
2710 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
2711 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2712 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
2713 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
2714 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2715 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
2716 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2717 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2718 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
2719 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2720 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2721 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2722 // CHECK11: omp_offload.failed:
2723 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
2724 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2725 // CHECK11: omp_offload.cont:
2726 // CHECK11-NEXT: ret i32 0
2727 //
2728 //
2729 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
2730 // CHECK11-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2731 // CHECK11-NEXT: entry:
2732 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2733 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2734 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2735 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
2736 // CHECK11-NEXT: ret void
2737 //
2738 //
2739 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
2740 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2741 // CHECK11-NEXT: entry:
2742 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2743 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2744 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2745 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2746 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2747 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2748 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2749 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2750 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2751 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2752 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2753 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2754 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2755 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2756 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2757 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2758 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2759 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
2760 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2761 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2762 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2763 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2764 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2765 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2766 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
2767 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2768 // CHECK11: cond.true:
2769 // CHECK11-NEXT: br label [[COND_END:%.*]]
2770 // CHECK11: cond.false:
2771 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2772 // CHECK11-NEXT: br label [[COND_END]]
2773 // CHECK11: cond.end:
2774 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2775 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2776 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2777 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2778 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2779 // CHECK11: omp.inner.for.cond:
2780 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2781 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2782 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2783 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2784 // CHECK11: omp.inner.for.body:
2785 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2786 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2787 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]])
2788 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2789 // CHECK11: omp.inner.for.inc:
2790 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2791 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2792 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2793 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2794 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2795 // CHECK11: omp.inner.for.end:
2796 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2797 // CHECK11: omp.loop.exit:
2798 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2799 // CHECK11-NEXT: ret void
2800 //
2801 //
2802 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2803 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2804 // CHECK11-NEXT: entry:
2805 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2806 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2807 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2808 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2809 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2810 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2811 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2812 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2813 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2814 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2815 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2816 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2817 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2818 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2819 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2820 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2821 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2822 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2823 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2824 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2825 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2826 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2827 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2828 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2829 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2830 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2831 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2832 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2833 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2834 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2835 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2836 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2837 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
2838 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2839 // CHECK11: cond.true:
2840 // CHECK11-NEXT: br label [[COND_END:%.*]]
2841 // CHECK11: cond.false:
2842 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2843 // CHECK11-NEXT: br label [[COND_END]]
2844 // CHECK11: cond.end:
2845 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2846 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2847 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2848 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2849 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2850 // CHECK11: omp.inner.for.cond:
2851 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2852 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2853 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2854 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2855 // CHECK11: omp.inner.for.body:
2856 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2857 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
2858 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2859 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2860 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2861 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2862 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2863 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
2864 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
2865 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
2866 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
2867 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
2868 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
2869 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2870 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
2871 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
2872 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
2873 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
2874 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2875 // CHECK11: omp.body.continue:
2876 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2877 // CHECK11: omp.inner.for.inc:
2878 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2879 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
2880 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
2881 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2882 // CHECK11: omp.inner.for.end:
2883 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2884 // CHECK11: omp.loop.exit:
2885 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2886 // CHECK11-NEXT: ret void
2887 //
2888 //
2889 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2890 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
2891 // CHECK11-NEXT: entry:
2892 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2893 // CHECK11-NEXT: ret void
2894 //
2895 //
2896 // CHECK12-LABEL: define {{[^@]+}}@main
2897 // CHECK12-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2898 // CHECK12-NEXT: entry:
2899 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2900 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2901 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
2902 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4
2903 // CHECK12-NEXT: [[M:%.*]] = alloca i32, align 4
2904 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2905 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2906 // CHECK12-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
2907 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2908 // CHECK12-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
2909 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2910 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2911 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2912 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
2913 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
2914 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2915 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2916 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2917 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2918 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
2919 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2920 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2921 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4
2922 // CHECK12-NEXT: store i32 2, i32* [[M]], align 4
2923 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2924 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
2925 // CHECK12-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2926 // CHECK12-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
2927 // CHECK12-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2928 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
2929 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2930 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
2931 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
2932 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
2933 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
2934 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
2935 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
2936 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
2937 // CHECK12-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2938 // CHECK12-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
2939 // CHECK12-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
2940 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2941 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2942 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP12]], align 4
2943 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2944 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
2945 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP14]], align 4
2946 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2947 // CHECK12-NEXT: store i64 4, i64* [[TMP15]], align 4
2948 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2949 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4
2950 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2951 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
2952 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
2953 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2954 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
2955 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
2956 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2957 // CHECK12-NEXT: store i64 4, i64* [[TMP21]], align 4
2958 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2959 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4
2960 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2961 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
2962 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP24]], align 4
2963 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2964 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
2965 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP26]], align 4
2966 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2967 // CHECK12-NEXT: store i64 4, i64* [[TMP27]], align 4
2968 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2969 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4
2970 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2971 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2972 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
2973 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2974 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2975 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP32]], align 4
2976 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
2977 // CHECK12-NEXT: store i64 4, i64* [[TMP33]], align 4
2978 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2979 // CHECK12-NEXT: store i8* null, i8** [[TMP34]], align 4
2980 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2981 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
2982 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 4
2983 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2984 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32**
2985 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP38]], align 4
2986 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
2987 // CHECK12-NEXT: store i64 [[TMP10]], i64* [[TMP39]], align 4
2988 // CHECK12-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2989 // CHECK12-NEXT: store i8* null, i8** [[TMP40]], align 4
2990 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2991 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2992 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2993 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[N]], align 4
2994 // CHECK12-NEXT: store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_]], align 4
2995 // CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[M]], align 4
2996 // CHECK12-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2997 // CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2998 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP46]], 0
2999 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3000 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3001 // CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3002 // CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP47]], 0
3003 // CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
3004 // CHECK12-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
3005 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
3006 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
3007 // CHECK12-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
3008 // CHECK12-NEXT: [[TMP48:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
3009 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP48]], 1
3010 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
3011 // CHECK12-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, i32 5, i8** [[TMP41]], i8** [[TMP42]], i64* [[TMP43]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3012 // CHECK12-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
3013 // CHECK12-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3014 // CHECK12: omp_offload.failed:
3015 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
3016 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3017 // CHECK12: omp_offload.cont:
3018 // CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3019 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP51]])
3020 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3021 // CHECK12-NEXT: [[TMP52:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3022 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP52]])
3023 // CHECK12-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4
3024 // CHECK12-NEXT: ret i32 [[TMP53]]
3025 //
3026 //
3027 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
3028 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
3029 // CHECK12-NEXT: entry:
3030 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3031 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
3032 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3033 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
3034 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3035 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3036 // CHECK12-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
3037 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3038 // CHECK12-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
3039 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3040 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
3041 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3042 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3043 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3044 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3045 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
3046 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[N_CASTED]], align 4
3047 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N_CASTED]], align 4
3048 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[M_ADDR]], align 4
3049 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[M_CASTED]], align 4
3050 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[M_CASTED]], align 4
3051 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
3052 // CHECK12-NEXT: ret void
3053 //
3054 //
3055 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3056 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3057 // CHECK12-NEXT: entry:
3058 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3059 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3060 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3061 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
3062 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3063 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
3064 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3065 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
3066 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3067 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
3068 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3069 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
3070 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
3071 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3072 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3073 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
3074 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
3075 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
3076 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3077 // CHECK12-NEXT: [[I11:%.*]] = alloca i32, align 4
3078 // CHECK12-NEXT: [[J12:%.*]] = alloca i32, align 4
3079 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3080 // CHECK12-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
3081 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3082 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3083 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3084 // CHECK12-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
3085 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3086 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
3087 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3088 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3089 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3090 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3091 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
3092 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3093 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
3094 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3095 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3096 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
3097 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3098 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3099 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3100 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
3101 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3102 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
3103 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
3104 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
3105 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
3106 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
3107 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4
3108 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3109 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
3110 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3111 // CHECK12: land.lhs.true:
3112 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3113 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
3114 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3115 // CHECK12: omp.precond.then:
3116 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
3117 // CHECK12-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3118 // CHECK12-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_COMB_UB]], align 8
3119 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
3120 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3121 // CHECK12-NEXT: [[TMP10:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3122 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP10]], align 4
3123 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
3124 // CHECK12-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3125 // CHECK12-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3126 // CHECK12-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
3127 // CHECK12-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3128 // CHECK12: cond.true:
3129 // CHECK12-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3130 // CHECK12-NEXT: br label [[COND_END:%.*]]
3131 // CHECK12: cond.false:
3132 // CHECK12-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3133 // CHECK12-NEXT: br label [[COND_END]]
3134 // CHECK12: cond.end:
3135 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
3136 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
3137 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
3138 // CHECK12-NEXT: store i64 [[TMP16]], i64* [[DOTOMP_IV]], align 8
3139 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3140 // CHECK12: omp.inner.for.cond:
3141 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3142 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3143 // CHECK12-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
3144 // CHECK12-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3145 // CHECK12: omp.inner.for.body:
3146 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
3147 // CHECK12-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP19]] to i32
3148 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3149 // CHECK12-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
3150 // CHECK12-NEXT: [[TMP23:%.*]] = load i32, i32* [[N_ADDR]], align 4
3151 // CHECK12-NEXT: store i32 [[TMP23]], i32* [[N_CASTED]], align 4
3152 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[N_CASTED]], align 4
3153 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[M_ADDR]], align 4
3154 // CHECK12-NEXT: store i32 [[TMP25]], i32* [[M_CASTED]], align 4
3155 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[M_CASTED]], align 4
3156 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32, i32, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP20]], i32 [[TMP22]], i32 [[TMP24]], i32 [[TMP26]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
3157 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3158 // CHECK12: omp.inner.for.inc:
3159 // CHECK12-NEXT: [[TMP27:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3160 // CHECK12-NEXT: [[TMP28:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
3161 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP27]], [[TMP28]]
3162 // CHECK12-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
3163 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3164 // CHECK12: omp.inner.for.end:
3165 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3166 // CHECK12: omp.loop.exit:
3167 // CHECK12-NEXT: [[TMP29:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3168 // CHECK12-NEXT: [[TMP30:%.*]] = load i32, i32* [[TMP29]], align 4
3169 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP30]])
3170 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
3171 // CHECK12: omp.precond.end:
3172 // CHECK12-NEXT: ret void
3173 //
3174 //
3175 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3176 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3177 // CHECK12-NEXT: entry:
3178 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3179 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3180 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3181 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3182 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3183 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
3184 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3185 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
3186 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3187 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
3188 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3189 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
3190 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3191 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
3192 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
3193 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3194 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3195 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
3196 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
3197 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
3198 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3199 // CHECK12-NEXT: [[I13:%.*]] = alloca i32, align 4
3200 // CHECK12-NEXT: [[J14:%.*]] = alloca i32, align 4
3201 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3202 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3203 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3204 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3205 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3206 // CHECK12-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
3207 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3208 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
3209 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3210 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3211 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3212 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3213 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_ADDR]], align 4
3214 // CHECK12-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
3215 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[M_ADDR]], align 4
3216 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3217 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3218 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
3219 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3220 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3221 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3222 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
3223 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3224 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
3225 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
3226 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
3227 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
3228 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
3229 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4
3230 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3231 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
3232 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3233 // CHECK12: land.lhs.true:
3234 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3235 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
3236 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3237 // CHECK12: omp.precond.then:
3238 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
3239 // CHECK12-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3240 // CHECK12-NEXT: store i64 [[TMP9]], i64* [[DOTOMP_UB]], align 8
3241 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3242 // CHECK12-NEXT: [[CONV11:%.*]] = zext i32 [[TMP10]] to i64
3243 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3244 // CHECK12-NEXT: [[CONV12:%.*]] = zext i32 [[TMP11]] to i64
3245 // CHECK12-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
3246 // CHECK12-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
3247 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
3248 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3249 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3250 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
3251 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
3252 // CHECK12-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3253 // CHECK12-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3254 // CHECK12-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
3255 // CHECK12-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3256 // CHECK12: cond.true:
3257 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3258 // CHECK12-NEXT: br label [[COND_END:%.*]]
3259 // CHECK12: cond.false:
3260 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3261 // CHECK12-NEXT: br label [[COND_END]]
3262 // CHECK12: cond.end:
3263 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
3264 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
3265 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
3266 // CHECK12-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
3267 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3268 // CHECK12: omp.inner.for.cond:
3269 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3270 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3271 // CHECK12-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
3272 // CHECK12-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3273 // CHECK12: omp.inner.for.body:
3274 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3275 // CHECK12-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3276 // CHECK12-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP22]], 0
3277 // CHECK12-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
3278 // CHECK12-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
3279 // CHECK12-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
3280 // CHECK12-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP21]], [[CONV20]]
3281 // CHECK12-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
3282 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
3283 // CHECK12-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
3284 // CHECK12-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
3285 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3286 // CHECK12-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3287 // CHECK12-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3288 // CHECK12-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP25]], 0
3289 // CHECK12-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
3290 // CHECK12-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
3291 // CHECK12-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
3292 // CHECK12-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP24]], [[CONV27]]
3293 // CHECK12-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3294 // CHECK12-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP26]], 0
3295 // CHECK12-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
3296 // CHECK12-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
3297 // CHECK12-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
3298 // CHECK12-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
3299 // CHECK12-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP23]], [[MUL33]]
3300 // CHECK12-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
3301 // CHECK12-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
3302 // CHECK12-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
3303 // CHECK12-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
3304 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[I13]], align 4
3305 // CHECK12-NEXT: [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP1]]
3306 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP28]]
3307 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[J14]], align 4
3308 // CHECK12-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP29]]
3309 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4
3310 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3311 // CHECK12: omp.body.continue:
3312 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3313 // CHECK12: omp.inner.for.inc:
3314 // CHECK12-NEXT: [[TMP30:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3315 // CHECK12-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP30]], 1
3316 // CHECK12-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8
3317 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3318 // CHECK12: omp.inner.for.end:
3319 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3320 // CHECK12: omp.loop.exit:
3321 // CHECK12-NEXT: [[TMP31:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3322 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[TMP31]], align 4
3323 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP32]])
3324 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
3325 // CHECK12: omp.precond.end:
3326 // CHECK12-NEXT: ret void
3327 //
3328 //
3329 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
3330 // CHECK12-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
3331 // CHECK12-NEXT: entry:
3332 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3333 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
3334 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3335 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3336 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3337 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3338 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3339 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3340 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3341 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
3342 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
3343 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3344 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
3345 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
3346 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3347 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4
3348 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3349 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3350 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
3351 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3352 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3353 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3354 // CHECK12: omp_offload.failed:
3355 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
3356 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3357 // CHECK12: omp_offload.cont:
3358 // CHECK12-NEXT: ret i32 0
3359 //
3360 //
3361 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
3362 // CHECK12-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3363 // CHECK12-NEXT: entry:
3364 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3365 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3366 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3367 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
3368 // CHECK12-NEXT: ret void
3369 //
3370 //
3371 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
3372 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3373 // CHECK12-NEXT: entry:
3374 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3375 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3376 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3377 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3378 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3379 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3380 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3381 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3382 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3383 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3384 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3385 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3386 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3387 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3388 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3389 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3390 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3391 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
3392 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3393 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3394 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3395 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3396 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3397 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3398 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
3399 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3400 // CHECK12: cond.true:
3401 // CHECK12-NEXT: br label [[COND_END:%.*]]
3402 // CHECK12: cond.false:
3403 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3404 // CHECK12-NEXT: br label [[COND_END]]
3405 // CHECK12: cond.end:
3406 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3407 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3408 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3409 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3410 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3411 // CHECK12: omp.inner.for.cond:
3412 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3413 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3414 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3415 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3416 // CHECK12: omp.inner.for.body:
3417 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3418 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3419 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]])
3420 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3421 // CHECK12: omp.inner.for.inc:
3422 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3423 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3424 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3425 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3426 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3427 // CHECK12: omp.inner.for.end:
3428 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3429 // CHECK12: omp.loop.exit:
3430 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3431 // CHECK12-NEXT: ret void
3432 //
3433 //
3434 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
3435 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3436 // CHECK12-NEXT: entry:
3437 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3438 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3439 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3440 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3441 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3442 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3443 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3444 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3445 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3446 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3447 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3448 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3449 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3450 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3451 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3452 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3453 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3454 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3455 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3456 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3457 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3458 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
3459 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3460 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3461 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3462 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3463 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3464 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3465 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3466 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3467 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3468 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3469 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
3470 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3471 // CHECK12: cond.true:
3472 // CHECK12-NEXT: br label [[COND_END:%.*]]
3473 // CHECK12: cond.false:
3474 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3475 // CHECK12-NEXT: br label [[COND_END]]
3476 // CHECK12: cond.end:
3477 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3478 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3479 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3480 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3481 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3482 // CHECK12: omp.inner.for.cond:
3483 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3484 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3485 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3486 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3487 // CHECK12: omp.inner.for.body:
3488 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3489 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
3490 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
3491 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3492 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3493 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3494 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3495 // CHECK12-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
3496 // CHECK12-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
3497 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
3498 // CHECK12-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
3499 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
3500 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
3501 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
3502 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
3503 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
3504 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
3505 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
3506 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3507 // CHECK12: omp.body.continue:
3508 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3509 // CHECK12: omp.inner.for.inc:
3510 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3511 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
3512 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
3513 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]]
3514 // CHECK12: omp.inner.for.end:
3515 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3516 // CHECK12: omp.loop.exit:
3517 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3518 // CHECK12-NEXT: ret void
3519 //
3520 //
3521 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3522 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] {
3523 // CHECK12-NEXT: entry:
3524 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
3525 // CHECK12-NEXT: ret void
3526 //
3527 //