1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X][Y];
25
fooSS26 int foo(void) {
27
28 #pragma omp target
29 #pragma omp teams distribute parallel for simd collapse(2)
30 for(int i = 0; i < X; i++) {
31 for(int j = 0; j < Y; j++) {
32 a[i][j] = (T)0;
33 }
34 }
35
36 // discard loop variables not needed here
37
38
39 return a[0][0];
40 }
41 };
42
teams_template_struct(void)43 int teams_template_struct(void) {
44 SS<int, 123, 456> V;
45 return V.foo();
46
47 }
48
49 // CK4: !{!"llvm.loop.vectorize.enable", i1 true}
50
51 #endif // CK1
52
53 // Test host codegen.
54 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
56 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
57 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
58 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
60
61 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
64 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
65 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
67 #ifdef CK2
68
69 template <typename T, int n, int m>
tmain(T argc)70 int tmain(T argc) {
71 T a[n][m];
72 #pragma omp target
73 #pragma omp teams distribute parallel for simd collapse(2)
74 for(int i = 0; i < n; i++) {
75 for(int j = 0; j < m; j++) {
76 a[i][j] = (T)0;
77 }
78 }
79 return 0;
80 }
81
main(int argc,char ** argv)82 int main (int argc, char **argv) {
83 int n = 100;
84 int m = 2;
85 int a[n][m];
86 #pragma omp target
87 #pragma omp teams distribute parallel for simd collapse(2)
88 for(int i = 0; i < n; i++) {
89 for(int j = 0; j < m; j++) {
90 a[i][j] = 0;
91 }
92 }
93 return tmain<int, 10, 2>(argc);
94 }
95
96
97
98
99
100
101
102
103 // discard loop variables not needed here
104
105
106 // CK4: !{!"llvm.loop.vectorize.enable", i1 true}
107
108 #endif // CK2
109 #endif // #ifndef HEADER
110 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
111 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
112 // CHECK1-NEXT: entry:
113 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
114 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
115 // CHECK1-NEXT: ret i32 [[CALL]]
116 //
117 //
118 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
119 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
120 // CHECK1-NEXT: entry:
121 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
122 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
123 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
124 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
125 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
126 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
127 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
128 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
129 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
130 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
132 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
133 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
134 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
135 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
136 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
137 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
138 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
139 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
140 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
141 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
142 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
143 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
144 // CHECK1: omp_offload.failed:
145 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
146 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
147 // CHECK1: omp_offload.cont:
148 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
149 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
150 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
151 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
152 // CHECK1-NEXT: ret i32 [[TMP9]]
153 //
154 //
155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
156 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
157 // CHECK1-NEXT: entry:
158 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
159 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
160 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
161 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
162 // CHECK1-NEXT: ret void
163 //
164 //
165 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
166 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
167 // CHECK1-NEXT: entry:
168 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
169 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
170 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
171 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
172 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
173 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
174 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
175 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
176 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
177 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
178 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
179 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
180 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
181 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
182 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
183 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
184 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
185 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
186 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
187 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
188 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
189 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
190 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
191 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
192 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
193 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
194 // CHECK1: cond.true:
195 // CHECK1-NEXT: br label [[COND_END:%.*]]
196 // CHECK1: cond.false:
197 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
198 // CHECK1-NEXT: br label [[COND_END]]
199 // CHECK1: cond.end:
200 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
201 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
203 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
204 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
205 // CHECK1: omp.inner.for.cond:
206 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
208 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
209 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
210 // CHECK1: omp.inner.for.body:
211 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
212 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
213 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
214 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
215 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
217 // CHECK1: omp.inner.for.inc:
218 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
219 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
220 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
221 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
223 // CHECK1: omp.inner.for.end:
224 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
225 // CHECK1: omp.loop.exit:
226 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
227 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
228 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
229 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
230 // CHECK1: .omp.final.then:
231 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
232 // CHECK1-NEXT: store i32 456, i32* [[J]], align 4
233 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
234 // CHECK1: .omp.final.done:
235 // CHECK1-NEXT: ret void
236 //
237 //
238 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
239 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
240 // CHECK1-NEXT: entry:
241 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
242 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
243 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
244 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
245 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
246 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
247 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
248 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
249 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
250 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
251 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
252 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
253 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
254 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
256 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
257 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
258 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
259 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
260 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
261 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
262 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
263 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
264 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
265 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
266 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
267 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
268 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
269 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
270 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
271 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
272 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
273 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
274 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
275 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
276 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
277 // CHECK1: cond.true:
278 // CHECK1-NEXT: br label [[COND_END:%.*]]
279 // CHECK1: cond.false:
280 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
281 // CHECK1-NEXT: br label [[COND_END]]
282 // CHECK1: cond.end:
283 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
284 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
285 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
286 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
287 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
288 // CHECK1: omp.inner.for.cond:
289 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
290 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
291 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
292 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
293 // CHECK1: omp.inner.for.body:
294 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
295 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
296 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
297 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
298 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
299 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
300 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
301 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
302 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
303 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
304 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
305 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
306 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
307 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
308 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
309 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
310 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
311 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
312 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
313 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
314 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
315 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
316 // CHECK1: omp.body.continue:
317 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
318 // CHECK1: omp.inner.for.inc:
319 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
320 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
321 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
322 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
323 // CHECK1: omp.inner.for.end:
324 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
325 // CHECK1: omp.loop.exit:
326 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
327 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
328 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
329 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
330 // CHECK1: .omp.final.then:
331 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
332 // CHECK1-NEXT: store i32 456, i32* [[J]], align 4
333 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
334 // CHECK1: .omp.final.done:
335 // CHECK1-NEXT: ret void
336 //
337 //
338 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
339 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
340 // CHECK1-NEXT: entry:
341 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
342 // CHECK1-NEXT: ret void
343 //
344 //
345 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
346 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
347 // CHECK2-NEXT: entry:
348 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
349 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
350 // CHECK2-NEXT: ret i32 [[CALL]]
351 //
352 //
353 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
354 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
355 // CHECK2-NEXT: entry:
356 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
357 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
358 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
359 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
360 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
361 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
362 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
363 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
364 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
365 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
366 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
367 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
368 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
369 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
370 // CHECK2-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
371 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
372 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8
373 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
374 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
375 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
376 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
377 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
378 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
379 // CHECK2: omp_offload.failed:
380 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
381 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]]
382 // CHECK2: omp_offload.cont:
383 // CHECK2-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
384 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
385 // CHECK2-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
386 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
387 // CHECK2-NEXT: ret i32 [[TMP9]]
388 //
389 //
390 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
391 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
392 // CHECK2-NEXT: entry:
393 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
394 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
395 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
396 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
397 // CHECK2-NEXT: ret void
398 //
399 //
400 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
401 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
402 // CHECK2-NEXT: entry:
403 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
404 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
405 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
406 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
407 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
408 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
409 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
410 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
411 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
412 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
413 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
414 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
415 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
416 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
417 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
418 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
419 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
420 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
421 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
422 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
423 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
424 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
425 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
426 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
427 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
428 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
429 // CHECK2: cond.true:
430 // CHECK2-NEXT: br label [[COND_END:%.*]]
431 // CHECK2: cond.false:
432 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
433 // CHECK2-NEXT: br label [[COND_END]]
434 // CHECK2: cond.end:
435 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
436 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
437 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
438 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
439 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
440 // CHECK2: omp.inner.for.cond:
441 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
442 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
443 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
444 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
445 // CHECK2: omp.inner.for.body:
446 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
447 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
448 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
449 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
450 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
451 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
452 // CHECK2: omp.inner.for.inc:
453 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
454 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
455 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
456 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
457 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
458 // CHECK2: omp.inner.for.end:
459 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
460 // CHECK2: omp.loop.exit:
461 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
462 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
463 // CHECK2-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
464 // CHECK2-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
465 // CHECK2: .omp.final.then:
466 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
467 // CHECK2-NEXT: store i32 456, i32* [[J]], align 4
468 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
469 // CHECK2: .omp.final.done:
470 // CHECK2-NEXT: ret void
471 //
472 //
473 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
474 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
475 // CHECK2-NEXT: entry:
476 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
477 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
478 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
479 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
480 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
481 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
482 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4
483 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
484 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
485 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
486 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
487 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
488 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4
489 // CHECK2-NEXT: [[J:%.*]] = alloca i32, align 4
490 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
491 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
492 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
493 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
494 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
495 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
496 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
497 // CHECK2-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
498 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
499 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
500 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
501 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
502 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
503 // CHECK2-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
504 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
505 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
506 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
507 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
508 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
509 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
510 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
511 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
512 // CHECK2: cond.true:
513 // CHECK2-NEXT: br label [[COND_END:%.*]]
514 // CHECK2: cond.false:
515 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
516 // CHECK2-NEXT: br label [[COND_END]]
517 // CHECK2: cond.end:
518 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
519 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
520 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
521 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
522 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
523 // CHECK2: omp.inner.for.cond:
524 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
525 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
526 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
527 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
528 // CHECK2: omp.inner.for.body:
529 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
530 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
531 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
532 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
533 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4
534 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
535 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
536 // CHECK2-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
537 // CHECK2-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
538 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
539 // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
540 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
541 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
542 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
543 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
544 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
545 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
546 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
547 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
548 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
549 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
550 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
551 // CHECK2: omp.body.continue:
552 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
553 // CHECK2: omp.inner.for.inc:
554 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
555 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
556 // CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
557 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
558 // CHECK2: omp.inner.for.end:
559 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
560 // CHECK2: omp.loop.exit:
561 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
562 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
563 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
564 // CHECK2-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
565 // CHECK2: .omp.final.then:
566 // CHECK2-NEXT: store i32 123, i32* [[I]], align 4
567 // CHECK2-NEXT: store i32 456, i32* [[J]], align 4
568 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]]
569 // CHECK2: .omp.final.done:
570 // CHECK2-NEXT: ret void
571 //
572 //
573 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
574 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
575 // CHECK2-NEXT: entry:
576 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1)
577 // CHECK2-NEXT: ret void
578 //
579 //
580 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
581 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
582 // CHECK3-NEXT: entry:
583 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
584 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
585 // CHECK3-NEXT: ret i32 [[CALL]]
586 //
587 //
588 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
589 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
590 // CHECK3-NEXT: entry:
591 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
592 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
593 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
594 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
595 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
596 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
597 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
598 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
599 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
600 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
601 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
602 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
603 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
604 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
605 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
606 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
607 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
608 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
609 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
610 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
611 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
612 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
613 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
614 // CHECK3: omp_offload.failed:
615 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
616 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
617 // CHECK3: omp_offload.cont:
618 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
619 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
620 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
621 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
622 // CHECK3-NEXT: ret i32 [[TMP9]]
623 //
624 //
625 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
626 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
627 // CHECK3-NEXT: entry:
628 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
629 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
630 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
631 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
632 // CHECK3-NEXT: ret void
633 //
634 //
635 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
636 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
637 // CHECK3-NEXT: entry:
638 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
639 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
640 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
641 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
642 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
643 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
644 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
645 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
646 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
647 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
648 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
649 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
650 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
651 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
652 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
653 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
654 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
655 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
656 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
657 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
658 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
659 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
660 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
661 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
662 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
663 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
664 // CHECK3: cond.true:
665 // CHECK3-NEXT: br label [[COND_END:%.*]]
666 // CHECK3: cond.false:
667 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
668 // CHECK3-NEXT: br label [[COND_END]]
669 // CHECK3: cond.end:
670 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
671 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
672 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
673 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
674 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
675 // CHECK3: omp.inner.for.cond:
676 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
677 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
678 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
679 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
680 // CHECK3: omp.inner.for.body:
681 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
682 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
683 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
684 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
685 // CHECK3: omp.inner.for.inc:
686 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
687 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
688 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
689 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
690 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
691 // CHECK3: omp.inner.for.end:
692 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
693 // CHECK3: omp.loop.exit:
694 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
695 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
696 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
697 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
698 // CHECK3: .omp.final.then:
699 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
700 // CHECK3-NEXT: store i32 456, i32* [[J]], align 4
701 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
702 // CHECK3: .omp.final.done:
703 // CHECK3-NEXT: ret void
704 //
705 //
706 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
707 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
708 // CHECK3-NEXT: entry:
709 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
710 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
711 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
712 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
713 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
714 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
715 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
716 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
717 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
718 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
719 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
720 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
721 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
722 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
723 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
724 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
725 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
726 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
727 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
728 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
729 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
730 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
731 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
732 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
733 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
734 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
735 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
736 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
737 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
738 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
739 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
740 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
741 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
742 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
743 // CHECK3: cond.true:
744 // CHECK3-NEXT: br label [[COND_END:%.*]]
745 // CHECK3: cond.false:
746 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
747 // CHECK3-NEXT: br label [[COND_END]]
748 // CHECK3: cond.end:
749 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
750 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
751 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
752 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
753 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
754 // CHECK3: omp.inner.for.cond:
755 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
756 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
757 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
758 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
759 // CHECK3: omp.inner.for.body:
760 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
761 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
762 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
763 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
764 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
765 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
766 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
767 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
768 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
769 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
770 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
771 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
772 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
773 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
774 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
775 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
776 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
777 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
778 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
779 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
780 // CHECK3: omp.body.continue:
781 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
782 // CHECK3: omp.inner.for.inc:
783 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
784 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
785 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
786 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
787 // CHECK3: omp.inner.for.end:
788 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
789 // CHECK3: omp.loop.exit:
790 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
791 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
792 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
793 // CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
794 // CHECK3: .omp.final.then:
795 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
796 // CHECK3-NEXT: store i32 456, i32* [[J]], align 4
797 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
798 // CHECK3: .omp.final.done:
799 // CHECK3-NEXT: ret void
800 //
801 //
802 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
803 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
804 // CHECK3-NEXT: entry:
805 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
806 // CHECK3-NEXT: ret void
807 //
808 //
809 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
810 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
811 // CHECK4-NEXT: entry:
812 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
813 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
814 // CHECK4-NEXT: ret i32 [[CALL]]
815 //
816 //
817 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
818 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
819 // CHECK4-NEXT: entry:
820 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
821 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
822 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
823 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
824 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
825 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
826 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
827 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
828 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
829 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
830 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
831 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
832 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
833 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
834 // CHECK4-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
835 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
836 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4
837 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
838 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
839 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 56088)
840 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
841 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
842 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
843 // CHECK4: omp_offload.failed:
844 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
845 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]]
846 // CHECK4: omp_offload.cont:
847 // CHECK4-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
848 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
849 // CHECK4-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
850 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
851 // CHECK4-NEXT: ret i32 [[TMP9]]
852 //
853 //
854 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
855 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
856 // CHECK4-NEXT: entry:
857 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
858 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
859 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
860 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
861 // CHECK4-NEXT: ret void
862 //
863 //
864 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
865 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
866 // CHECK4-NEXT: entry:
867 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
868 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
869 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
870 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
871 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
872 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
873 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
874 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
875 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
876 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
877 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
878 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
879 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
880 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
881 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
882 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
883 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
884 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
885 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
886 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
887 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
888 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
889 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
890 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
891 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
892 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
893 // CHECK4: cond.true:
894 // CHECK4-NEXT: br label [[COND_END:%.*]]
895 // CHECK4: cond.false:
896 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
897 // CHECK4-NEXT: br label [[COND_END]]
898 // CHECK4: cond.end:
899 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
900 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
901 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
902 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
903 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
904 // CHECK4: omp.inner.for.cond:
905 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
906 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
907 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
908 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
909 // CHECK4: omp.inner.for.body:
910 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
911 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
912 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
913 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
914 // CHECK4: omp.inner.for.inc:
915 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
916 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
917 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
918 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
919 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
920 // CHECK4: omp.inner.for.end:
921 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
922 // CHECK4: omp.loop.exit:
923 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
924 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
925 // CHECK4-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
926 // CHECK4-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
927 // CHECK4: .omp.final.then:
928 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
929 // CHECK4-NEXT: store i32 456, i32* [[J]], align 4
930 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
931 // CHECK4: .omp.final.done:
932 // CHECK4-NEXT: ret void
933 //
934 //
935 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
936 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
937 // CHECK4-NEXT: entry:
938 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
939 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
940 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
941 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
942 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
943 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
944 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4
945 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
946 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
947 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
948 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
949 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
950 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
951 // CHECK4-NEXT: [[J:%.*]] = alloca i32, align 4
952 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
953 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
954 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
955 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
956 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
957 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
958 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
959 // CHECK4-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
960 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
961 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
962 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
963 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
964 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
965 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
966 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
967 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
968 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
969 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
970 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
971 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
972 // CHECK4: cond.true:
973 // CHECK4-NEXT: br label [[COND_END:%.*]]
974 // CHECK4: cond.false:
975 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
976 // CHECK4-NEXT: br label [[COND_END]]
977 // CHECK4: cond.end:
978 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
979 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
980 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
981 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
982 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
983 // CHECK4: omp.inner.for.cond:
984 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
985 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
986 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
987 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
988 // CHECK4: omp.inner.for.body:
989 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
990 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
991 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
992 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
993 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4
994 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
995 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
996 // CHECK4-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
997 // CHECK4-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
998 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
999 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1000 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1001 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
1002 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1003 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1004 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
1005 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
1006 // CHECK4-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
1007 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
1008 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1009 // CHECK4: omp.body.continue:
1010 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1011 // CHECK4: omp.inner.for.inc:
1012 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1013 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
1014 // CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
1015 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1016 // CHECK4: omp.inner.for.end:
1017 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1018 // CHECK4: omp.loop.exit:
1019 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1020 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1021 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1022 // CHECK4-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1023 // CHECK4: .omp.final.then:
1024 // CHECK4-NEXT: store i32 123, i32* [[I]], align 4
1025 // CHECK4-NEXT: store i32 456, i32* [[J]], align 4
1026 // CHECK4-NEXT: br label [[DOTOMP_FINAL_DONE]]
1027 // CHECK4: .omp.final.done:
1028 // CHECK4-NEXT: ret void
1029 //
1030 //
1031 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1032 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
1033 // CHECK4-NEXT: entry:
1034 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1)
1035 // CHECK4-NEXT: ret void
1036 //
1037 //
1038 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1039 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
1040 // CHECK5-NEXT: entry:
1041 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1042 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
1043 // CHECK5-NEXT: ret i32 [[CALL]]
1044 //
1045 //
1046 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1047 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1048 // CHECK5-NEXT: entry:
1049 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1050 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1051 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1052 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1053 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1054 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1055 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1056 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
1057 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1058 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1059 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1060 // CHECK5-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
1061 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1062 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1063 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1064 // CHECK5: omp.inner.for.cond:
1065 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1066 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1067 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1068 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1069 // CHECK5: omp.inner.for.body:
1070 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1071 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
1072 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1073 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1074 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
1075 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1076 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1077 // CHECK5-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
1078 // CHECK5-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
1079 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
1080 // CHECK5-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1081 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1082 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !2
1083 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1084 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
1085 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
1086 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
1087 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !2
1088 // CHECK5-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64
1089 // CHECK5-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
1090 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4, !llvm.access.group !2
1091 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1092 // CHECK5: omp.body.continue:
1093 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1094 // CHECK5: omp.inner.for.inc:
1095 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1096 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1
1097 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1098 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1099 // CHECK5: omp.inner.for.end:
1100 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
1101 // CHECK5-NEXT: store i32 456, i32* [[J]], align 4
1102 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1103 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A10]], i64 0, i64 0
1104 // CHECK5-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX11]], i64 0, i64 0
1105 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
1106 // CHECK5-NEXT: ret i32 [[TMP9]]
1107 //
1108 //
1109 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1110 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
1111 // CHECK6-NEXT: entry:
1112 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1113 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
1114 // CHECK6-NEXT: ret i32 [[CALL]]
1115 //
1116 //
1117 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1118 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1119 // CHECK6-NEXT: entry:
1120 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1121 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4
1122 // CHECK6-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1123 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1124 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1125 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1126 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4
1127 // CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4
1128 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1129 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1130 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1131 // CHECK6-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
1132 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1133 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1134 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1135 // CHECK6: omp.inner.for.cond:
1136 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1137 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1138 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1139 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1140 // CHECK6: omp.inner.for.body:
1141 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1142 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
1143 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1144 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1145 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
1146 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1147 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1148 // CHECK6-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
1149 // CHECK6-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
1150 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
1151 // CHECK6-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1152 // CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1153 // CHECK6-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !2
1154 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1155 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
1156 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
1157 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
1158 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !2
1159 // CHECK6-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64
1160 // CHECK6-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
1161 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4, !llvm.access.group !2
1162 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1163 // CHECK6: omp.body.continue:
1164 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1165 // CHECK6: omp.inner.for.inc:
1166 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1167 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1
1168 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1169 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1170 // CHECK6: omp.inner.for.end:
1171 // CHECK6-NEXT: store i32 123, i32* [[I]], align 4
1172 // CHECK6-NEXT: store i32 456, i32* [[J]], align 4
1173 // CHECK6-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1174 // CHECK6-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A10]], i64 0, i64 0
1175 // CHECK6-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX11]], i64 0, i64 0
1176 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
1177 // CHECK6-NEXT: ret i32 [[TMP9]]
1178 //
1179 //
1180 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1181 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1182 // CHECK7-NEXT: entry:
1183 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1184 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
1185 // CHECK7-NEXT: ret i32 [[CALL]]
1186 //
1187 //
1188 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1189 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1190 // CHECK7-NEXT: entry:
1191 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1192 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
1193 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1194 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1195 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1196 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1197 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1198 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
1199 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1200 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1201 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1202 // CHECK7-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
1203 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1204 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1205 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1206 // CHECK7: omp.inner.for.cond:
1207 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1208 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
1209 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1210 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1211 // CHECK7: omp.inner.for.body:
1212 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1213 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
1214 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1215 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1216 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
1217 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1218 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1219 // CHECK7-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
1220 // CHECK7-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
1221 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
1222 // CHECK7-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1223 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1224 // CHECK7-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !3
1225 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1226 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
1227 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP6]]
1228 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !3
1229 // CHECK7-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
1230 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !3
1231 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1232 // CHECK7: omp.body.continue:
1233 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1234 // CHECK7: omp.inner.for.inc:
1235 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1236 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
1237 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1238 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1239 // CHECK7: omp.inner.for.end:
1240 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
1241 // CHECK7-NEXT: store i32 456, i32* [[J]], align 4
1242 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1243 // CHECK7-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A9]], i32 0, i32 0
1244 // CHECK7-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX10]], i32 0, i32 0
1245 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
1246 // CHECK7-NEXT: ret i32 [[TMP9]]
1247 //
1248 //
1249 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1250 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
1251 // CHECK8-NEXT: entry:
1252 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1253 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(224352) [[V]])
1254 // CHECK8-NEXT: ret i32 [[CALL]]
1255 //
1256 //
1257 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1258 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1259 // CHECK8-NEXT: entry:
1260 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1261 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4
1262 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1263 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1264 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1265 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1266 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4
1267 // CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4
1268 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1269 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1270 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1271 // CHECK8-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
1272 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1273 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1274 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1275 // CHECK8: omp.inner.for.cond:
1276 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1277 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
1278 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1279 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1280 // CHECK8: omp.inner.for.body:
1281 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1282 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
1283 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1284 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1285 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
1286 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1287 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1288 // CHECK8-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
1289 // CHECK8-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
1290 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
1291 // CHECK8-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1292 // CHECK8-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1293 // CHECK8-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !3
1294 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1295 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
1296 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP6]]
1297 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !3
1298 // CHECK8-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
1299 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !3
1300 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1301 // CHECK8: omp.body.continue:
1302 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1303 // CHECK8: omp.inner.for.inc:
1304 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1305 // CHECK8-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
1306 // CHECK8-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1307 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1308 // CHECK8: omp.inner.for.end:
1309 // CHECK8-NEXT: store i32 123, i32* [[I]], align 4
1310 // CHECK8-NEXT: store i32 456, i32* [[J]], align 4
1311 // CHECK8-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1312 // CHECK8-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A9]], i32 0, i32 0
1313 // CHECK8-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX10]], i32 0, i32 0
1314 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
1315 // CHECK8-NEXT: ret i32 [[TMP9]]
1316 //
1317 //
1318 // CHECK9-LABEL: define {{[^@]+}}@main
1319 // CHECK9-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1320 // CHECK9-NEXT: entry:
1321 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1322 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1323 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
1324 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
1325 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
1326 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
1327 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1328 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
1329 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1330 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
1331 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
1332 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
1333 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
1334 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
1335 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1336 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1337 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1338 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1339 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
1340 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1341 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1342 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
1343 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
1344 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4
1345 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1346 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1347 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
1348 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
1349 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
1350 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
1351 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
1352 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
1353 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
1354 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
1355 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
1356 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
1357 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
1358 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
1359 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
1360 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
1361 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
1362 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
1363 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
1364 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
1365 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1366 // CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
1367 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP13]], align 8
1368 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1369 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
1370 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP15]], align 8
1371 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1372 // CHECK9-NEXT: store i64 4, i64* [[TMP16]], align 8
1373 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1374 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
1375 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1376 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
1377 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
1378 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1379 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
1380 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
1381 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
1382 // CHECK9-NEXT: store i64 4, i64* [[TMP22]], align 8
1383 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1384 // CHECK9-NEXT: store i8* null, i8** [[TMP23]], align 8
1385 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1386 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1387 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP25]], align 8
1388 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1389 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
1390 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8
1391 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1392 // CHECK9-NEXT: store i64 8, i64* [[TMP28]], align 8
1393 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1394 // CHECK9-NEXT: store i8* null, i8** [[TMP29]], align 8
1395 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1396 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
1397 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
1398 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1399 // CHECK9-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i64*
1400 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP33]], align 8
1401 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
1402 // CHECK9-NEXT: store i64 8, i64* [[TMP34]], align 8
1403 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1404 // CHECK9-NEXT: store i8* null, i8** [[TMP35]], align 8
1405 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1406 // CHECK9-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32**
1407 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP37]], align 8
1408 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1409 // CHECK9-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32**
1410 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP39]], align 8
1411 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1412 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP40]], align 8
1413 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
1414 // CHECK9-NEXT: store i8* null, i8** [[TMP41]], align 8
1415 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1416 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1417 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1418 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[N]], align 4
1419 // CHECK9-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_]], align 4
1420 // CHECK9-NEXT: [[TMP46:%.*]] = load i32, i32* [[M]], align 4
1421 // CHECK9-NEXT: store i32 [[TMP46]], i32* [[DOTCAPTURE_EXPR_3]], align 4
1422 // CHECK9-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1423 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP47]], 0
1424 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1425 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
1426 // CHECK9-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
1427 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP48]], 0
1428 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1429 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1430 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
1431 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1432 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
1433 // CHECK9-NEXT: [[TMP49:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
1434 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP49]], 1
1435 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
1436 // CHECK9-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86.region_id, i32 5, i8** [[TMP42]], i8** [[TMP43]], i64* [[TMP44]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1437 // CHECK9-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
1438 // CHECK9-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1439 // CHECK9: omp_offload.failed:
1440 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1441 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1442 // CHECK9: omp_offload.cont:
1443 // CHECK9-NEXT: [[TMP52:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1444 // CHECK9-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP52]])
1445 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1446 // CHECK9-NEXT: [[TMP53:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
1447 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP53]])
1448 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, i32* [[RETVAL]], align 4
1449 // CHECK9-NEXT: ret i32 [[TMP54]]
1450 //
1451 //
1452 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86
1453 // CHECK9-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1454 // CHECK9-NEXT: entry:
1455 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1456 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
1457 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1458 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1459 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1460 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
1461 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
1462 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1463 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1464 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1465 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
1466 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
1467 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1468 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1469 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1470 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
1471 // CHECK9-NEXT: ret void
1472 //
1473 //
1474 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1475 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1476 // CHECK9-NEXT: entry:
1477 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1478 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1479 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1480 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
1481 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1482 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1483 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1484 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1485 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1486 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1487 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1488 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1489 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1490 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1491 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1492 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1493 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1494 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1495 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1496 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4
1497 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4
1498 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1499 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1500 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1501 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
1502 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1503 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1504 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1505 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1506 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
1507 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1508 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1509 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1510 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1511 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
1512 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
1513 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1514 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1515 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1516 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1517 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1518 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1519 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1520 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1521 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1522 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1523 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1524 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1525 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1526 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
1527 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1528 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1529 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1530 // CHECK9: land.lhs.true:
1531 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1532 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1533 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1534 // CHECK9: omp.precond.then:
1535 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1536 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1537 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8
1538 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1539 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1540 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1541 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1542 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1543 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1544 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1545 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1546 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1547 // CHECK9: cond.true:
1548 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1549 // CHECK9-NEXT: br label [[COND_END:%.*]]
1550 // CHECK9: cond.false:
1551 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1552 // CHECK9-NEXT: br label [[COND_END]]
1553 // CHECK9: cond.end:
1554 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1555 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1556 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1557 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1558 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1559 // CHECK9: omp.inner.for.cond:
1560 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1561 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1562 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1563 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1564 // CHECK9: omp.inner.for.body:
1565 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1566 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1567 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]])
1568 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1569 // CHECK9: omp.inner.for.inc:
1570 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1571 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
1572 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]]
1573 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
1574 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1575 // CHECK9: omp.inner.for.end:
1576 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1577 // CHECK9: omp.loop.exit:
1578 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1579 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
1580 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
1581 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1582 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1583 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1584 // CHECK9: .omp.final.then:
1585 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1586 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP29]], 0
1587 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1588 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
1589 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
1590 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
1591 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1592 // CHECK9-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP30]], 0
1593 // CHECK9-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
1594 // CHECK9-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
1595 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
1596 // CHECK9-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
1597 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1598 // CHECK9: .omp.final.done:
1599 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1600 // CHECK9: omp.precond.end:
1601 // CHECK9-NEXT: ret void
1602 //
1603 //
1604 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1605 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1606 // CHECK9-NEXT: entry:
1607 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1608 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1609 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1610 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1611 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1612 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
1613 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1614 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1615 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1616 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1617 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1618 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1619 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1620 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1621 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1622 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1623 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1624 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1625 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1626 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1627 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1628 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4
1629 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4
1630 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1631 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1632 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1633 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1634 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1635 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
1636 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1637 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1638 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1639 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1640 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
1641 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1642 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1643 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1644 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1645 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
1646 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
1647 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1648 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1649 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1650 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1651 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1652 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1653 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1654 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1655 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1656 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1657 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1658 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1659 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1660 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
1661 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1662 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1663 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1664 // CHECK9: land.lhs.true:
1665 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1666 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1667 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1668 // CHECK9: omp.precond.then:
1669 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1670 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1671 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1672 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1673 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1674 // CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8
1675 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8
1676 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1677 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1678 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1679 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
1680 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1681 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1682 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1683 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]
1684 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1685 // CHECK9: cond.true:
1686 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1687 // CHECK9-NEXT: br label [[COND_END:%.*]]
1688 // CHECK9: cond.false:
1689 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1690 // CHECK9-NEXT: br label [[COND_END]]
1691 // CHECK9: cond.end:
1692 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]
1693 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1694 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1695 // CHECK9-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8
1696 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1697 // CHECK9: omp.inner.for.cond:
1698 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1699 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1700 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]
1701 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1702 // CHECK9: omp.inner.for.body:
1703 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1704 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1705 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0
1706 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1707 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
1708 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
1709 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]]
1710 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
1711 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
1712 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
1713 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
1714 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1715 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1716 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1717 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0
1718 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
1719 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
1720 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
1721 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]]
1722 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1723 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0
1724 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
1725 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
1726 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
1727 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
1728 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]]
1729 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
1730 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
1731 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
1732 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
1733 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4
1734 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64
1735 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
1736 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]]
1737 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4
1738 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64
1739 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]]
1740 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4
1741 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1742 // CHECK9: omp.body.continue:
1743 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1744 // CHECK9: omp.inner.for.inc:
1745 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
1746 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1
1747 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
1748 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1749 // CHECK9: omp.inner.for.end:
1750 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1751 // CHECK9: omp.loop.exit:
1752 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1753 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
1754 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
1755 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1756 // CHECK9-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
1757 // CHECK9-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1758 // CHECK9: .omp.final.then:
1759 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1760 // CHECK9-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP37]], 0
1761 // CHECK9-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
1762 // CHECK9-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
1763 // CHECK9-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
1764 // CHECK9-NEXT: store i32 [[ADD42]], i32* [[I11]], align 4
1765 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1766 // CHECK9-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP38]], 0
1767 // CHECK9-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
1768 // CHECK9-NEXT: [[MUL45:%.*]] = mul nsw i32 [[DIV44]], 1
1769 // CHECK9-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]]
1770 // CHECK9-NEXT: store i32 [[ADD46]], i32* [[J12]], align 4
1771 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1772 // CHECK9: .omp.final.done:
1773 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1774 // CHECK9: omp.precond.end:
1775 // CHECK9-NEXT: ret void
1776 //
1777 //
1778 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1779 // CHECK9-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
1780 // CHECK9-NEXT: entry:
1781 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1782 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1783 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1784 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1785 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1786 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1787 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1788 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1789 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1790 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1791 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
1792 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1793 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1794 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
1795 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1796 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1797 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1798 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1799 // CHECK9-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
1800 // CHECK9-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1801 // CHECK9-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1802 // CHECK9-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1803 // CHECK9: omp_offload.failed:
1804 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1805 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1806 // CHECK9: omp_offload.cont:
1807 // CHECK9-NEXT: ret i32 0
1808 //
1809 //
1810 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72
1811 // CHECK9-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1812 // CHECK9-NEXT: entry:
1813 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1814 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1815 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1816 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1817 // CHECK9-NEXT: ret void
1818 //
1819 //
1820 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1821 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1822 // CHECK9-NEXT: entry:
1823 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1824 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1825 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1826 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1827 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1828 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1829 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1830 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1831 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1832 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1833 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1834 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1835 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1836 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1837 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1838 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1839 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1840 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
1841 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1842 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1843 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1844 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1845 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1846 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1847 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1848 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1849 // CHECK9: cond.true:
1850 // CHECK9-NEXT: br label [[COND_END:%.*]]
1851 // CHECK9: cond.false:
1852 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1853 // CHECK9-NEXT: br label [[COND_END]]
1854 // CHECK9: cond.end:
1855 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1856 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1857 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1858 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1859 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1860 // CHECK9: omp.inner.for.cond:
1861 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1862 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1863 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1864 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1865 // CHECK9: omp.inner.for.body:
1866 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1867 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1868 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1869 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1870 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]])
1871 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1872 // CHECK9: omp.inner.for.inc:
1873 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1874 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1875 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1876 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1877 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1878 // CHECK9: omp.inner.for.end:
1879 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1880 // CHECK9: omp.loop.exit:
1881 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1882 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1883 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1884 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1885 // CHECK9: .omp.final.then:
1886 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
1887 // CHECK9-NEXT: store i32 2, i32* [[J]], align 4
1888 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1889 // CHECK9: .omp.final.done:
1890 // CHECK9-NEXT: ret void
1891 //
1892 //
1893 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1894 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1895 // CHECK9-NEXT: entry:
1896 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1897 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1898 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1899 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1900 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1901 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1902 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1903 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1904 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1905 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1906 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1907 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1908 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1909 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1910 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1911 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1912 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1913 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1914 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1915 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1916 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1917 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1918 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1919 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1920 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1921 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
1922 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1923 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1924 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1925 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1926 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1927 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1928 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1929 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1930 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
1931 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1932 // CHECK9: cond.true:
1933 // CHECK9-NEXT: br label [[COND_END:%.*]]
1934 // CHECK9: cond.false:
1935 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1936 // CHECK9-NEXT: br label [[COND_END]]
1937 // CHECK9: cond.end:
1938 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1939 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1940 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1941 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1942 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1943 // CHECK9: omp.inner.for.cond:
1944 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1945 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1946 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1947 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1948 // CHECK9: omp.inner.for.body:
1949 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1950 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
1951 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1952 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1953 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1954 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1955 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1956 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
1957 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
1958 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
1959 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
1960 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
1961 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
1962 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
1963 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1964 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1965 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
1966 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
1967 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
1968 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
1969 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1970 // CHECK9: omp.body.continue:
1971 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1972 // CHECK9: omp.inner.for.inc:
1973 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1974 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
1975 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
1976 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1977 // CHECK9: omp.inner.for.end:
1978 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1979 // CHECK9: omp.loop.exit:
1980 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1981 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1982 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1983 // CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1984 // CHECK9: .omp.final.then:
1985 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
1986 // CHECK9-NEXT: store i32 2, i32* [[J]], align 4
1987 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1988 // CHECK9: .omp.final.done:
1989 // CHECK9-NEXT: ret void
1990 //
1991 //
1992 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1993 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
1994 // CHECK9-NEXT: entry:
1995 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1996 // CHECK9-NEXT: ret void
1997 //
1998 //
1999 // CHECK10-LABEL: define {{[^@]+}}@main
2000 // CHECK10-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2001 // CHECK10-NEXT: entry:
2002 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2003 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2004 // CHECK10-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
2005 // CHECK10-NEXT: [[N:%.*]] = alloca i32, align 4
2006 // CHECK10-NEXT: [[M:%.*]] = alloca i32, align 4
2007 // CHECK10-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2008 // CHECK10-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2009 // CHECK10-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
2010 // CHECK10-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
2011 // CHECK10-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
2012 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
2013 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
2014 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
2015 // CHECK10-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
2016 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2017 // CHECK10-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
2018 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2019 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2020 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
2021 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4
2022 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2023 // CHECK10-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
2024 // CHECK10-NEXT: store i32 100, i32* [[N]], align 4
2025 // CHECK10-NEXT: store i32 2, i32* [[M]], align 4
2026 // CHECK10-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2027 // CHECK10-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2028 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
2029 // CHECK10-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
2030 // CHECK10-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
2031 // CHECK10-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
2032 // CHECK10-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
2033 // CHECK10-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
2034 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2035 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
2036 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
2037 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
2038 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
2039 // CHECK10-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
2040 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
2041 // CHECK10-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
2042 // CHECK10-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
2043 // CHECK10-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
2044 // CHECK10-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
2045 // CHECK10-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
2046 // CHECK10-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2047 // CHECK10-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
2048 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP13]], align 8
2049 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2050 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
2051 // CHECK10-NEXT: store i64 [[TMP7]], i64* [[TMP15]], align 8
2052 // CHECK10-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2053 // CHECK10-NEXT: store i64 4, i64* [[TMP16]], align 8
2054 // CHECK10-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2055 // CHECK10-NEXT: store i8* null, i8** [[TMP17]], align 8
2056 // CHECK10-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2057 // CHECK10-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
2058 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
2059 // CHECK10-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2060 // CHECK10-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
2061 // CHECK10-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
2062 // CHECK10-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2063 // CHECK10-NEXT: store i64 4, i64* [[TMP22]], align 8
2064 // CHECK10-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
2065 // CHECK10-NEXT: store i8* null, i8** [[TMP23]], align 8
2066 // CHECK10-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2067 // CHECK10-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
2068 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP25]], align 8
2069 // CHECK10-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2070 // CHECK10-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
2071 // CHECK10-NEXT: store i64 [[TMP1]], i64* [[TMP27]], align 8
2072 // CHECK10-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2073 // CHECK10-NEXT: store i64 8, i64* [[TMP28]], align 8
2074 // CHECK10-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
2075 // CHECK10-NEXT: store i8* null, i8** [[TMP29]], align 8
2076 // CHECK10-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2077 // CHECK10-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
2078 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
2079 // CHECK10-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2080 // CHECK10-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i64*
2081 // CHECK10-NEXT: store i64 [[TMP3]], i64* [[TMP33]], align 8
2082 // CHECK10-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
2083 // CHECK10-NEXT: store i64 8, i64* [[TMP34]], align 8
2084 // CHECK10-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
2085 // CHECK10-NEXT: store i8* null, i8** [[TMP35]], align 8
2086 // CHECK10-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2087 // CHECK10-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i32**
2088 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP37]], align 8
2089 // CHECK10-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2090 // CHECK10-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32**
2091 // CHECK10-NEXT: store i32* [[VLA]], i32** [[TMP39]], align 8
2092 // CHECK10-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
2093 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[TMP40]], align 8
2094 // CHECK10-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
2095 // CHECK10-NEXT: store i8* null, i8** [[TMP41]], align 8
2096 // CHECK10-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2097 // CHECK10-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2098 // CHECK10-NEXT: [[TMP44:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2099 // CHECK10-NEXT: [[TMP45:%.*]] = load i32, i32* [[N]], align 4
2100 // CHECK10-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_]], align 4
2101 // CHECK10-NEXT: [[TMP46:%.*]] = load i32, i32* [[M]], align 4
2102 // CHECK10-NEXT: store i32 [[TMP46]], i32* [[DOTCAPTURE_EXPR_3]], align 4
2103 // CHECK10-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2104 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP47]], 0
2105 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2106 // CHECK10-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
2107 // CHECK10-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
2108 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP48]], 0
2109 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2110 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
2111 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
2112 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
2113 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
2114 // CHECK10-NEXT: [[TMP49:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
2115 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP49]], 1
2116 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
2117 // CHECK10-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86.region_id, i32 5, i8** [[TMP42]], i8** [[TMP43]], i64* [[TMP44]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2118 // CHECK10-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
2119 // CHECK10-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2120 // CHECK10: omp_offload.failed:
2121 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2122 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2123 // CHECK10: omp_offload.cont:
2124 // CHECK10-NEXT: [[TMP52:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2125 // CHECK10-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP52]])
2126 // CHECK10-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2127 // CHECK10-NEXT: [[TMP53:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2128 // CHECK10-NEXT: call void @llvm.stackrestore(i8* [[TMP53]])
2129 // CHECK10-NEXT: [[TMP54:%.*]] = load i32, i32* [[RETVAL]], align 4
2130 // CHECK10-NEXT: ret i32 [[TMP54]]
2131 //
2132 //
2133 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86
2134 // CHECK10-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2135 // CHECK10-NEXT: entry:
2136 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
2137 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
2138 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2139 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
2140 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2141 // CHECK10-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
2142 // CHECK10-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
2143 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2144 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
2145 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2146 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
2147 // CHECK10-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
2148 // CHECK10-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2149 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
2150 // CHECK10-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2151 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
2152 // CHECK10-NEXT: ret void
2153 //
2154 //
2155 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined.
2156 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2157 // CHECK10-NEXT: entry:
2158 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2159 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2160 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
2161 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
2162 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2163 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
2164 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2165 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2166 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2167 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2168 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2169 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2170 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
2171 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2172 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
2173 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
2174 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
2175 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
2176 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2177 // CHECK10-NEXT: [[I11:%.*]] = alloca i32, align 4
2178 // CHECK10-NEXT: [[J12:%.*]] = alloca i32, align 4
2179 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2180 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2181 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
2182 // CHECK10-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
2183 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2184 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
2185 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2186 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2187 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
2188 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2189 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
2190 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2191 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2192 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
2193 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
2194 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
2195 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2196 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
2197 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2198 // CHECK10-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2199 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2200 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
2201 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2202 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
2203 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
2204 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
2205 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
2206 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
2207 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4
2208 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2209 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
2210 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2211 // CHECK10: land.lhs.true:
2212 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2213 // CHECK10-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
2214 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2215 // CHECK10: omp.precond.then:
2216 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
2217 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2218 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8
2219 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
2220 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2221 // CHECK10-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2222 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2223 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
2224 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2225 // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2226 // CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
2227 // CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2228 // CHECK10: cond.true:
2229 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2230 // CHECK10-NEXT: br label [[COND_END:%.*]]
2231 // CHECK10: cond.false:
2232 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2233 // CHECK10-NEXT: br label [[COND_END]]
2234 // CHECK10: cond.end:
2235 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2236 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
2237 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
2238 // CHECK10-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
2239 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2240 // CHECK10: omp.inner.for.cond:
2241 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2242 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2243 // CHECK10-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
2244 // CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2245 // CHECK10: omp.inner.for.body:
2246 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
2247 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2248 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]])
2249 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2250 // CHECK10: omp.inner.for.inc:
2251 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2252 // CHECK10-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
2253 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]]
2254 // CHECK10-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
2255 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2256 // CHECK10: omp.inner.for.end:
2257 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2258 // CHECK10: omp.loop.exit:
2259 // CHECK10-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2260 // CHECK10-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
2261 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
2262 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2263 // CHECK10-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
2264 // CHECK10-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2265 // CHECK10: .omp.final.then:
2266 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2267 // CHECK10-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP29]], 0
2268 // CHECK10-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
2269 // CHECK10-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
2270 // CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
2271 // CHECK10-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
2272 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2273 // CHECK10-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP30]], 0
2274 // CHECK10-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2275 // CHECK10-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
2276 // CHECK10-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
2277 // CHECK10-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
2278 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
2279 // CHECK10: .omp.final.done:
2280 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
2281 // CHECK10: omp.precond.end:
2282 // CHECK10-NEXT: ret void
2283 //
2284 //
2285 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1
2286 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i64 [[VLA:%.*]], i64 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2287 // CHECK10-NEXT: entry:
2288 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2289 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2290 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2291 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2292 // CHECK10-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
2293 // CHECK10-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
2294 // CHECK10-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
2295 // CHECK10-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
2296 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
2297 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2298 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2299 // CHECK10-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2300 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2301 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2302 // CHECK10-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
2303 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2304 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
2305 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2306 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2307 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
2308 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2309 // CHECK10-NEXT: [[I11:%.*]] = alloca i32, align 4
2310 // CHECK10-NEXT: [[J12:%.*]] = alloca i32, align 4
2311 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2312 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2313 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2314 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2315 // CHECK10-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
2316 // CHECK10-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
2317 // CHECK10-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
2318 // CHECK10-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
2319 // CHECK10-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
2320 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
2321 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
2322 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
2323 // CHECK10-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
2324 // CHECK10-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
2325 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2326 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
2327 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
2328 // CHECK10-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
2329 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2330 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
2331 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2332 // CHECK10-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2333 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2334 // CHECK10-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
2335 // CHECK10-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2336 // CHECK10-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
2337 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
2338 // CHECK10-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
2339 // CHECK10-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
2340 // CHECK10-NEXT: store i32 0, i32* [[I]], align 4
2341 // CHECK10-NEXT: store i32 0, i32* [[J]], align 4
2342 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2343 // CHECK10-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
2344 // CHECK10-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2345 // CHECK10: land.lhs.true:
2346 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2347 // CHECK10-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
2348 // CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2349 // CHECK10: omp.precond.then:
2350 // CHECK10-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
2351 // CHECK10-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2352 // CHECK10-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
2353 // CHECK10-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2354 // CHECK10-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2355 // CHECK10-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8
2356 // CHECK10-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8
2357 // CHECK10-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
2358 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2359 // CHECK10-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2360 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
2361 // CHECK10-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
2362 // CHECK10-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
2363 // CHECK10-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2364 // CHECK10-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]
2365 // CHECK10-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2366 // CHECK10: cond.true:
2367 // CHECK10-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2368 // CHECK10-NEXT: br label [[COND_END:%.*]]
2369 // CHECK10: cond.false:
2370 // CHECK10-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
2371 // CHECK10-NEXT: br label [[COND_END]]
2372 // CHECK10: cond.end:
2373 // CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]
2374 // CHECK10-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
2375 // CHECK10-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
2376 // CHECK10-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8
2377 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2378 // CHECK10: omp.inner.for.cond:
2379 // CHECK10-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2380 // CHECK10-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
2381 // CHECK10-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]
2382 // CHECK10-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2383 // CHECK10: omp.inner.for.body:
2384 // CHECK10-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2385 // CHECK10-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2386 // CHECK10-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0
2387 // CHECK10-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
2388 // CHECK10-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
2389 // CHECK10-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
2390 // CHECK10-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]]
2391 // CHECK10-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
2392 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
2393 // CHECK10-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
2394 // CHECK10-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4
2395 // CHECK10-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2396 // CHECK10-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2397 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2398 // CHECK10-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0
2399 // CHECK10-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
2400 // CHECK10-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
2401 // CHECK10-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
2402 // CHECK10-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]]
2403 // CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2404 // CHECK10-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0
2405 // CHECK10-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
2406 // CHECK10-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
2407 // CHECK10-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
2408 // CHECK10-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
2409 // CHECK10-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]]
2410 // CHECK10-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
2411 // CHECK10-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
2412 // CHECK10-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
2413 // CHECK10-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4
2414 // CHECK10-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4
2415 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64
2416 // CHECK10-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
2417 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]]
2418 // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4
2419 // CHECK10-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64
2420 // CHECK10-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]]
2421 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4
2422 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2423 // CHECK10: omp.body.continue:
2424 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2425 // CHECK10: omp.inner.for.inc:
2426 // CHECK10-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2427 // CHECK10-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1
2428 // CHECK10-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8
2429 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
2430 // CHECK10: omp.inner.for.end:
2431 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2432 // CHECK10: omp.loop.exit:
2433 // CHECK10-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2434 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
2435 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
2436 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2437 // CHECK10-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
2438 // CHECK10-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2439 // CHECK10: .omp.final.then:
2440 // CHECK10-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2441 // CHECK10-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP37]], 0
2442 // CHECK10-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
2443 // CHECK10-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
2444 // CHECK10-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
2445 // CHECK10-NEXT: store i32 [[ADD42]], i32* [[I11]], align 4
2446 // CHECK10-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2447 // CHECK10-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP38]], 0
2448 // CHECK10-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
2449 // CHECK10-NEXT: [[MUL45:%.*]] = mul nsw i32 [[DIV44]], 1
2450 // CHECK10-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]]
2451 // CHECK10-NEXT: store i32 [[ADD46]], i32* [[J12]], align 4
2452 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
2453 // CHECK10: .omp.final.done:
2454 // CHECK10-NEXT: br label [[OMP_PRECOND_END]]
2455 // CHECK10: omp.precond.end:
2456 // CHECK10-NEXT: ret void
2457 //
2458 //
2459 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2460 // CHECK10-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
2461 // CHECK10-NEXT: entry:
2462 // CHECK10-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2463 // CHECK10-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2464 // CHECK10-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2465 // CHECK10-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2466 // CHECK10-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2467 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2468 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2469 // CHECK10-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2470 // CHECK10-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2471 // CHECK10-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
2472 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
2473 // CHECK10-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2474 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
2475 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
2476 // CHECK10-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2477 // CHECK10-NEXT: store i8* null, i8** [[TMP4]], align 8
2478 // CHECK10-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2479 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2480 // CHECK10-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
2481 // CHECK10-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2482 // CHECK10-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2483 // CHECK10-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2484 // CHECK10: omp_offload.failed:
2485 // CHECK10-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
2486 // CHECK10-NEXT: br label [[OMP_OFFLOAD_CONT]]
2487 // CHECK10: omp_offload.cont:
2488 // CHECK10-NEXT: ret i32 0
2489 //
2490 //
2491 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72
2492 // CHECK10-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2493 // CHECK10-NEXT: entry:
2494 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
2495 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
2496 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
2497 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
2498 // CHECK10-NEXT: ret void
2499 //
2500 //
2501 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..2
2502 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2503 // CHECK10-NEXT: entry:
2504 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2505 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2506 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
2507 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2508 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2509 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2510 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2511 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2512 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2513 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2514 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2515 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
2516 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2517 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2518 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
2519 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
2520 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2521 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
2522 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2523 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2524 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2525 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2526 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2527 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2528 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
2529 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2530 // CHECK10: cond.true:
2531 // CHECK10-NEXT: br label [[COND_END:%.*]]
2532 // CHECK10: cond.false:
2533 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2534 // CHECK10-NEXT: br label [[COND_END]]
2535 // CHECK10: cond.end:
2536 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2537 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2538 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2539 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2540 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2541 // CHECK10: omp.inner.for.cond:
2542 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2543 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2544 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2545 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2546 // CHECK10: omp.inner.for.body:
2547 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2548 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2549 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2550 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2551 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]])
2552 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2553 // CHECK10: omp.inner.for.inc:
2554 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2555 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2556 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2557 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2558 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
2559 // CHECK10: omp.inner.for.end:
2560 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2561 // CHECK10: omp.loop.exit:
2562 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2563 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2564 // CHECK10-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2565 // CHECK10-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2566 // CHECK10: .omp.final.then:
2567 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
2568 // CHECK10-NEXT: store i32 2, i32* [[J]], align 4
2569 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
2570 // CHECK10: .omp.final.done:
2571 // CHECK10-NEXT: ret void
2572 //
2573 //
2574 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..3
2575 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2576 // CHECK10-NEXT: entry:
2577 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2578 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2579 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2580 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2581 // CHECK10-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
2582 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2583 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4
2584 // CHECK10-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2585 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2586 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2587 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2588 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2589 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4
2590 // CHECK10-NEXT: [[J:%.*]] = alloca i32, align 4
2591 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2592 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2593 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2594 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2595 // CHECK10-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
2596 // CHECK10-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
2597 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2598 // CHECK10-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2599 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2600 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2601 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2602 // CHECK10-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
2603 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2604 // CHECK10-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2605 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2606 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2607 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2608 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2609 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2610 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2611 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
2612 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2613 // CHECK10: cond.true:
2614 // CHECK10-NEXT: br label [[COND_END:%.*]]
2615 // CHECK10: cond.false:
2616 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2617 // CHECK10-NEXT: br label [[COND_END]]
2618 // CHECK10: cond.end:
2619 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2620 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2621 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2622 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2623 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2624 // CHECK10: omp.inner.for.cond:
2625 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2626 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2627 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2628 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2629 // CHECK10: omp.inner.for.body:
2630 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2631 // CHECK10-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
2632 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2633 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2634 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2635 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2636 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2637 // CHECK10-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
2638 // CHECK10-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
2639 // CHECK10-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
2640 // CHECK10-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
2641 // CHECK10-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
2642 // CHECK10-NEXT: store i32 [[ADD7]], i32* [[J]], align 4
2643 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
2644 // CHECK10-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2645 // CHECK10-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
2646 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
2647 // CHECK10-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
2648 // CHECK10-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
2649 // CHECK10-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4
2650 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2651 // CHECK10: omp.body.continue:
2652 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2653 // CHECK10: omp.inner.for.inc:
2654 // CHECK10-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2655 // CHECK10-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
2656 // CHECK10-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4
2657 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2658 // CHECK10: omp.inner.for.end:
2659 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2660 // CHECK10: omp.loop.exit:
2661 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2662 // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2663 // CHECK10-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2664 // CHECK10-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2665 // CHECK10: .omp.final.then:
2666 // CHECK10-NEXT: store i32 10, i32* [[I]], align 4
2667 // CHECK10-NEXT: store i32 2, i32* [[J]], align 4
2668 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]]
2669 // CHECK10: .omp.final.done:
2670 // CHECK10-NEXT: ret void
2671 //
2672 //
2673 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2674 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] {
2675 // CHECK10-NEXT: entry:
2676 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1)
2677 // CHECK10-NEXT: ret void
2678 //
2679 //
2680 // CHECK11-LABEL: define {{[^@]+}}@main
2681 // CHECK11-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2682 // CHECK11-NEXT: entry:
2683 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2684 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2685 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
2686 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
2687 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
2688 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2689 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2690 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
2691 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2692 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
2693 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
2694 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
2695 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
2696 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
2697 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2698 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2699 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2700 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2701 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2702 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
2703 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2704 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2705 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
2706 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4
2707 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2708 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
2709 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2710 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
2711 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2712 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
2713 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2714 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
2715 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
2716 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
2717 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
2718 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
2719 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
2720 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
2721 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2722 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
2723 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
2724 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2725 // CHECK11-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
2726 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP12]], align 4
2727 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2728 // CHECK11-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
2729 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP14]], align 4
2730 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2731 // CHECK11-NEXT: store i64 4, i64* [[TMP15]], align 4
2732 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2733 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
2734 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2735 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
2736 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
2737 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2738 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
2739 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
2740 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
2741 // CHECK11-NEXT: store i64 4, i64* [[TMP21]], align 4
2742 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2743 // CHECK11-NEXT: store i8* null, i8** [[TMP22]], align 4
2744 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2745 // CHECK11-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
2746 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP24]], align 4
2747 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2748 // CHECK11-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
2749 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP26]], align 4
2750 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2751 // CHECK11-NEXT: store i64 4, i64* [[TMP27]], align 4
2752 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2753 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 4
2754 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2755 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
2756 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
2757 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2758 // CHECK11-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
2759 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP32]], align 4
2760 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
2761 // CHECK11-NEXT: store i64 4, i64* [[TMP33]], align 4
2762 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2763 // CHECK11-NEXT: store i8* null, i8** [[TMP34]], align 4
2764 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
2765 // CHECK11-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
2766 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 4
2767 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
2768 // CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32**
2769 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP38]], align 4
2770 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
2771 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP39]], align 4
2772 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
2773 // CHECK11-NEXT: store i8* null, i8** [[TMP40]], align 4
2774 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2775 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2776 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2777 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[N]], align 4
2778 // CHECK11-NEXT: store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_]], align 4
2779 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* [[M]], align 4
2780 // CHECK11-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2781 // CHECK11-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2782 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP46]], 0
2783 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2784 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2785 // CHECK11-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2786 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP47]], 0
2787 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2788 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
2789 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
2790 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
2791 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
2792 // CHECK11-NEXT: [[TMP48:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
2793 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP48]], 1
2794 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
2795 // CHECK11-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86.region_id, i32 5, i8** [[TMP41]], i8** [[TMP42]], i64* [[TMP43]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2796 // CHECK11-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
2797 // CHECK11-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2798 // CHECK11: omp_offload.failed:
2799 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
2800 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2801 // CHECK11: omp_offload.cont:
2802 // CHECK11-NEXT: [[TMP51:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2803 // CHECK11-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP51]])
2804 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2805 // CHECK11-NEXT: [[TMP52:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2806 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP52]])
2807 // CHECK11-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4
2808 // CHECK11-NEXT: ret i32 [[TMP53]]
2809 //
2810 //
2811 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86
2812 // CHECK11-SAME: (i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2813 // CHECK11-NEXT: entry:
2814 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2815 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
2816 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2817 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
2818 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2819 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
2820 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
2821 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2822 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
2823 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2824 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2825 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
2826 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2827 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
2828 // CHECK11-NEXT: ret void
2829 //
2830 //
2831 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
2832 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2833 // CHECK11-NEXT: entry:
2834 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2835 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2836 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2837 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
2838 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2839 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
2840 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2841 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2842 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2843 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2844 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2845 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2846 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
2847 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2848 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2849 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
2850 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
2851 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
2852 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2853 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
2854 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
2855 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2856 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2857 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2858 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
2859 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2860 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
2861 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2862 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2863 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
2864 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
2865 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
2866 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
2867 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
2868 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
2869 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
2870 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
2871 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2872 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
2873 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2874 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2875 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2876 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
2877 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2878 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
2879 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
2880 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
2881 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
2882 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
2883 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
2884 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2885 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
2886 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
2887 // CHECK11: land.lhs.true:
2888 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2889 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
2890 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
2891 // CHECK11: omp.precond.then:
2892 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
2893 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2894 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8
2895 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
2896 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2897 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2898 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2899 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
2900 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2901 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2902 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
2903 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2904 // CHECK11: cond.true:
2905 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
2906 // CHECK11-NEXT: br label [[COND_END:%.*]]
2907 // CHECK11: cond.false:
2908 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2909 // CHECK11-NEXT: br label [[COND_END]]
2910 // CHECK11: cond.end:
2911 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
2912 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
2913 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
2914 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
2915 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2916 // CHECK11: omp.inner.for.cond:
2917 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2918 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2919 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
2920 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2921 // CHECK11: omp.inner.for.body:
2922 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
2923 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
2924 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
2925 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32
2926 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]])
2927 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2928 // CHECK11: omp.inner.for.inc:
2929 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
2930 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
2931 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
2932 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
2933 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
2934 // CHECK11: omp.inner.for.end:
2935 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2936 // CHECK11: omp.loop.exit:
2937 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2938 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
2939 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
2940 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2941 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
2942 // CHECK11-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2943 // CHECK11: .omp.final.then:
2944 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2945 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP31]], 0
2946 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
2947 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
2948 // CHECK11-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
2949 // CHECK11-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
2950 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
2951 // CHECK11-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP32]], 0
2952 // CHECK11-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2953 // CHECK11-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
2954 // CHECK11-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
2955 // CHECK11-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
2956 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2957 // CHECK11: .omp.final.done:
2958 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2959 // CHECK11: omp.precond.end:
2960 // CHECK11-NEXT: ret void
2961 //
2962 //
2963 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
2964 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2965 // CHECK11-NEXT: entry:
2966 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2967 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2968 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2969 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2970 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
2971 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
2972 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2973 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
2974 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
2975 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2976 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2977 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2978 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2979 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
2980 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
2981 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2982 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2983 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2984 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2985 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
2986 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2987 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4
2988 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4
2989 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2990 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2991 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2992 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2993 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
2994 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
2995 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
2996 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
2997 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
2998 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
2999 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
3000 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3001 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3002 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3003 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
3004 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
3005 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
3006 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3007 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3008 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
3009 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3010 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3011 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3012 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
3013 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3014 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
3015 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
3016 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
3017 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
3018 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
3019 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
3020 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3021 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
3022 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3023 // CHECK11: land.lhs.true:
3024 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3025 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
3026 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3027 // CHECK11: omp.precond.then:
3028 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
3029 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3030 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
3031 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3032 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64
3033 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3034 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64
3035 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
3036 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
3037 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
3038 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3039 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3040 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
3041 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
3042 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3043 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3044 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]
3045 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3046 // CHECK11: cond.true:
3047 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3048 // CHECK11-NEXT: br label [[COND_END:%.*]]
3049 // CHECK11: cond.false:
3050 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3051 // CHECK11-NEXT: br label [[COND_END]]
3052 // CHECK11: cond.end:
3053 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]
3054 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
3055 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
3056 // CHECK11-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8
3057 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3058 // CHECK11: omp.inner.for.cond:
3059 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3060 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3061 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]
3062 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3063 // CHECK11: omp.inner.for.body:
3064 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3065 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3066 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0
3067 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
3068 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
3069 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
3070 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]]
3071 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
3072 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
3073 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
3074 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
3075 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3076 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3077 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3078 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0
3079 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
3080 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
3081 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
3082 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]]
3083 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3084 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0
3085 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
3086 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
3087 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
3088 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
3089 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]]
3090 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
3091 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
3092 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
3093 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
3094 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4
3095 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]]
3096 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]]
3097 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4
3098 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]]
3099 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4
3100 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3101 // CHECK11: omp.body.continue:
3102 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3103 // CHECK11: omp.inner.for.inc:
3104 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3105 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1
3106 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8
3107 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3108 // CHECK11: omp.inner.for.end:
3109 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3110 // CHECK11: omp.loop.exit:
3111 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3112 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
3113 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
3114 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3115 // CHECK11-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
3116 // CHECK11-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3117 // CHECK11: .omp.final.then:
3118 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3119 // CHECK11-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP37]], 0
3120 // CHECK11-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
3121 // CHECK11-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
3122 // CHECK11-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
3123 // CHECK11-NEXT: store i32 [[ADD43]], i32* [[I13]], align 4
3124 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3125 // CHECK11-NEXT: [[SUB44:%.*]] = sub nsw i32 [[TMP38]], 0
3126 // CHECK11-NEXT: [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
3127 // CHECK11-NEXT: [[MUL46:%.*]] = mul nsw i32 [[DIV45]], 1
3128 // CHECK11-NEXT: [[ADD47:%.*]] = add nsw i32 0, [[MUL46]]
3129 // CHECK11-NEXT: store i32 [[ADD47]], i32* [[J14]], align 4
3130 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
3131 // CHECK11: .omp.final.done:
3132 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
3133 // CHECK11: omp.precond.end:
3134 // CHECK11-NEXT: ret void
3135 //
3136 //
3137 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
3138 // CHECK11-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
3139 // CHECK11-NEXT: entry:
3140 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3141 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
3142 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3143 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3144 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3145 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3146 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3147 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3148 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3149 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
3150 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
3151 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3152 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
3153 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
3154 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3155 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
3156 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3157 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3158 // CHECK11-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
3159 // CHECK11-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3160 // CHECK11-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3161 // CHECK11-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3162 // CHECK11: omp_offload.failed:
3163 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
3164 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
3165 // CHECK11: omp_offload.cont:
3166 // CHECK11-NEXT: ret i32 0
3167 //
3168 //
3169 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72
3170 // CHECK11-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3171 // CHECK11-NEXT: entry:
3172 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3173 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3174 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3175 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
3176 // CHECK11-NEXT: ret void
3177 //
3178 //
3179 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
3180 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3181 // CHECK11-NEXT: entry:
3182 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3183 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3184 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3185 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3186 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3187 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3188 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3189 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3190 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3191 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3192 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3193 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
3194 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3195 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3196 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3197 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3198 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3199 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
3200 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3201 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3202 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3203 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3204 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3205 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3206 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
3207 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3208 // CHECK11: cond.true:
3209 // CHECK11-NEXT: br label [[COND_END:%.*]]
3210 // CHECK11: cond.false:
3211 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3212 // CHECK11-NEXT: br label [[COND_END]]
3213 // CHECK11: cond.end:
3214 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3215 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3216 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3217 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3218 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3219 // CHECK11: omp.inner.for.cond:
3220 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3221 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3222 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3223 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3224 // CHECK11: omp.inner.for.body:
3225 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3226 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3227 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]])
3228 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3229 // CHECK11: omp.inner.for.inc:
3230 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3231 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3232 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3233 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3234 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3235 // CHECK11: omp.inner.for.end:
3236 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3237 // CHECK11: omp.loop.exit:
3238 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3239 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3240 // CHECK11-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3241 // CHECK11-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3242 // CHECK11: .omp.final.then:
3243 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
3244 // CHECK11-NEXT: store i32 2, i32* [[J]], align 4
3245 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
3246 // CHECK11: .omp.final.done:
3247 // CHECK11-NEXT: ret void
3248 //
3249 //
3250 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
3251 // CHECK11-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3252 // CHECK11-NEXT: entry:
3253 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3254 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3255 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3256 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3257 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3258 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3259 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
3260 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3261 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3262 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3263 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3264 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3265 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
3266 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
3267 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3268 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3269 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3270 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3271 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3272 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3273 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3274 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
3275 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3276 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3277 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3278 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3279 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3280 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3281 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3282 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3283 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3284 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3285 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
3286 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3287 // CHECK11: cond.true:
3288 // CHECK11-NEXT: br label [[COND_END:%.*]]
3289 // CHECK11: cond.false:
3290 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3291 // CHECK11-NEXT: br label [[COND_END]]
3292 // CHECK11: cond.end:
3293 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3294 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3295 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3296 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3297 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3298 // CHECK11: omp.inner.for.cond:
3299 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3300 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3301 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3302 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3303 // CHECK11: omp.inner.for.body:
3304 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3305 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
3306 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
3307 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3308 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3309 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3310 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3311 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
3312 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
3313 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
3314 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
3315 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
3316 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
3317 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
3318 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
3319 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
3320 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
3321 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
3322 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3323 // CHECK11: omp.body.continue:
3324 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3325 // CHECK11: omp.inner.for.inc:
3326 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3327 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
3328 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
3329 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3330 // CHECK11: omp.inner.for.end:
3331 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3332 // CHECK11: omp.loop.exit:
3333 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3334 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3335 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3336 // CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3337 // CHECK11: .omp.final.then:
3338 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
3339 // CHECK11-NEXT: store i32 2, i32* [[J]], align 4
3340 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
3341 // CHECK11: .omp.final.done:
3342 // CHECK11-NEXT: ret void
3343 //
3344 //
3345 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3346 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
3347 // CHECK11-NEXT: entry:
3348 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
3349 // CHECK11-NEXT: ret void
3350 //
3351 //
3352 // CHECK12-LABEL: define {{[^@]+}}@main
3353 // CHECK12-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3354 // CHECK12-NEXT: entry:
3355 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3356 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3357 // CHECK12-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
3358 // CHECK12-NEXT: [[N:%.*]] = alloca i32, align 4
3359 // CHECK12-NEXT: [[M:%.*]] = alloca i32, align 4
3360 // CHECK12-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
3361 // CHECK12-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3362 // CHECK12-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
3363 // CHECK12-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
3364 // CHECK12-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
3365 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
3366 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
3367 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
3368 // CHECK12-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
3369 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3370 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3371 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3372 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
3373 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
3374 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4
3375 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3376 // CHECK12-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
3377 // CHECK12-NEXT: store i32 100, i32* [[N]], align 4
3378 // CHECK12-NEXT: store i32 2, i32* [[M]], align 4
3379 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
3380 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
3381 // CHECK12-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
3382 // CHECK12-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
3383 // CHECK12-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
3384 // CHECK12-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
3385 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
3386 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
3387 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
3388 // CHECK12-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
3389 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
3390 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
3391 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
3392 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
3393 // CHECK12-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
3394 // CHECK12-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
3395 // CHECK12-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
3396 // CHECK12-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3397 // CHECK12-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i32*
3398 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP12]], align 4
3399 // CHECK12-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3400 // CHECK12-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i32*
3401 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[TMP14]], align 4
3402 // CHECK12-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3403 // CHECK12-NEXT: store i64 4, i64* [[TMP15]], align 4
3404 // CHECK12-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3405 // CHECK12-NEXT: store i8* null, i8** [[TMP16]], align 4
3406 // CHECK12-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
3407 // CHECK12-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
3408 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
3409 // CHECK12-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
3410 // CHECK12-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
3411 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
3412 // CHECK12-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
3413 // CHECK12-NEXT: store i64 4, i64* [[TMP21]], align 4
3414 // CHECK12-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
3415 // CHECK12-NEXT: store i8* null, i8** [[TMP22]], align 4
3416 // CHECK12-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
3417 // CHECK12-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i32*
3418 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP24]], align 4
3419 // CHECK12-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
3420 // CHECK12-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i32*
3421 // CHECK12-NEXT: store i32 [[TMP0]], i32* [[TMP26]], align 4
3422 // CHECK12-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
3423 // CHECK12-NEXT: store i64 4, i64* [[TMP27]], align 4
3424 // CHECK12-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
3425 // CHECK12-NEXT: store i8* null, i8** [[TMP28]], align 4
3426 // CHECK12-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
3427 // CHECK12-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
3428 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
3429 // CHECK12-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
3430 // CHECK12-NEXT: [[TMP32:%.*]] = bitcast i8** [[TMP31]] to i32*
3431 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[TMP32]], align 4
3432 // CHECK12-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 3
3433 // CHECK12-NEXT: store i64 4, i64* [[TMP33]], align 4
3434 // CHECK12-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
3435 // CHECK12-NEXT: store i8* null, i8** [[TMP34]], align 4
3436 // CHECK12-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
3437 // CHECK12-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
3438 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 4
3439 // CHECK12-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
3440 // CHECK12-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32**
3441 // CHECK12-NEXT: store i32* [[VLA]], i32** [[TMP38]], align 4
3442 // CHECK12-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
3443 // CHECK12-NEXT: store i64 [[TMP10]], i64* [[TMP39]], align 4
3444 // CHECK12-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
3445 // CHECK12-NEXT: store i8* null, i8** [[TMP40]], align 4
3446 // CHECK12-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3447 // CHECK12-NEXT: [[TMP42:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3448 // CHECK12-NEXT: [[TMP43:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
3449 // CHECK12-NEXT: [[TMP44:%.*]] = load i32, i32* [[N]], align 4
3450 // CHECK12-NEXT: store i32 [[TMP44]], i32* [[DOTCAPTURE_EXPR_]], align 4
3451 // CHECK12-NEXT: [[TMP45:%.*]] = load i32, i32* [[M]], align 4
3452 // CHECK12-NEXT: store i32 [[TMP45]], i32* [[DOTCAPTURE_EXPR_2]], align 4
3453 // CHECK12-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3454 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP46]], 0
3455 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3456 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3457 // CHECK12-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
3458 // CHECK12-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP47]], 0
3459 // CHECK12-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
3460 // CHECK12-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
3461 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
3462 // CHECK12-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
3463 // CHECK12-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
3464 // CHECK12-NEXT: [[TMP48:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
3465 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP48]], 1
3466 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[ADD]])
3467 // CHECK12-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86.region_id, i32 5, i8** [[TMP41]], i8** [[TMP42]], i64* [[TMP43]], i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3468 // CHECK12-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
3469 // CHECK12-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3470 // CHECK12: omp_offload.failed:
3471 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
3472 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3473 // CHECK12: omp_offload.cont:
3474 // CHECK12-NEXT: [[TMP51:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
3475 // CHECK12-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP51]])
3476 // CHECK12-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
3477 // CHECK12-NEXT: [[TMP52:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
3478 // CHECK12-NEXT: call void @llvm.stackrestore(i8* [[TMP52]])
3479 // CHECK12-NEXT: [[TMP53:%.*]] = load i32, i32* [[RETVAL]], align 4
3480 // CHECK12-NEXT: ret i32 [[TMP53]]
3481 //
3482 //
3483 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86
3484 // CHECK12-SAME: (i32 [[N:%.*]], i32 [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
3485 // CHECK12-NEXT: entry:
3486 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
3487 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
3488 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3489 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
3490 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3491 // CHECK12-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
3492 // CHECK12-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
3493 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3494 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
3495 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3496 // CHECK12-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3497 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3498 // CHECK12-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3499 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
3500 // CHECK12-NEXT: ret void
3501 //
3502 //
3503 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined.
3504 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3505 // CHECK12-NEXT: entry:
3506 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3507 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3508 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
3509 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
3510 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3511 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
3512 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3513 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
3514 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3515 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
3516 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3517 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
3518 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
3519 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3520 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3521 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
3522 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
3523 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
3524 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3525 // CHECK12-NEXT: [[I11:%.*]] = alloca i32, align 4
3526 // CHECK12-NEXT: [[J12:%.*]] = alloca i32, align 4
3527 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3528 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3529 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
3530 // CHECK12-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
3531 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3532 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
3533 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3534 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
3535 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
3536 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3537 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3538 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3539 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
3540 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
3541 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
3542 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3543 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3544 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
3545 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3546 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3547 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3548 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
3549 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3550 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
3551 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
3552 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
3553 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
3554 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
3555 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4
3556 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3557 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
3558 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3559 // CHECK12: land.lhs.true:
3560 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3561 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
3562 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3563 // CHECK12: omp.precond.then:
3564 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
3565 // CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3566 // CHECK12-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8
3567 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
3568 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3569 // CHECK12-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3570 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
3571 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
3572 // CHECK12-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3573 // CHECK12-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3574 // CHECK12-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
3575 // CHECK12-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3576 // CHECK12: cond.true:
3577 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3578 // CHECK12-NEXT: br label [[COND_END:%.*]]
3579 // CHECK12: cond.false:
3580 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3581 // CHECK12-NEXT: br label [[COND_END]]
3582 // CHECK12: cond.end:
3583 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
3584 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
3585 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
3586 // CHECK12-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
3587 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3588 // CHECK12: omp.inner.for.cond:
3589 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3590 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3591 // CHECK12-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
3592 // CHECK12-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3593 // CHECK12: omp.inner.for.body:
3594 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
3595 // CHECK12-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
3596 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
3597 // CHECK12-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32
3598 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]])
3599 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3600 // CHECK12: omp.inner.for.inc:
3601 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3602 // CHECK12-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8
3603 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
3604 // CHECK12-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8
3605 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3606 // CHECK12: omp.inner.for.end:
3607 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3608 // CHECK12: omp.loop.exit:
3609 // CHECK12-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3610 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
3611 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
3612 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3613 // CHECK12-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
3614 // CHECK12-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3615 // CHECK12: .omp.final.then:
3616 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3617 // CHECK12-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP31]], 0
3618 // CHECK12-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
3619 // CHECK12-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
3620 // CHECK12-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
3621 // CHECK12-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
3622 // CHECK12-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3623 // CHECK12-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP32]], 0
3624 // CHECK12-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
3625 // CHECK12-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
3626 // CHECK12-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
3627 // CHECK12-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
3628 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
3629 // CHECK12: .omp.final.done:
3630 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
3631 // CHECK12: omp.precond.end:
3632 // CHECK12-NEXT: ret void
3633 //
3634 //
3635 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..1
3636 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32* nonnull align 4 dereferenceable(4) [[M:%.*]], i32 [[VLA:%.*]], i32 [[VLA1:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
3637 // CHECK12-NEXT: entry:
3638 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3639 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3640 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3641 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3642 // CHECK12-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
3643 // CHECK12-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
3644 // CHECK12-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
3645 // CHECK12-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
3646 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
3647 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
3648 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3649 // CHECK12-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
3650 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3651 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
3652 // CHECK12-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
3653 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3654 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3655 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
3656 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
3657 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
3658 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3659 // CHECK12-NEXT: [[I13:%.*]] = alloca i32, align 4
3660 // CHECK12-NEXT: [[J14:%.*]] = alloca i32, align 4
3661 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3662 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3663 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3664 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3665 // CHECK12-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
3666 // CHECK12-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
3667 // CHECK12-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
3668 // CHECK12-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
3669 // CHECK12-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
3670 // CHECK12-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
3671 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
3672 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
3673 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
3674 // CHECK12-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
3675 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
3676 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
3677 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
3678 // CHECK12-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
3679 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3680 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
3681 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3682 // CHECK12-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
3683 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3684 // CHECK12-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
3685 // CHECK12-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3686 // CHECK12-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
3687 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
3688 // CHECK12-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
3689 // CHECK12-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
3690 // CHECK12-NEXT: store i32 0, i32* [[I]], align 4
3691 // CHECK12-NEXT: store i32 0, i32* [[J]], align 4
3692 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3693 // CHECK12-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
3694 // CHECK12-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
3695 // CHECK12: land.lhs.true:
3696 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3697 // CHECK12-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
3698 // CHECK12-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
3699 // CHECK12: omp.precond.then:
3700 // CHECK12-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
3701 // CHECK12-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3702 // CHECK12-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
3703 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3704 // CHECK12-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64
3705 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3706 // CHECK12-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64
3707 // CHECK12-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
3708 // CHECK12-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
3709 // CHECK12-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
3710 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3711 // CHECK12-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3712 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
3713 // CHECK12-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
3714 // CHECK12-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3715 // CHECK12-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3716 // CHECK12-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]
3717 // CHECK12-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3718 // CHECK12: cond.true:
3719 // CHECK12-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
3720 // CHECK12-NEXT: br label [[COND_END:%.*]]
3721 // CHECK12: cond.false:
3722 // CHECK12-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3723 // CHECK12-NEXT: br label [[COND_END]]
3724 // CHECK12: cond.end:
3725 // CHECK12-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]
3726 // CHECK12-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
3727 // CHECK12-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
3728 // CHECK12-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8
3729 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3730 // CHECK12: omp.inner.for.cond:
3731 // CHECK12-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3732 // CHECK12-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
3733 // CHECK12-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]
3734 // CHECK12-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3735 // CHECK12: omp.inner.for.body:
3736 // CHECK12-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3737 // CHECK12-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3738 // CHECK12-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0
3739 // CHECK12-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
3740 // CHECK12-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
3741 // CHECK12-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
3742 // CHECK12-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]]
3743 // CHECK12-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
3744 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
3745 // CHECK12-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
3746 // CHECK12-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4
3747 // CHECK12-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3748 // CHECK12-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3749 // CHECK12-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3750 // CHECK12-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0
3751 // CHECK12-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
3752 // CHECK12-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
3753 // CHECK12-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
3754 // CHECK12-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]]
3755 // CHECK12-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3756 // CHECK12-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0
3757 // CHECK12-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
3758 // CHECK12-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
3759 // CHECK12-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
3760 // CHECK12-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
3761 // CHECK12-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]]
3762 // CHECK12-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
3763 // CHECK12-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
3764 // CHECK12-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
3765 // CHECK12-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4
3766 // CHECK12-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4
3767 // CHECK12-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]]
3768 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]]
3769 // CHECK12-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4
3770 // CHECK12-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]]
3771 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4
3772 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3773 // CHECK12: omp.body.continue:
3774 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3775 // CHECK12: omp.inner.for.inc:
3776 // CHECK12-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8
3777 // CHECK12-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1
3778 // CHECK12-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8
3779 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3780 // CHECK12: omp.inner.for.end:
3781 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3782 // CHECK12: omp.loop.exit:
3783 // CHECK12-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3784 // CHECK12-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
3785 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
3786 // CHECK12-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3787 // CHECK12-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
3788 // CHECK12-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3789 // CHECK12: .omp.final.then:
3790 // CHECK12-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
3791 // CHECK12-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP37]], 0
3792 // CHECK12-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
3793 // CHECK12-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
3794 // CHECK12-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
3795 // CHECK12-NEXT: store i32 [[ADD43]], i32* [[I13]], align 4
3796 // CHECK12-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
3797 // CHECK12-NEXT: [[SUB44:%.*]] = sub nsw i32 [[TMP38]], 0
3798 // CHECK12-NEXT: [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
3799 // CHECK12-NEXT: [[MUL46:%.*]] = mul nsw i32 [[DIV45]], 1
3800 // CHECK12-NEXT: [[ADD47:%.*]] = add nsw i32 0, [[MUL46]]
3801 // CHECK12-NEXT: store i32 [[ADD47]], i32* [[J14]], align 4
3802 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
3803 // CHECK12: .omp.final.done:
3804 // CHECK12-NEXT: br label [[OMP_PRECOND_END]]
3805 // CHECK12: omp.precond.end:
3806 // CHECK12-NEXT: ret void
3807 //
3808 //
3809 // CHECK12-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
3810 // CHECK12-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
3811 // CHECK12-NEXT: entry:
3812 // CHECK12-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
3813 // CHECK12-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
3814 // CHECK12-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3815 // CHECK12-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3816 // CHECK12-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3817 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3818 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3819 // CHECK12-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
3820 // CHECK12-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3821 // CHECK12-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
3822 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
3823 // CHECK12-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3824 // CHECK12-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
3825 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
3826 // CHECK12-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3827 // CHECK12-NEXT: store i8* null, i8** [[TMP4]], align 4
3828 // CHECK12-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3829 // CHECK12-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3830 // CHECK12-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 20)
3831 // CHECK12-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3832 // CHECK12-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3833 // CHECK12-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3834 // CHECK12: omp_offload.failed:
3835 // CHECK12-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
3836 // CHECK12-NEXT: br label [[OMP_OFFLOAD_CONT]]
3837 // CHECK12: omp_offload.cont:
3838 // CHECK12-NEXT: ret i32 0
3839 //
3840 //
3841 // CHECK12-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72
3842 // CHECK12-SAME: ([10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3843 // CHECK12-NEXT: entry:
3844 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3845 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3846 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3847 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
3848 // CHECK12-NEXT: ret void
3849 //
3850 //
3851 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..2
3852 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3853 // CHECK12-NEXT: entry:
3854 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3855 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3856 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3857 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3858 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3859 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3860 // CHECK12-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3861 // CHECK12-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3862 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3863 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3864 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3865 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3866 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3867 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3868 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3869 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3870 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3871 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
3872 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3873 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3874 // CHECK12-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3875 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3876 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3877 // CHECK12-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3878 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
3879 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3880 // CHECK12: cond.true:
3881 // CHECK12-NEXT: br label [[COND_END:%.*]]
3882 // CHECK12: cond.false:
3883 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3884 // CHECK12-NEXT: br label [[COND_END]]
3885 // CHECK12: cond.end:
3886 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3887 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3888 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3889 // CHECK12-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3890 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3891 // CHECK12: omp.inner.for.cond:
3892 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3893 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3894 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3895 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3896 // CHECK12: omp.inner.for.body:
3897 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3898 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3899 // CHECK12-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]])
3900 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3901 // CHECK12: omp.inner.for.inc:
3902 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3903 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3904 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3905 // CHECK12-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3906 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3907 // CHECK12: omp.inner.for.end:
3908 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3909 // CHECK12: omp.loop.exit:
3910 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3911 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3912 // CHECK12-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3913 // CHECK12-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3914 // CHECK12: .omp.final.then:
3915 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
3916 // CHECK12-NEXT: store i32 2, i32* [[J]], align 4
3917 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
3918 // CHECK12: .omp.final.done:
3919 // CHECK12-NEXT: ret void
3920 //
3921 //
3922 // CHECK12-LABEL: define {{[^@]+}}@.omp_outlined..3
3923 // CHECK12-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
3924 // CHECK12-NEXT: entry:
3925 // CHECK12-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3926 // CHECK12-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3927 // CHECK12-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3928 // CHECK12-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3929 // CHECK12-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
3930 // CHECK12-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3931 // CHECK12-NEXT: [[TMP:%.*]] = alloca i32, align 4
3932 // CHECK12-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
3933 // CHECK12-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3934 // CHECK12-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3935 // CHECK12-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3936 // CHECK12-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3937 // CHECK12-NEXT: [[I:%.*]] = alloca i32, align 4
3938 // CHECK12-NEXT: [[J:%.*]] = alloca i32, align 4
3939 // CHECK12-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3940 // CHECK12-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3941 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3942 // CHECK12-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3943 // CHECK12-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
3944 // CHECK12-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
3945 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3946 // CHECK12-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
3947 // CHECK12-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3948 // CHECK12-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3949 // CHECK12-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3950 // CHECK12-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3951 // CHECK12-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3952 // CHECK12-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3953 // CHECK12-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3954 // CHECK12-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3955 // CHECK12-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3956 // CHECK12-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3957 // CHECK12-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
3958 // CHECK12-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3959 // CHECK12: cond.true:
3960 // CHECK12-NEXT: br label [[COND_END:%.*]]
3961 // CHECK12: cond.false:
3962 // CHECK12-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3963 // CHECK12-NEXT: br label [[COND_END]]
3964 // CHECK12: cond.end:
3965 // CHECK12-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3966 // CHECK12-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3967 // CHECK12-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3968 // CHECK12-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3969 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3970 // CHECK12: omp.inner.for.cond:
3971 // CHECK12-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3972 // CHECK12-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3973 // CHECK12-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3974 // CHECK12-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3975 // CHECK12: omp.inner.for.body:
3976 // CHECK12-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3977 // CHECK12-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
3978 // CHECK12-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
3979 // CHECK12-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3980 // CHECK12-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3981 // CHECK12-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3982 // CHECK12-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3983 // CHECK12-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
3984 // CHECK12-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
3985 // CHECK12-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
3986 // CHECK12-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
3987 // CHECK12-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
3988 // CHECK12-NEXT: store i32 [[ADD6]], i32* [[J]], align 4
3989 // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4
3990 // CHECK12-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
3991 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4
3992 // CHECK12-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
3993 // CHECK12-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4
3994 // CHECK12-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3995 // CHECK12: omp.body.continue:
3996 // CHECK12-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3997 // CHECK12: omp.inner.for.inc:
3998 // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3999 // CHECK12-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
4000 // CHECK12-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
4001 // CHECK12-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
4002 // CHECK12: omp.inner.for.end:
4003 // CHECK12-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4004 // CHECK12: omp.loop.exit:
4005 // CHECK12-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4006 // CHECK12-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4007 // CHECK12-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4008 // CHECK12-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4009 // CHECK12: .omp.final.then:
4010 // CHECK12-NEXT: store i32 10, i32* [[I]], align 4
4011 // CHECK12-NEXT: store i32 2, i32* [[J]], align 4
4012 // CHECK12-NEXT: br label [[DOTOMP_FINAL_DONE]]
4013 // CHECK12: .omp.final.done:
4014 // CHECK12-NEXT: ret void
4015 //
4016 //
4017 // CHECK12-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4018 // CHECK12-SAME: () #[[ATTR5:[0-9]+]] {
4019 // CHECK12-NEXT: entry:
4020 // CHECK12-NEXT: call void @__tgt_register_requires(i64 1)
4021 // CHECK12-NEXT: ret void
4022 //
4023 //
4024 // CHECK13-LABEL: define {{[^@]+}}@main
4025 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4026 // CHECK13-NEXT: entry:
4027 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4028 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4029 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
4030 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
4031 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
4032 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4033 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4034 // CHECK13-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
4035 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4036 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4037 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4038 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4039 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
4040 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
4041 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
4042 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4043 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
4044 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
4045 // CHECK13-NEXT: [[I9:%.*]] = alloca i32, align 4
4046 // CHECK13-NEXT: [[J10:%.*]] = alloca i32, align 4
4047 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
4048 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4049 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
4050 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
4051 // CHECK13-NEXT: store i32 2, i32* [[M]], align 4
4052 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4053 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4054 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
4055 // CHECK13-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
4056 // CHECK13-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
4057 // CHECK13-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
4058 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
4059 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
4060 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4061 // CHECK13-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
4062 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
4063 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
4064 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[M]], align 4
4065 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4066 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4067 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP8]], 0
4068 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4069 // CHECK13-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
4070 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4071 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP9]], 0
4072 // CHECK13-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
4073 // CHECK13-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
4074 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
4075 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
4076 // CHECK13-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
4077 // CHECK13-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
4078 // CHECK13-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4079 // CHECK13-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_UB]], align 8
4080 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4081 // CHECK13-NEXT: store i32 0, i32* [[J]], align 4
4082 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4083 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]]
4084 // CHECK13-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
4085 // CHECK13: land.lhs.true:
4086 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4087 // CHECK13-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP12]]
4088 // CHECK13-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
4089 // CHECK13: simd.if.then:
4090 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
4091 // CHECK13-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_IV]], align 8
4092 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4093 // CHECK13: omp.inner.for.cond:
4094 // CHECK13-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4095 // CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
4096 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP14]], [[TMP15]]
4097 // CHECK13-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4098 // CHECK13: omp.inner.for.body:
4099 // CHECK13-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4100 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
4101 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP17]], 0
4102 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4103 // CHECK13-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
4104 // CHECK13-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
4105 // CHECK13-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP16]], [[CONV15]]
4106 // CHECK13-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
4107 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
4108 // CHECK13-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
4109 // CHECK13-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !2
4110 // CHECK13-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4111 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4112 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
4113 // CHECK13-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP20]], 0
4114 // CHECK13-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
4115 // CHECK13-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
4116 // CHECK13-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
4117 // CHECK13-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP19]], [[CONV22]]
4118 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
4119 // CHECK13-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP21]], 0
4120 // CHECK13-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
4121 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
4122 // CHECK13-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
4123 // CHECK13-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
4124 // CHECK13-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP18]], [[MUL28]]
4125 // CHECK13-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
4126 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
4127 // CHECK13-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
4128 // CHECK13-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !2
4129 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !2
4130 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64
4131 // CHECK13-NEXT: [[TMP23:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
4132 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[TMP23]]
4133 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !2
4134 // CHECK13-NEXT: [[IDXPROM33:%.*]] = sext i32 [[TMP24]] to i64
4135 // CHECK13-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM33]]
4136 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX34]], align 4, !llvm.access.group !2
4137 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4138 // CHECK13: omp.body.continue:
4139 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4140 // CHECK13: omp.inner.for.inc:
4141 // CHECK13-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4142 // CHECK13-NEXT: [[ADD35:%.*]] = add nsw i64 [[TMP25]], 1
4143 // CHECK13-NEXT: store i64 [[ADD35]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4144 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4145 // CHECK13: omp.inner.for.end:
4146 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4147 // CHECK13-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP26]], 0
4148 // CHECK13-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
4149 // CHECK13-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
4150 // CHECK13-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
4151 // CHECK13-NEXT: store i32 [[ADD39]], i32* [[I9]], align 4
4152 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4153 // CHECK13-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP27]], 0
4154 // CHECK13-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
4155 // CHECK13-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
4156 // CHECK13-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
4157 // CHECK13-NEXT: store i32 [[ADD43]], i32* [[J10]], align 4
4158 // CHECK13-NEXT: br label [[SIMD_IF_END]]
4159 // CHECK13: simd.if.end:
4160 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4161 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP28]])
4162 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4163 // CHECK13-NEXT: [[TMP29:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
4164 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP29]])
4165 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
4166 // CHECK13-NEXT: ret i32 [[TMP30]]
4167 //
4168 //
4169 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
4170 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
4171 // CHECK13-NEXT: entry:
4172 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4173 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
4174 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4175 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4176 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4177 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4178 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4179 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4180 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
4181 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4182 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4183 // CHECK13-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
4184 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4185 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4186 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4187 // CHECK13: omp.inner.for.cond:
4188 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4189 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
4190 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4191 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4192 // CHECK13: omp.inner.for.body:
4193 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4194 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
4195 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
4196 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4197 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
4198 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4199 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4200 // CHECK13-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
4201 // CHECK13-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
4202 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
4203 // CHECK13-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
4204 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
4205 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !6
4206 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4207 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
4208 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
4209 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !6
4210 // CHECK13-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP7]] to i64
4211 // CHECK13-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM6]]
4212 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !6
4213 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4214 // CHECK13: omp.body.continue:
4215 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4216 // CHECK13: omp.inner.for.inc:
4217 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4218 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
4219 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4220 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4221 // CHECK13: omp.inner.for.end:
4222 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
4223 // CHECK13-NEXT: store i32 2, i32* [[J]], align 4
4224 // CHECK13-NEXT: ret i32 0
4225 //
4226 //
4227 // CHECK14-LABEL: define {{[^@]+}}@main
4228 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4229 // CHECK14-NEXT: entry:
4230 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4231 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4232 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
4233 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4
4234 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4
4235 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4236 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4237 // CHECK14-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
4238 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
4239 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4240 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4241 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4242 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
4243 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
4244 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
4245 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
4246 // CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4
4247 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
4248 // CHECK14-NEXT: [[I9:%.*]] = alloca i32, align 4
4249 // CHECK14-NEXT: [[J10:%.*]] = alloca i32, align 4
4250 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4
4251 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4252 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
4253 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4
4254 // CHECK14-NEXT: store i32 2, i32* [[M]], align 4
4255 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4256 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4257 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
4258 // CHECK14-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
4259 // CHECK14-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
4260 // CHECK14-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
4261 // CHECK14-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
4262 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
4263 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4264 // CHECK14-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
4265 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
4266 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
4267 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[M]], align 4
4268 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4269 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4270 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP8]], 0
4271 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4272 // CHECK14-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
4273 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4274 // CHECK14-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP9]], 0
4275 // CHECK14-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
4276 // CHECK14-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
4277 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
4278 // CHECK14-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
4279 // CHECK14-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
4280 // CHECK14-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
4281 // CHECK14-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4282 // CHECK14-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_UB]], align 8
4283 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4
4284 // CHECK14-NEXT: store i32 0, i32* [[J]], align 4
4285 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4286 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]]
4287 // CHECK14-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
4288 // CHECK14: land.lhs.true:
4289 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4290 // CHECK14-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP12]]
4291 // CHECK14-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
4292 // CHECK14: simd.if.then:
4293 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
4294 // CHECK14-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_IV]], align 8
4295 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4296 // CHECK14: omp.inner.for.cond:
4297 // CHECK14-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4298 // CHECK14-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
4299 // CHECK14-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP14]], [[TMP15]]
4300 // CHECK14-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4301 // CHECK14: omp.inner.for.body:
4302 // CHECK14-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4303 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
4304 // CHECK14-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP17]], 0
4305 // CHECK14-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4306 // CHECK14-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
4307 // CHECK14-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
4308 // CHECK14-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP16]], [[CONV15]]
4309 // CHECK14-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
4310 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
4311 // CHECK14-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
4312 // CHECK14-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !2
4313 // CHECK14-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4314 // CHECK14-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4315 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
4316 // CHECK14-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP20]], 0
4317 // CHECK14-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
4318 // CHECK14-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
4319 // CHECK14-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
4320 // CHECK14-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP19]], [[CONV22]]
4321 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
4322 // CHECK14-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP21]], 0
4323 // CHECK14-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
4324 // CHECK14-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
4325 // CHECK14-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
4326 // CHECK14-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
4327 // CHECK14-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP18]], [[MUL28]]
4328 // CHECK14-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
4329 // CHECK14-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
4330 // CHECK14-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
4331 // CHECK14-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !2
4332 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !2
4333 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64
4334 // CHECK14-NEXT: [[TMP23:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
4335 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[TMP23]]
4336 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !2
4337 // CHECK14-NEXT: [[IDXPROM33:%.*]] = sext i32 [[TMP24]] to i64
4338 // CHECK14-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM33]]
4339 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX34]], align 4, !llvm.access.group !2
4340 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4341 // CHECK14: omp.body.continue:
4342 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4343 // CHECK14: omp.inner.for.inc:
4344 // CHECK14-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4345 // CHECK14-NEXT: [[ADD35:%.*]] = add nsw i64 [[TMP25]], 1
4346 // CHECK14-NEXT: store i64 [[ADD35]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
4347 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
4348 // CHECK14: omp.inner.for.end:
4349 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4350 // CHECK14-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP26]], 0
4351 // CHECK14-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
4352 // CHECK14-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
4353 // CHECK14-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
4354 // CHECK14-NEXT: store i32 [[ADD39]], i32* [[I9]], align 4
4355 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4356 // CHECK14-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP27]], 0
4357 // CHECK14-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
4358 // CHECK14-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
4359 // CHECK14-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
4360 // CHECK14-NEXT: store i32 [[ADD43]], i32* [[J10]], align 4
4361 // CHECK14-NEXT: br label [[SIMD_IF_END]]
4362 // CHECK14: simd.if.end:
4363 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4364 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 signext [[TMP28]])
4365 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4366 // CHECK14-NEXT: [[TMP29:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
4367 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP29]])
4368 // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
4369 // CHECK14-NEXT: ret i32 [[TMP30]]
4370 //
4371 //
4372 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
4373 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
4374 // CHECK14-NEXT: entry:
4375 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4376 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
4377 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4
4378 // CHECK14-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4379 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4380 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4381 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4382 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4
4383 // CHECK14-NEXT: [[J:%.*]] = alloca i32, align 4
4384 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4385 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4386 // CHECK14-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
4387 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4388 // CHECK14-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4389 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4390 // CHECK14: omp.inner.for.cond:
4391 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4392 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
4393 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4394 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4395 // CHECK14: omp.inner.for.body:
4396 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4397 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
4398 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
4399 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4400 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
4401 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4402 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4403 // CHECK14-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
4404 // CHECK14-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
4405 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
4406 // CHECK14-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
4407 // CHECK14-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
4408 // CHECK14-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !6
4409 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
4410 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
4411 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
4412 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !6
4413 // CHECK14-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP7]] to i64
4414 // CHECK14-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM6]]
4415 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !6
4416 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4417 // CHECK14: omp.body.continue:
4418 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4419 // CHECK14: omp.inner.for.inc:
4420 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4421 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
4422 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
4423 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
4424 // CHECK14: omp.inner.for.end:
4425 // CHECK14-NEXT: store i32 10, i32* [[I]], align 4
4426 // CHECK14-NEXT: store i32 2, i32* [[J]], align 4
4427 // CHECK14-NEXT: ret i32 0
4428 //
4429 //
4430 // CHECK15-LABEL: define {{[^@]+}}@main
4431 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4432 // CHECK15-NEXT: entry:
4433 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4434 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4435 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
4436 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
4437 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
4438 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4439 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4440 // CHECK15-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
4441 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
4442 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4443 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4444 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4445 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
4446 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
4447 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
4448 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
4449 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
4450 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
4451 // CHECK15-NEXT: [[I9:%.*]] = alloca i32, align 4
4452 // CHECK15-NEXT: [[J10:%.*]] = alloca i32, align 4
4453 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
4454 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4455 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
4456 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
4457 // CHECK15-NEXT: store i32 2, i32* [[M]], align 4
4458 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4459 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
4460 // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4461 // CHECK15-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
4462 // CHECK15-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
4463 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
4464 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4465 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
4466 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
4467 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
4468 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[M]], align 4
4469 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4470 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4471 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0
4472 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4473 // CHECK15-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
4474 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4475 // CHECK15-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP7]], 0
4476 // CHECK15-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
4477 // CHECK15-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
4478 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
4479 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
4480 // CHECK15-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
4481 // CHECK15-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
4482 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4483 // CHECK15-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_UB]], align 8
4484 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
4485 // CHECK15-NEXT: store i32 0, i32* [[J]], align 4
4486 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4487 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
4488 // CHECK15-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
4489 // CHECK15: land.lhs.true:
4490 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4491 // CHECK15-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP10]]
4492 // CHECK15-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
4493 // CHECK15: simd.if.then:
4494 // CHECK15-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
4495 // CHECK15-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_IV]], align 8
4496 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4497 // CHECK15: omp.inner.for.cond:
4498 // CHECK15-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4499 // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !3
4500 // CHECK15-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP12]], [[TMP13]]
4501 // CHECK15-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4502 // CHECK15: omp.inner.for.body:
4503 // CHECK15-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4504 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
4505 // CHECK15-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP15]], 0
4506 // CHECK15-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4507 // CHECK15-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
4508 // CHECK15-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
4509 // CHECK15-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP14]], [[CONV15]]
4510 // CHECK15-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
4511 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
4512 // CHECK15-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
4513 // CHECK15-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !3
4514 // CHECK15-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4515 // CHECK15-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4516 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
4517 // CHECK15-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP18]], 0
4518 // CHECK15-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
4519 // CHECK15-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
4520 // CHECK15-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
4521 // CHECK15-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP17]], [[CONV22]]
4522 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
4523 // CHECK15-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP19]], 0
4524 // CHECK15-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
4525 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
4526 // CHECK15-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
4527 // CHECK15-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
4528 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP16]], [[MUL28]]
4529 // CHECK15-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
4530 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
4531 // CHECK15-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
4532 // CHECK15-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !3
4533 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !3
4534 // CHECK15-NEXT: [[TMP21:%.*]] = mul nsw i32 [[TMP20]], [[TMP1]]
4535 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
4536 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !3
4537 // CHECK15-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP22]]
4538 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !3
4539 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4540 // CHECK15: omp.body.continue:
4541 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4542 // CHECK15: omp.inner.for.inc:
4543 // CHECK15-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4544 // CHECK15-NEXT: [[ADD34:%.*]] = add nsw i64 [[TMP23]], 1
4545 // CHECK15-NEXT: store i64 [[ADD34]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4546 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4547 // CHECK15: omp.inner.for.end:
4548 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4549 // CHECK15-NEXT: [[SUB35:%.*]] = sub nsw i32 [[TMP24]], 0
4550 // CHECK15-NEXT: [[DIV36:%.*]] = sdiv i32 [[SUB35]], 1
4551 // CHECK15-NEXT: [[MUL37:%.*]] = mul nsw i32 [[DIV36]], 1
4552 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 0, [[MUL37]]
4553 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[I9]], align 4
4554 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4555 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP25]], 0
4556 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
4557 // CHECK15-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
4558 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
4559 // CHECK15-NEXT: store i32 [[ADD42]], i32* [[J10]], align 4
4560 // CHECK15-NEXT: br label [[SIMD_IF_END]]
4561 // CHECK15: simd.if.end:
4562 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4563 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP26]])
4564 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4565 // CHECK15-NEXT: [[TMP27:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4566 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP27]])
4567 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
4568 // CHECK15-NEXT: ret i32 [[TMP28]]
4569 //
4570 //
4571 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
4572 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
4573 // CHECK15-NEXT: entry:
4574 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4575 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
4576 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
4577 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4578 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4579 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4580 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4581 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
4582 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
4583 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4584 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4585 // CHECK15-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
4586 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4587 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4588 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4589 // CHECK15: omp.inner.for.cond:
4590 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4591 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
4592 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4593 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4594 // CHECK15: omp.inner.for.body:
4595 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4596 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
4597 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
4598 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4599 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
4600 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4601 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4602 // CHECK15-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
4603 // CHECK15-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
4604 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
4605 // CHECK15-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
4606 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
4607 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !7
4608 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4609 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i32 0, i32 [[TMP6]]
4610 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !7
4611 // CHECK15-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
4612 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !7
4613 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4614 // CHECK15: omp.body.continue:
4615 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4616 // CHECK15: omp.inner.for.inc:
4617 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4618 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP8]], 1
4619 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4620 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
4621 // CHECK15: omp.inner.for.end:
4622 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
4623 // CHECK15-NEXT: store i32 2, i32* [[J]], align 4
4624 // CHECK15-NEXT: ret i32 0
4625 //
4626 //
4627 // CHECK16-LABEL: define {{[^@]+}}@main
4628 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4629 // CHECK16-NEXT: entry:
4630 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4631 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4632 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
4633 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4
4634 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4
4635 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
4636 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
4637 // CHECK16-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
4638 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
4639 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4640 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4641 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
4642 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
4643 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
4644 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
4645 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
4646 // CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4
4647 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
4648 // CHECK16-NEXT: [[I9:%.*]] = alloca i32, align 4
4649 // CHECK16-NEXT: [[J10:%.*]] = alloca i32, align 4
4650 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4
4651 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4652 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
4653 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4
4654 // CHECK16-NEXT: store i32 2, i32* [[M]], align 4
4655 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4656 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
4657 // CHECK16-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4658 // CHECK16-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
4659 // CHECK16-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
4660 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
4661 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
4662 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
4663 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
4664 // CHECK16-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
4665 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[M]], align 4
4666 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_2]], align 4
4667 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4668 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0
4669 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4670 // CHECK16-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
4671 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4672 // CHECK16-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP7]], 0
4673 // CHECK16-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
4674 // CHECK16-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
4675 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
4676 // CHECK16-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
4677 // CHECK16-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
4678 // CHECK16-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
4679 // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
4680 // CHECK16-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_UB]], align 8
4681 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4
4682 // CHECK16-NEXT: store i32 0, i32* [[J]], align 4
4683 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4684 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
4685 // CHECK16-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
4686 // CHECK16: land.lhs.true:
4687 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4688 // CHECK16-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP10]]
4689 // CHECK16-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
4690 // CHECK16: simd.if.then:
4691 // CHECK16-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
4692 // CHECK16-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_IV]], align 8
4693 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4694 // CHECK16: omp.inner.for.cond:
4695 // CHECK16-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4696 // CHECK16-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !3
4697 // CHECK16-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP12]], [[TMP13]]
4698 // CHECK16-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4699 // CHECK16: omp.inner.for.body:
4700 // CHECK16-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4701 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
4702 // CHECK16-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP15]], 0
4703 // CHECK16-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4704 // CHECK16-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
4705 // CHECK16-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
4706 // CHECK16-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP14]], [[CONV15]]
4707 // CHECK16-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
4708 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
4709 // CHECK16-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
4710 // CHECK16-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !3
4711 // CHECK16-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4712 // CHECK16-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4713 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
4714 // CHECK16-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP18]], 0
4715 // CHECK16-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
4716 // CHECK16-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
4717 // CHECK16-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
4718 // CHECK16-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP17]], [[CONV22]]
4719 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
4720 // CHECK16-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP19]], 0
4721 // CHECK16-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
4722 // CHECK16-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
4723 // CHECK16-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
4724 // CHECK16-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
4725 // CHECK16-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP16]], [[MUL28]]
4726 // CHECK16-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
4727 // CHECK16-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
4728 // CHECK16-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
4729 // CHECK16-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !3
4730 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !3
4731 // CHECK16-NEXT: [[TMP21:%.*]] = mul nsw i32 [[TMP20]], [[TMP1]]
4732 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
4733 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !3
4734 // CHECK16-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP22]]
4735 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !3
4736 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4737 // CHECK16: omp.body.continue:
4738 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4739 // CHECK16: omp.inner.for.inc:
4740 // CHECK16-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4741 // CHECK16-NEXT: [[ADD34:%.*]] = add nsw i64 [[TMP23]], 1
4742 // CHECK16-NEXT: store i64 [[ADD34]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
4743 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
4744 // CHECK16: omp.inner.for.end:
4745 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4746 // CHECK16-NEXT: [[SUB35:%.*]] = sub nsw i32 [[TMP24]], 0
4747 // CHECK16-NEXT: [[DIV36:%.*]] = sdiv i32 [[SUB35]], 1
4748 // CHECK16-NEXT: [[MUL37:%.*]] = mul nsw i32 [[DIV36]], 1
4749 // CHECK16-NEXT: [[ADD38:%.*]] = add nsw i32 0, [[MUL37]]
4750 // CHECK16-NEXT: store i32 [[ADD38]], i32* [[I9]], align 4
4751 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
4752 // CHECK16-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP25]], 0
4753 // CHECK16-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
4754 // CHECK16-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
4755 // CHECK16-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
4756 // CHECK16-NEXT: store i32 [[ADD42]], i32* [[J10]], align 4
4757 // CHECK16-NEXT: br label [[SIMD_IF_END]]
4758 // CHECK16: simd.if.end:
4759 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4760 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10ELi2EEiT_(i32 [[TMP26]])
4761 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4762 // CHECK16-NEXT: [[TMP27:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
4763 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP27]])
4764 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
4765 // CHECK16-NEXT: ret i32 [[TMP28]]
4766 //
4767 //
4768 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
4769 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
4770 // CHECK16-NEXT: entry:
4771 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4772 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
4773 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4
4774 // CHECK16-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4775 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4776 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4777 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4778 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4
4779 // CHECK16-NEXT: [[J:%.*]] = alloca i32, align 4
4780 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4781 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4782 // CHECK16-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
4783 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4784 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4785 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4786 // CHECK16: omp.inner.for.cond:
4787 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4788 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
4789 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4790 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4791 // CHECK16: omp.inner.for.body:
4792 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4793 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
4794 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
4795 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4796 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
4797 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4798 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4799 // CHECK16-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
4800 // CHECK16-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
4801 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
4802 // CHECK16-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
4803 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
4804 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !7
4805 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
4806 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i32 0, i32 [[TMP6]]
4807 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !7
4808 // CHECK16-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
4809 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !7
4810 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4811 // CHECK16: omp.body.continue:
4812 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4813 // CHECK16: omp.inner.for.inc:
4814 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4815 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP8]], 1
4816 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
4817 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
4818 // CHECK16: omp.inner.for.end:
4819 // CHECK16-NEXT: store i32 10, i32* [[I]], align 4
4820 // CHECK16-NEXT: store i32 2, i32* [[J]], align 4
4821 // CHECK16-NEXT: ret i32 0
4822 //
4823