1.. 2 ************************************************** 3 * * 4 * Automatically generated file, do not edit! * 5 * * 6 ************************************************** 7 8==================================================================================== 9Syntax of Core GFX10 Instructions 10==================================================================================== 11 12.. contents:: 13 :local: 14 15Introduction 16============ 17 18This document describes the syntax of *core* GFX10 instructions. 19 20Notation 21======== 22 23Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`. 24 25Overview 26======== 27 28An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this document<amdgpu_syn_instructions>`. 29 30Instructions 31============ 32 33 34DPP16 35----------------------- 36 37.. parsed-literal:: 38 39 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS** 40 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 41 v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 42 v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 43 v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 44 v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 45 v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 46 v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 47 v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 48 v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 49 v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 50 v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 51 v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 52 v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 53 v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 54 v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 55 v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 56 v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 57 v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 58 v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 59 v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 60 v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 61 v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 62 v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 63 v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 64 v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 65 v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 66 v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 67 v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 68 v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 69 v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 70 v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 71 v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 72 v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 73 v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 74 v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 75 v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 76 v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 77 v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 78 v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 79 v_fmac_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 80 v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 81 v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 82 v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 83 v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 84 v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 85 v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 86 v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 87 v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 88 v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 89 v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 90 v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 91 v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 92 v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 93 v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 94 v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 95 v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 96 v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 97 v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 98 v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 99 v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 100 v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 101 v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 102 v_movreld_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 103 v_movrels_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 104 v_movrelsd_2_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 105 v_movrelsd_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 106 v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 107 v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 108 v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 109 v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 110 v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 111 v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 112 v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 113 v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 114 v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 115 v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 116 v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 117 v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 118 v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 119 v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 120 v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 121 v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 122 v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 123 v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 124 v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 125 v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 126 v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 127 v_sub_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 128 v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 129 v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 130 v_sub_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 131 v_subrev_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 132 v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 133 v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 134 v_subrev_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 135 v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 136 v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 137 v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 138 v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp16_ctrl<amdgpu_synid_dpp16_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>` :ref:`fi<amdgpu_synid_fi16>` 139 140DPP8 141----------------------- 142 143.. parsed-literal:: 144 145 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS** 146 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 147 v_add_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 148 v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 149 v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 150 v_add_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 151 v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 152 v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 153 v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 154 v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 155 v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 156 v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 157 v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 158 v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 159 v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 160 v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 161 v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 162 v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 163 v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 164 v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 165 v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 166 v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 167 v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 168 v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 169 v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 170 v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 171 v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 172 v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 173 v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 174 v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 175 v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 176 v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 177 v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 178 v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 179 v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 180 v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 181 v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 182 v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 183 v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 184 v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 185 v_fmac_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 186 v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 187 v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 188 v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 189 v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 190 v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 191 v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 192 v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 193 v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 194 v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 195 v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 196 v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 197 v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 198 v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 199 v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 200 v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 201 v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 202 v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 203 v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 204 v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 205 v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 206 v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 207 v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 208 v_movreld_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 209 v_movrels_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 210 v_movrelsd_2_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 211 v_movrelsd_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 212 v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 213 v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 214 v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 215 v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 216 v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 217 v_mul_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 218 v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 219 v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 220 v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 221 v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 222 v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 223 v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 224 v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 225 v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 226 v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 227 v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 228 v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 229 v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 230 v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 231 v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 232 v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 233 v_sub_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 234 v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 235 v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 236 v_sub_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 237 v_subrev_co_ci_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 238 v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 239 v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 240 v_subrev_nc_u32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 241 v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 242 v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 243 v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 244 v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` :ref:`dpp8_sel<amdgpu_synid_dpp8_sel>` :ref:`fi<amdgpu_synid_fi8>` 245 246DS 247----------------------- 248 249.. parsed-literal:: 250 251 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS** 252 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 253 ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 254 ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 255 ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 256 ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 257 ds_add_src2_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 258 ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 259 ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 260 ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 261 ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 262 ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 263 ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 264 ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 265 ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 266 ds_and_src2_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 267 ds_and_src2_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 268 ds_append :ref:`vdst<amdgpu_synid_gfx10_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 269 ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` 270 ds_cmpst_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 271 ds_cmpst_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 272 ds_cmpst_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 273 ds_cmpst_f64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 274 ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 275 ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 276 ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 277 ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 278 ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 279 ds_consume :ref:`vdst<amdgpu_synid_gfx10_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 280 ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 281 ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 282 ds_dec_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 283 ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 284 ds_dec_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 285 ds_dec_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 286 ds_gws_barrier :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 287 ds_gws_init :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 288 ds_gws_sema_br :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 289 ds_gws_sema_p :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 290 ds_gws_sema_release_all :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 291 ds_gws_sema_v :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 292 ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 293 ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 294 ds_inc_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 295 ds_inc_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 296 ds_inc_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 297 ds_inc_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 298 ds_max_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 299 ds_max_f64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 300 ds_max_i32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 301 ds_max_i64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 302 ds_max_rtn_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 303 ds_max_rtn_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 304 ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 305 ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 306 ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 307 ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 308 ds_max_src2_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 309 ds_max_src2_f64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 310 ds_max_src2_i32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 311 ds_max_src2_i64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 312 ds_max_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 313 ds_max_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 314 ds_max_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 315 ds_max_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 316 ds_min_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 317 ds_min_f64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 318 ds_min_i32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 319 ds_min_i64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 320 ds_min_rtn_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 321 ds_min_rtn_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 322 ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 323 ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 324 ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 325 ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 326 ds_min_src2_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 327 ds_min_src2_f64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 328 ds_min_src2_i32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 329 ds_min_src2_i64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 330 ds_min_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 331 ds_min_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 332 ds_min_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 333 ds_min_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 334 ds_mskor_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 335 ds_mskor_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 336 ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 337 ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 338 ds_nop 339 ds_or_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 340 ds_or_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 341 ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 342 ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 343 ds_or_src2_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 344 ds_or_src2_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 345 ds_ordered_count :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 346 ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` 347 ds_read2_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 348 ds_read2_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 349 ds_read2st64_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 350 ds_read2st64_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 351 ds_read_addtid_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 352 ds_read_b128 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 353 ds_read_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 354 ds_read_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 355 ds_read_b96 :ref:`vdst<amdgpu_synid_gfx10_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 356 ds_read_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 357 ds_read_i8 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 358 ds_read_i8_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 359 ds_read_i8_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 360 ds_read_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 361 ds_read_u16_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 362 ds_read_u16_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 363 ds_read_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 364 ds_read_u8_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 365 ds_read_u8_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 366 ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 367 ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 368 ds_rsub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 369 ds_rsub_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 370 ds_rsub_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 371 ds_rsub_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 372 ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 373 ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 374 ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 375 ds_sub_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 376 ds_sub_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 377 ds_sub_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 378 ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>` 379 ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 380 ds_write2_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 381 ds_write2_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 382 ds_write2st64_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 383 ds_write2st64_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 384 ds_write_addtid_b32 :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 385 ds_write_b128 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 386 ds_write_b16 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 387 ds_write_b16_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 388 ds_write_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 389 ds_write_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 390 ds_write_b8 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 391 ds_write_b8_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 392 ds_write_b96 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_3>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 393 ds_write_src2_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 394 ds_write_src2_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 395 ds_wrxchg2_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 396 ds_wrxchg2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 397 ds_wrxchg2st64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 398 ds_wrxchg2st64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx10_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx10_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>` 399 ds_wrxchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 400 ds_wrxchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 401 ds_xor_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 402 ds_xor_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 403 ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 404 ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 405 ds_xor_src2_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 406 ds_xor_src2_b64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>` 407 408EXP 409----------------------- 410 411.. parsed-literal:: 412 413 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS** 414 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 415 exp :ref:`tgt<amdgpu_synid_gfx10_tgt>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_1>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_1>`, :ref:`vsrc3<amdgpu_synid_gfx10_vsrc_1>` :ref:`done<amdgpu_synid_done>` :ref:`compr<amdgpu_synid_compr>` :ref:`vm<amdgpu_synid_vm>` 416 417FLAT 418----------------------- 419 420.. parsed-literal:: 421 422 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS** 423 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 424 flat_atomic_add :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 425 flat_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 426 flat_atomic_and :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 427 flat_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 428 flat_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 429 flat_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 430 flat_atomic_dec :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 431 flat_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 432 flat_atomic_fcmpswap :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`f32x2<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 433 flat_atomic_fcmpswap_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`::ref:`f64x2<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 434 flat_atomic_fmax :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 435 flat_atomic_fmax_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 436 flat_atomic_fmin :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 437 flat_atomic_fmin_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 438 flat_atomic_inc :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 439 flat_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 440 flat_atomic_or :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 441 flat_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 442 flat_atomic_smax :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 443 flat_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 444 flat_atomic_smin :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 445 flat_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 446 flat_atomic_sub :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 447 flat_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 448 flat_atomic_swap :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 449 flat_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 450 flat_atomic_umax :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 451 flat_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 452 flat_atomic_umin :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 453 flat_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 454 flat_atomic_xor :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 455 flat_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 456 flat_load_dword :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 457 flat_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 458 flat_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx10_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 459 flat_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 460 flat_load_sbyte :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 461 flat_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 462 flat_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 463 flat_load_short_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 464 flat_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 465 flat_load_sshort :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 466 flat_load_ubyte :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 467 flat_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 468 flat_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 469 flat_load_ushort :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 470 flat_store_byte :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 471 flat_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 472 flat_store_dword :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 473 flat_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 474 flat_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_3>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 475 flat_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 476 flat_store_short :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 477 flat_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>` :ref:`offset11<amdgpu_synid_flat_offset11>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 478 global_atomic_add :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 479 global_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 480 global_atomic_and :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 481 global_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 482 global_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 483 global_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 484 global_atomic_dec :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 485 global_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 486 global_atomic_fmax :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 487 global_atomic_fmax_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 488 global_atomic_fmin :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 489 global_atomic_fmin_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 490 global_atomic_inc :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 491 global_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 492 global_atomic_or :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 493 global_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 494 global_atomic_smax :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 495 global_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 496 global_atomic_smin :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 497 global_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 498 global_atomic_sub :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 499 global_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 500 global_atomic_swap :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 501 global_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 502 global_atomic_umax :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 503 global_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 504 global_atomic_umin :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 505 global_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 506 global_atomic_xor :ref:`vdst<amdgpu_synid_gfx10_vdst_4>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 507 global_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx10_vdst_5>`::ref:`opt<amdgpu_synid_gfx10_opt>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 508 global_load_dword :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 509 global_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 510 global_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx10_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 511 global_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 512 global_load_sbyte :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 513 global_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 514 global_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 515 global_load_short_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 516 global_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 517 global_load_sshort :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 518 global_load_ubyte :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 519 global_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 520 global_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 521 global_load_ushort :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 522 global_store_byte :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 523 global_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 524 global_store_dword :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 525 global_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 526 global_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 527 global_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 528 global_store_short :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 529 global_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 530 scratch_load_dword :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 531 scratch_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 532 scratch_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx10_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 533 scratch_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 534 scratch_load_sbyte :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 535 scratch_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 536 scratch_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 537 scratch_load_short_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 538 scratch_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 539 scratch_load_sshort :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 540 scratch_load_ubyte :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 541 scratch_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 542 scratch_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 543 scratch_load_ushort :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 544 scratch_store_byte :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 545 scratch_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 546 scratch_store_dword :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 547 scratch_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 548 scratch_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_3>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 549 scratch_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 550 scratch_store_short :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 551 scratch_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx10_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`saddr<amdgpu_synid_gfx10_saddr_1>` :ref:`offset12s<amdgpu_synid_flat_offset12s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 552 553MIMG 554----------------------- 555 556.. parsed-literal:: 557 558 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS** 559 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 560 image_atomic_add :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 561 image_atomic_and :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 562 image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 563 image_atomic_dec :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 564 image_atomic_fcmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_5>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 565 image_atomic_fmax :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 566 image_atomic_fmin :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 567 image_atomic_inc :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 568 image_atomic_or :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 569 image_atomic_smax :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 570 image_atomic_smin :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 571 image_atomic_sub :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 572 image_atomic_swap :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 573 image_atomic_umax :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 574 image_atomic_umin :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 575 image_atomic_xor :ref:`vdata<amdgpu_synid_gfx10_vdata_4>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 576 image_gather4 :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 577 image_gather4_b :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 578 image_gather4_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 579 image_gather4_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 580 image_gather4_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 581 image_gather4_c :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 582 image_gather4_c_b :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 583 image_gather4_c_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 584 image_gather4_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 585 image_gather4_c_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 586 image_gather4_c_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 587 image_gather4_c_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 588 image_gather4_c_l :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 589 image_gather4_c_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 590 image_gather4_c_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 591 image_gather4_c_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 592 image_gather4_c_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 593 image_gather4_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 594 image_gather4_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 595 image_gather4_l :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 596 image_gather4_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 597 image_gather4_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 598 image_gather4_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 599 image_gather4_o :ref:`vdst<amdgpu_synid_gfx10_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 600 image_get_lod :ref:`vdst<amdgpu_synid_gfx10_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` 601 image_get_resinfo :ref:`vdst<amdgpu_synid_gfx10_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` 602 image_load :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 603 image_load_mip :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 604 image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx10_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` 605 image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx10_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` 606 image_load_pck :ref:`vdst<amdgpu_synid_gfx10_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` 607 image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx10_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` 608 image_sample :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 609 image_sample_b :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 610 image_sample_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 611 image_sample_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 612 image_sample_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 613 image_sample_c :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 614 image_sample_c_b :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 615 image_sample_c_b_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 616 image_sample_c_b_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 617 image_sample_c_b_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 618 image_sample_c_cd :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 619 image_sample_c_cd_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 620 image_sample_c_cd_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 621 image_sample_c_cd_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 622 image_sample_c_cd_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 623 image_sample_c_cd_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 624 image_sample_c_cd_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 625 image_sample_c_cd_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 626 image_sample_c_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 627 image_sample_c_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 628 image_sample_c_d :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 629 image_sample_c_d_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 630 image_sample_c_d_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 631 image_sample_c_d_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 632 image_sample_c_d_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 633 image_sample_c_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 634 image_sample_c_d_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 635 image_sample_c_d_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 636 image_sample_c_l :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 637 image_sample_c_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 638 image_sample_c_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 639 image_sample_c_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 640 image_sample_c_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 641 image_sample_cd :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 642 image_sample_cd_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 643 image_sample_cd_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 644 image_sample_cd_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 645 image_sample_cd_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 646 image_sample_cd_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 647 image_sample_cd_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 648 image_sample_cd_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 649 image_sample_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 650 image_sample_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 651 image_sample_d :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 652 image_sample_d_cl :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 653 image_sample_d_cl_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 654 image_sample_d_cl_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 655 image_sample_d_cl_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 656 image_sample_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 657 image_sample_d_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 658 image_sample_d_o_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 659 image_sample_l :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 660 image_sample_l_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 661 image_sample_lz :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 662 image_sample_lz_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 663 image_sample_o :ref:`vdst<amdgpu_synid_gfx10_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx10_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`tfe<amdgpu_synid_tfe>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 664 image_store :ref:`vdata<amdgpu_synid_gfx10_vdata_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 665 image_store_mip :ref:`vdata<amdgpu_synid_gfx10_vdata_6>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`d16<amdgpu_synid_d16>` 666 image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx10_vdata_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 667 image_store_pck :ref:`vdata<amdgpu_synid_gfx10_vdata_7>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`dim<amdgpu_synid_dim>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` 668 669MTBUF 670----------------------- 671 672.. parsed-literal:: 673 674 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS** 675 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 676 tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 677 tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 678 tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 679 tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 680 tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 681 tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 682 tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 683 tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 684 tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 685 tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 686 tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 687 tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 688 tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 689 tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 690 tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 691 tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`ufmt<amdgpu_synid_ufmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 692 693MUBUF 694----------------------- 695 696.. parsed-literal:: 697 698 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS** 699 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 700 buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 701 buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 702 buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 703 buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 704 buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 705 buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_10>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 706 buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 707 buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 708 buffer_atomic_fcmpswap :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 709 buffer_atomic_fcmpswap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_10>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 710 buffer_atomic_fmax :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 711 buffer_atomic_fmax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 712 buffer_atomic_fmin :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 713 buffer_atomic_fmin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`f64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 714 buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 715 buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 716 buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 717 buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 718 buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 719 buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 720 buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 721 buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 722 buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 723 buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 724 buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 725 buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 726 buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 727 buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 728 buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 729 buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 730 buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx10_vdata_8>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 731 buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx10_vdata_9>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 732 buffer_gl0_inv 733 buffer_gl1_inv 734 buffer_load_dword :ref:`vdst<amdgpu_synid_gfx10_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` 735 buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 736 buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx10_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 737 buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx10_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 738 buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 739 buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 740 buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 741 buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 742 buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx10_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` 743 buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx10_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 744 buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx10_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 745 buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx10_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 746 buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx10_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` 747 buffer_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 748 buffer_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 749 buffer_load_short_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 750 buffer_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 751 buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx10_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` 752 buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx10_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` 753 buffer_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 754 buffer_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx10_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` 755 buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx10_vdst_13>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`dlc<amdgpu_synid_dlc>` :ref:`lds<amdgpu_synid_lds>` 756 buffer_store_byte :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 757 buffer_store_byte_d16_hi :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 758 buffer_store_dword :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 759 buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 760 buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx10_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 761 buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 762 buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 763 buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 764 buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 765 buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 766 buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 767 buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx10_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 768 buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx10_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 769 buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx10_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 770 buffer_store_short :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 771 buffer_store_short_d16_hi :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`vaddr<amdgpu_synid_gfx10_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx10_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` 772 773SDWA 774----------------------- 775 776.. parsed-literal:: 777 778 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS** 779 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 780 v_add_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 781 v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 782 v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 783 v_add_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 784 v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 785 v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 786 v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 787 v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 788 v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 789 v_cmp_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 790 v_cmp_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 791 v_cmp_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 792 v_cmp_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 793 v_cmp_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 794 v_cmp_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 795 v_cmp_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 796 v_cmp_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 797 v_cmp_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 798 v_cmp_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 799 v_cmp_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 800 v_cmp_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 801 v_cmp_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 802 v_cmp_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 803 v_cmp_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 804 v_cmp_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 805 v_cmp_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 806 v_cmp_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 807 v_cmp_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 808 v_cmp_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 809 v_cmp_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 810 v_cmp_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 811 v_cmp_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 812 v_cmp_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 813 v_cmp_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 814 v_cmp_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 815 v_cmp_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 816 v_cmp_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 817 v_cmp_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 818 v_cmp_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 819 v_cmp_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 820 v_cmp_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 821 v_cmp_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 822 v_cmp_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 823 v_cmp_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 824 v_cmp_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 825 v_cmp_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 826 v_cmp_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 827 v_cmp_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 828 v_cmp_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 829 v_cmp_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 830 v_cmp_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 831 v_cmp_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 832 v_cmp_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 833 v_cmp_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 834 v_cmp_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 835 v_cmp_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 836 v_cmp_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 837 v_cmp_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 838 v_cmp_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 839 v_cmp_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 840 v_cmp_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 841 v_cmp_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 842 v_cmp_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 843 v_cmp_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 844 v_cmp_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 845 v_cmp_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 846 v_cmp_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 847 v_cmp_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 848 v_cmp_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 849 v_cmp_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 850 v_cmp_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 851 v_cmpx_class_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 852 v_cmpx_class_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 853 v_cmpx_eq_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 854 v_cmpx_eq_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 855 v_cmpx_eq_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 856 v_cmpx_eq_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 857 v_cmpx_eq_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 858 v_cmpx_eq_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 859 v_cmpx_f_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 860 v_cmpx_f_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 861 v_cmpx_f_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 862 v_cmpx_f_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 863 v_cmpx_ge_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 864 v_cmpx_ge_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 865 v_cmpx_ge_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 866 v_cmpx_ge_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 867 v_cmpx_ge_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 868 v_cmpx_ge_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 869 v_cmpx_gt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 870 v_cmpx_gt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 871 v_cmpx_gt_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 872 v_cmpx_gt_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 873 v_cmpx_gt_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 874 v_cmpx_gt_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 875 v_cmpx_le_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 876 v_cmpx_le_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 877 v_cmpx_le_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 878 v_cmpx_le_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 879 v_cmpx_le_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 880 v_cmpx_le_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 881 v_cmpx_lg_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 882 v_cmpx_lg_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 883 v_cmpx_lt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 884 v_cmpx_lt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 885 v_cmpx_lt_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 886 v_cmpx_lt_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 887 v_cmpx_lt_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 888 v_cmpx_lt_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 889 v_cmpx_ne_i16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 890 v_cmpx_ne_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 891 v_cmpx_ne_u16_sdwa :ref:`src0<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 892 v_cmpx_ne_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 893 v_cmpx_neq_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 894 v_cmpx_neq_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 895 v_cmpx_nge_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 896 v_cmpx_nge_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 897 v_cmpx_ngt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 898 v_cmpx_ngt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 899 v_cmpx_nle_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 900 v_cmpx_nle_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 901 v_cmpx_nlg_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 902 v_cmpx_nlg_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 903 v_cmpx_nlt_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 904 v_cmpx_nlt_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 905 v_cmpx_o_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 906 v_cmpx_o_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 907 v_cmpx_t_i32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 908 v_cmpx_t_u32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 909 v_cmpx_tru_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 910 v_cmpx_tru_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 911 v_cmpx_u_f16_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 912 v_cmpx_u_f32_sdwa :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 913 v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 914 v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 915 v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 916 v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 917 v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 918 v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_1>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 919 v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 920 v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 921 v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 922 v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 923 v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 924 v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 925 v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 926 v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 927 v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 928 v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 929 v_cvt_norm_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 930 v_cvt_norm_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 931 v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 932 v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 933 v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 934 v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 935 v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 936 v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 937 v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 938 v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 939 v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 940 v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 941 v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 942 v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 943 v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 944 v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 945 v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 946 v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 947 v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 948 v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 949 v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 950 v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 951 v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 952 v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 953 v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 954 v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 955 v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 956 v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 957 v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 958 v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 959 v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 960 v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 961 v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 962 v_movreld_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 963 v_movrels_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 964 v_movrelsd_2_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 965 v_movrelsd_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 966 v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 967 v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 968 v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 969 v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 970 v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 971 v_mul_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 972 v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 973 v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 974 v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 975 v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 976 v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 977 v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 978 v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 979 v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 980 v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 981 v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 982 v_sat_pk_u8_i16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 983 v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 984 v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 985 v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 986 v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 987 v_sub_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 988 v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 989 v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 990 v_sub_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 991 v_subrev_co_ci_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 992 v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 993 v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 994 v_subrev_nc_u32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 995 v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 996 v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` 997 v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 998 v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>`, :ref:`src1<amdgpu_synid_gfx10_src>`::ref:`m<amdgpu_synid_gfx10_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>` 999 1000SMEM 1001----------------------- 1002 1003.. parsed-literal:: 1004 1005 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS** 1006 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1007 s_atc_probe :ref:`probe<amdgpu_synid_gfx10_probe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` 1008 s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx10_probe>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` 1009 s_atomic_add :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1010 s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1011 s_atomic_and :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1012 s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1013 s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1014 s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_2>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1015 s_atomic_dec :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1016 s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1017 s_atomic_inc :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1018 s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1019 s_atomic_or :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1020 s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1021 s_atomic_smax :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1022 s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1023 s_atomic_smin :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1024 s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1025 s_atomic_sub :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1026 s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1027 s_atomic_swap :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1028 s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1029 s_atomic_umax :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1030 s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1031 s_atomic_umin :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1032 s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1033 s_atomic_xor :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1034 s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1035 s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1036 s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1037 s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1038 s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1039 s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b32x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1040 s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_2>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`b64x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1041 s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1042 s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1043 s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1044 s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1045 s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1046 s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1047 s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1048 s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1049 s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1050 s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1051 s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1052 s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1053 s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1054 s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1055 s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1056 s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1057 s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1058 s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1059 s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx10_sdata>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1060 s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx10_sdata_1>`::ref:`dst<amdgpu_synid_gfx10_dst>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1061 s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1062 s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx10_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1063 s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1064 s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx10_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1065 s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx10_sdst_5>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1066 s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx10_sdata_3>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1067 s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx10_sdata_4>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1068 s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx10_sdata_5>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_2>` :ref:`glc<amdgpu_synid_glc>` 1069 s_dcache_discard :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` 1070 s_dcache_discard_x2 :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` 1071 s_dcache_inv 1072 s_dcache_wb 1073 s_get_waveid_in_workgroup :ref:`sdst<amdgpu_synid_gfx10_sdst_1>` 1074 s_gl1_inv 1075 s_load_dword :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1076 s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx10_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1077 s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1078 s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx10_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1079 s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx10_sdst_5>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1080 s_memrealtime :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`::ref:`b64<amdgpu_synid_gfx10_type_deviation>` 1081 s_memtime :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`::ref:`b64<amdgpu_synid_gfx10_type_deviation>` 1082 s_scratch_load_dword :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1083 s_scratch_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1084 s_scratch_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx10_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` :ref:`dlc<amdgpu_synid_dlc>` 1085 s_scratch_store_dword :ref:`sdata<amdgpu_synid_gfx10_sdata_3>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1086 s_scratch_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx10_sdata_4>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1087 s_scratch_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx10_sdata_5>`, :ref:`sbase<amdgpu_synid_gfx10_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1088 s_store_dword :ref:`sdata<amdgpu_synid_gfx10_sdata_3>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1089 s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx10_sdata_4>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1090 s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx10_sdata_5>`, :ref:`sbase<amdgpu_synid_gfx10_sbase>`, :ref:`soffset<amdgpu_synid_gfx10_soffset_1>` :ref:`glc<amdgpu_synid_glc>` 1091 1092SOP1 1093----------------------- 1094 1095.. parsed-literal:: 1096 1097 **INSTRUCTION** **DST** **SRC** 1098 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1099 s_abs_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1100 s_and_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1101 s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1102 s_andn1_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1103 s_andn1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1104 s_andn1_wrexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1105 s_andn1_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1106 s_andn2_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1107 s_andn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1108 s_andn2_wrexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1109 s_andn2_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1110 s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1111 s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1112 s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1113 s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1114 s_bitreplicate_b64_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1115 s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1116 s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1117 s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1118 s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1119 s_brev_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1120 s_brev_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1121 s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1122 s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1123 s_ff0_i32_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1124 s_ff0_i32_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1125 s_ff1_i32_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1126 s_ff1_i32_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1127 s_flbit_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1128 s_flbit_i32_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1129 s_flbit_i32_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1130 s_flbit_i32_i64 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1131 s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>` 1132 s_mov_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1133 s_mov_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1134 s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1135 s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1136 s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_2>` 1137 s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_3>` 1138 s_movrelsd_2_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_2>` 1139 s_nand_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1140 s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1141 s_nor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1142 s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1143 s_not_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1144 s_not_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1145 s_or_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1146 s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1147 s_orn1_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1148 s_orn1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1149 s_orn2_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1150 s_orn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1151 s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1152 s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1153 s_rfe_b64 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_3>` 1154 s_setpc_b64 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_3>` 1155 s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1156 s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1157 s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_3>` 1158 s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1159 s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1160 s_xnor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1161 s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1162 s_xor_saveexec_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_1>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc>` 1163 s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_3>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_1>` 1164 1165SOP2 1166----------------------- 1167 1168.. parsed-literal:: 1169 1170 **INSTRUCTION** **DST** **SRC0** **SRC1** 1171 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1172 s_absdiff_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1173 s_add_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1174 s_add_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1175 s_addc_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1176 s_and_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1177 s_and_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1178 s_andn2_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1179 s_andn2_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1180 s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1181 s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1182 s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1183 s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1184 s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1185 s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1186 s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1187 s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1188 s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1189 s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1190 s_lshl1_add_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1191 s_lshl2_add_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1192 s_lshl3_add_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1193 s_lshl4_add_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1194 s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1195 s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1196 s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1197 s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1198 s_max_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1199 s_max_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1200 s_min_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1201 s_min_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1202 s_mul_hi_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1203 s_mul_hi_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1204 s_mul_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1205 s_nand_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1206 s_nand_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1207 s_nor_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1208 s_nor_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1209 s_or_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1210 s_or_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1211 s_orn2_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1212 s_orn2_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1213 s_pack_hh_b32_b16 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1214 s_pack_lh_b32_b16 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1215 s_pack_ll_b32_b16 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1216 s_sub_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1217 s_sub_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1218 s_subb_u32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1219 s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1220 s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1221 s_xor_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1222 s_xor_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1223 1224SOPC 1225----------------------- 1226 1227.. parsed-literal:: 1228 1229 **INSTRUCTION** **SRC0** **SRC1** 1230 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1231 s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1232 s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1233 s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1234 s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1235 s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1236 s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1237 s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1238 s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1239 s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1240 s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1241 s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1242 s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1243 s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1244 s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1245 s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1246 s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_1>` 1247 s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1248 s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx10_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc>` 1249 1250SOPK 1251----------------------- 1252 1253.. parsed-literal:: 1254 1255 **INSTRUCTION** **DST** **SRC0** **SRC1** 1256 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1257 s_addk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1258 s_call_b64 :ref:`sdst<amdgpu_synid_gfx10_sdst_7>`, :ref:`label<amdgpu_synid_gfx10_label>` 1259 s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1260 s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1261 s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_1>` 1262 s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1263 s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_1>` 1264 s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1265 s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_1>` 1266 s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1267 s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_1>` 1268 s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1269 s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_1>` 1270 s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1271 s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_1>` 1272 s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`hwreg<amdgpu_synid_gfx10_hwreg>` 1273 s_movk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1274 s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`imm16<amdgpu_synid_gfx10_imm16>` 1275 s_setreg_b32 :ref:`hwreg<amdgpu_synid_gfx10_hwreg>`, :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>` 1276 s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid_gfx10_hwreg>`, :ref:`simm32<amdgpu_synid_gfx10_simm32>` 1277 s_subvector_loop_begin :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`label<amdgpu_synid_gfx10_label>` 1278 s_subvector_loop_end :ref:`sdst<amdgpu_synid_gfx10_sdst_6>`, :ref:`label<amdgpu_synid_gfx10_label>` 1279 s_version :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1280 s_waitcnt_expcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1281 s_waitcnt_lgkmcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1282 s_waitcnt_vmcnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1283 s_waitcnt_vscnt :ref:`ssrc<amdgpu_synid_gfx10_ssrc_4>`, :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1284 1285SOPP 1286----------------------- 1287 1288.. parsed-literal:: 1289 1290 **INSTRUCTION** **SRC** 1291 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1292 s_barrier 1293 s_branch :ref:`label<amdgpu_synid_gfx10_label>` 1294 s_cbranch_cdbgsys :ref:`label<amdgpu_synid_gfx10_label>` 1295 s_cbranch_cdbgsys_and_user :ref:`label<amdgpu_synid_gfx10_label>` 1296 s_cbranch_cdbgsys_or_user :ref:`label<amdgpu_synid_gfx10_label>` 1297 s_cbranch_cdbguser :ref:`label<amdgpu_synid_gfx10_label>` 1298 s_cbranch_execnz :ref:`label<amdgpu_synid_gfx10_label>` 1299 s_cbranch_execz :ref:`label<amdgpu_synid_gfx10_label>` 1300 s_cbranch_scc0 :ref:`label<amdgpu_synid_gfx10_label>` 1301 s_cbranch_scc1 :ref:`label<amdgpu_synid_gfx10_label>` 1302 s_cbranch_vccnz :ref:`label<amdgpu_synid_gfx10_label>` 1303 s_cbranch_vccz :ref:`label<amdgpu_synid_gfx10_label>` 1304 s_clause :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1305 s_code_end 1306 s_decperflevel :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1307 s_denorm_mode :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1308 s_endpgm 1309 s_endpgm_ordered_ps_done 1310 s_endpgm_saved 1311 s_icache_inv 1312 s_incperflevel :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1313 s_inst_prefetch :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1314 s_nop :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1315 s_round_mode :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1316 s_sendmsg :ref:`msg<amdgpu_synid_gfx10_msg>` 1317 s_sendmsghalt :ref:`msg<amdgpu_synid_gfx10_msg>` 1318 s_sethalt :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1319 s_setkill :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1320 s_setprio :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1321 s_sleep :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1322 s_trap :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1323 s_ttracedata 1324 s_ttracedata_imm :ref:`imm16<amdgpu_synid_gfx10_imm16_2>` 1325 s_waitcnt :ref:`waitcnt<amdgpu_synid_gfx10_waitcnt>` 1326 s_wakeup 1327 1328VINTRP 1329----------------------- 1330 1331.. parsed-literal:: 1332 1333 **INSTRUCTION** **DST** **SRC0** **SRC1** 1334 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1335 v_interp_mov_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`param<amdgpu_synid_gfx10_param>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1336 v_interp_p1_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1337 v_interp_p2_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1338 1339VOP1 1340----------------------- 1341 1342.. parsed-literal:: 1343 1344 **INSTRUCTION** **DST** **SRC** 1345 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1346 v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1347 v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1348 v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1349 v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1350 v_clrexcp 1351 v_cos_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1352 v_cos_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1353 v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1354 v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_4>` 1355 v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_4>` 1356 v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1357 v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1358 v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1359 v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1360 v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1361 v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1362 v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1363 v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1364 v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1365 v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1366 v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1367 v_cvt_flr_i32_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1368 v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1369 v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1370 v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1371 v_cvt_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1372 v_cvt_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1373 v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1374 v_cvt_rpi_i32_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1375 v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1376 v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1377 v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1378 v_exp_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1379 v_exp_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1380 v_ffbh_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1381 v_ffbh_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1382 v_ffbl_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1383 v_floor_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1384 v_floor_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1385 v_floor_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1386 v_fract_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1387 v_fract_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1388 v_fract_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1389 v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1390 v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1391 v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1392 v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1393 v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1394 v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1395 v_log_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1396 v_log_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1397 v_mov_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1398 v_movreld_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1399 v_movrels_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1400 v_movrelsd_2_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1401 v_movrelsd_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1402 v_nop 1403 v_not_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1404 v_pipeflush 1405 v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1406 v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1407 v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1408 v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1409 v_readfirstlane_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8>`, :ref:`src<amdgpu_synid_gfx10_src_5>` 1410 v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1411 v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1412 v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1413 v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1414 v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1415 v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1416 v_sat_pk_u8_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1417 v_sin_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1418 v_sin_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1419 v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1420 v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1421 v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1422 v_swap_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1423 v_swaprel_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1424 v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1425 v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1426 v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>` 1427 1428VOP2 1429----------------------- 1430 1431.. parsed-literal:: 1432 1433 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** 1434 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1435 v_add_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` 1436 v_add_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1437 v_add_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1438 v_add_nc_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1439 v_and_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1440 v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1441 v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` 1442 v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` 1443 v_fmaak_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_7>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_1>` 1444 v_fmaak_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_7>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_2>` 1445 v_fmac_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1446 v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1447 v_fmamk_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_7>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_1>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc>` 1448 v_fmamk_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_7>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_2>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc>` 1449 v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` 1450 v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1451 v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1452 v_mac_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1453 v_mac_legacy_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1454 v_madak_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_7>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_2>` 1455 v_madmk_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_7>`, :ref:`simm32<amdgpu_synid_gfx10_simm32_2>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc>` 1456 v_max_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1457 v_max_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1458 v_max_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1459 v_max_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1460 v_min_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1461 v_min_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1462 v_min_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1463 v_min_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1464 v_mul_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1465 v_mul_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1466 v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1467 v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1468 v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1469 v_mul_legacy_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1470 v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1471 v_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1472 v_pk_fmac_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1473 v_sub_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` 1474 v_sub_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1475 v_sub_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1476 v_sub_nc_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1477 v_subrev_co_ci_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>` 1478 v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1479 v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1480 v_subrev_nc_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1481 v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1482 v_xor_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1483 1484VOP3 1485----------------------- 1486 1487.. parsed-literal:: 1488 1489 **INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS** 1490 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1491 v_add3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1492 v_add_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_5>` :ref:`clamp<amdgpu_synid_clamp>` 1493 v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1494 v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1495 v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1496 v_add_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1497 v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1498 v_add_nc_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1499 v_add_nc_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1500 v_add_nc_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`clamp<amdgpu_synid_clamp>` 1501 v_add_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1502 v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_8>`::ref:`b16<amdgpu_synid_gfx10_type_deviation>` 1503 v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_8>`::ref:`b16<amdgpu_synid_gfx10_type_deviation>` 1504 v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1505 v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1506 v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_8>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1507 v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1508 v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1509 v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1510 v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1511 v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1512 v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1513 v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1514 v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1515 v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1516 v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1517 v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1518 v_clrexcp_e64 1519 v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1520 v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1521 v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1522 v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1523 v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1524 v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1525 v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1526 v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1527 v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1528 v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1529 v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1530 v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1531 v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1532 v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1533 v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1534 v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1535 v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1536 v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1537 v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1538 v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1539 v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1540 v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1541 v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1542 v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1543 v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1544 v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1545 v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1546 v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1547 v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1548 v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1549 v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1550 v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1551 v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1552 v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1553 v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1554 v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1555 v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1556 v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1557 v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1558 v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1559 v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1560 v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1561 v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1562 v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1563 v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1564 v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1565 v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1566 v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1567 v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1568 v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1569 v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1570 v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1571 v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1572 v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1573 v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1574 v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1575 v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1576 v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1577 v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1578 v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1579 v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1580 v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1581 v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1582 v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1583 v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1584 v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1585 v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1586 v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1587 v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1588 v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1589 v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1590 v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1591 v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1592 v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1593 v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1594 v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1595 v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1596 v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1597 v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1598 v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1599 v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1600 v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1601 v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1602 v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1603 v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1604 v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1605 v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1606 v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1607 v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1608 v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1609 v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1610 v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1611 v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1612 v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1613 v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1614 v_cmpx_class_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1615 v_cmpx_class_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1616 v_cmpx_class_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1617 v_cmpx_eq_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1618 v_cmpx_eq_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1619 v_cmpx_eq_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1620 v_cmpx_eq_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1621 v_cmpx_eq_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1622 v_cmpx_eq_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1623 v_cmpx_eq_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1624 v_cmpx_eq_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1625 v_cmpx_eq_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1626 v_cmpx_f_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1627 v_cmpx_f_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1628 v_cmpx_f_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1629 v_cmpx_f_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1630 v_cmpx_f_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1631 v_cmpx_f_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1632 v_cmpx_f_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1633 v_cmpx_ge_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1634 v_cmpx_ge_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1635 v_cmpx_ge_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1636 v_cmpx_ge_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1637 v_cmpx_ge_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1638 v_cmpx_ge_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1639 v_cmpx_ge_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1640 v_cmpx_ge_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1641 v_cmpx_ge_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1642 v_cmpx_gt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1643 v_cmpx_gt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1644 v_cmpx_gt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1645 v_cmpx_gt_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1646 v_cmpx_gt_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1647 v_cmpx_gt_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1648 v_cmpx_gt_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1649 v_cmpx_gt_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1650 v_cmpx_gt_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1651 v_cmpx_le_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1652 v_cmpx_le_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1653 v_cmpx_le_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1654 v_cmpx_le_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1655 v_cmpx_le_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1656 v_cmpx_le_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1657 v_cmpx_le_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1658 v_cmpx_le_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1659 v_cmpx_le_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1660 v_cmpx_lg_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1661 v_cmpx_lg_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1662 v_cmpx_lg_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1663 v_cmpx_lt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1664 v_cmpx_lt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1665 v_cmpx_lt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1666 v_cmpx_lt_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1667 v_cmpx_lt_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1668 v_cmpx_lt_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1669 v_cmpx_lt_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1670 v_cmpx_lt_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1671 v_cmpx_lt_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1672 v_cmpx_ne_i16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1673 v_cmpx_ne_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1674 v_cmpx_ne_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1675 v_cmpx_ne_u16_e64 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1676 v_cmpx_ne_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1677 v_cmpx_ne_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1678 v_cmpx_neq_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1679 v_cmpx_neq_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1680 v_cmpx_neq_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1681 v_cmpx_nge_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1682 v_cmpx_nge_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1683 v_cmpx_nge_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1684 v_cmpx_ngt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1685 v_cmpx_ngt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1686 v_cmpx_ngt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1687 v_cmpx_nle_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1688 v_cmpx_nle_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1689 v_cmpx_nle_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1690 v_cmpx_nlg_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1691 v_cmpx_nlg_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1692 v_cmpx_nlg_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1693 v_cmpx_nlt_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1694 v_cmpx_nlt_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1695 v_cmpx_nlt_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1696 v_cmpx_o_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1697 v_cmpx_o_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1698 v_cmpx_o_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1699 v_cmpx_t_i32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1700 v_cmpx_t_i64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1701 v_cmpx_t_u32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1702 v_cmpx_t_u64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1703 v_cmpx_tru_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1704 v_cmpx_tru_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1705 v_cmpx_tru_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1706 v_cmpx_u_f16_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1707 v_cmpx_u_f32_e64 :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1708 v_cmpx_u_f64_e64 :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1709 v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_5>` 1710 v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1711 v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1712 v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1713 v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1714 v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1715 v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1716 v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1717 v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1718 v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1719 v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1720 v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1721 v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1722 v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1723 v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1724 v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1725 v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1726 v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1727 v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1728 v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1729 v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1730 v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` 1731 v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1732 v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1733 v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1734 v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1735 v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1736 v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1737 v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` 1738 v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1739 v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` 1740 v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1741 v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` 1742 v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f16<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1743 v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` 1744 v_cvt_pkrtz_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1745 v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` 1746 v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1747 v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1748 v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` 1749 v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1750 v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1751 v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1752 v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1753 v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1754 v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1755 v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`, :ref:`src2<amdgpu_synid_gfx10_src_3>` 1756 v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1757 v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1758 v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1759 v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1760 v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1761 v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1762 v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1763 v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1764 v_fma_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1765 v_fma_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1766 v_fma_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1767 v_fmac_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1768 v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1769 v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1770 v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1771 v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1772 v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` 1773 v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` 1774 v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` 1775 v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1776 v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1777 v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1778 v_interp_mov_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`param<amdgpu_synid_gfx10_param>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1779 v_interp_p1_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1780 v_interp_p1ll_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1781 v_interp_p1lv_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f16x2<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1782 v_interp_p2_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc0<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`f32<amdgpu_synid_gfx10_type_deviation>` :ref:`high<amdgpu_synid_high>` :ref:`clamp<amdgpu_synid_clamp>` 1783 v_interp_p2_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`attr<amdgpu_synid_gfx10_attr>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1784 v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`i16<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1785 v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1786 v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1787 v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1788 v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1789 v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1790 v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1791 v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1792 v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_8>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1793 v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1794 v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1795 v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_8>`::ref:`u16<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1796 v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1797 v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_3>` 1798 v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1799 v_mac_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1800 v_mad_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1801 v_mad_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1802 v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1803 v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`i32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1804 v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`i64<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1805 v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1806 v_mad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1807 v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1808 v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1809 v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`u64<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1810 v_max3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1811 v_max3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1812 v_max3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1813 v_max3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1814 v_max3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1815 v_max3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1816 v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1817 v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1818 v_max_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1819 v_max_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1820 v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1821 v_max_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1822 v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1823 v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1824 v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1825 v_med3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1826 v_med3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1827 v_med3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1828 v_med3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1829 v_med3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1830 v_med3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1831 v_min3_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1832 v_min3_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1833 v_min3_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1834 v_min3_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1835 v_min3_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1836 v_min3_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1837 v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1838 v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1839 v_min_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1840 v_min_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1841 v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1842 v_min_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1843 v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1844 v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1845 v_movreld_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1846 v_movrels_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1847 v_movrelsd_2_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1848 v_movrelsd_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vsrc<amdgpu_synid_gfx10_vsrc>` 1849 v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1850 v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_2>`::ref:`u32x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx10_vsrc_2>`::ref:`u32x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1851 v_msad_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1852 v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1853 v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1854 v_mul_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1855 v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1856 v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1857 v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1858 v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1859 v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1860 v_mul_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1861 v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` 1862 v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1863 v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1864 v_mullit_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1865 v_nop_e64 1866 v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1867 v_or3_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1868 v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1869 v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` 1870 v_perm_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1871 v_permlane16_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_6>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_6>` :ref:`dpp_op_sel<amdgpu_synid_dpp_op_sel>` 1872 v_permlanex16_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`vdata<amdgpu_synid_gfx10_vdata>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_6>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_6>` :ref:`dpp_op_sel<amdgpu_synid_dpp_op_sel>` 1873 v_pipeflush_e64 1874 v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`u8x8<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_3>`::ref:`u16x4<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1875 v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1876 v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1877 v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1878 v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1879 v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx10_sdst_8>`, :ref:`src0<amdgpu_synid_gfx10_src_5>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_7>` 1880 v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1881 v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1882 v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1883 v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1884 v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1885 v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1886 v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1887 v_sad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1888 v_sad_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1889 v_sad_u8 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` 1890 v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`::ref:`u8x4<amdgpu_synid_gfx10_type_deviation>`, :ref:`src<amdgpu_synid_gfx10_src_2>` 1891 v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1892 v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1893 v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1894 v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1895 v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1896 v_sub_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_5>` :ref:`clamp<amdgpu_synid_clamp>` 1897 v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1898 v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1899 v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1900 v_sub_nc_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>` 1901 v_sub_nc_i32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1902 v_sub_nc_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`clamp<amdgpu_synid_clamp>` 1903 v_sub_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1904 v_subrev_co_ci_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`ssrc2<amdgpu_synid_gfx10_ssrc_5>` :ref:`clamp<amdgpu_synid_clamp>` 1905 v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`sdst<amdgpu_synid_gfx10_sdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1906 v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1907 v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1908 v_subrev_nc_u32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_6>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`clamp<amdgpu_synid_clamp>` 1909 v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`u32<amdgpu_synid_gfx10_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1910 v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1911 v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1912 v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst_1>`, :ref:`src<amdgpu_synid_gfx10_src_3>`::ref:`m<amdgpu_synid_gfx10_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` 1913 v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`ssrc0<amdgpu_synid_gfx10_ssrc_8>`, :ref:`ssrc1<amdgpu_synid_gfx10_ssrc_7>` 1914 v_xad_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1915 v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1916 v_xor3_b32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` 1917 v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` 1918 1919VOP3P 1920----------------------- 1921 1922.. parsed-literal:: 1923 1924 **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS** 1925 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1926 v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1927 v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1928 v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>`, :ref:`src2<amdgpu_synid_gfx10_src_6>`::ref:`m<amdgpu_synid_gfx10_m>`::ref:`fx<amdgpu_synid_gfx10_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1929 v_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1930 v_pk_add_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1931 v_pk_add_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1932 v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_8>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1933 v_pk_fma_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>`, :ref:`src2<amdgpu_synid_gfx10_src_6>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1934 v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_8>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1935 v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_8>`::ref:`u16x2<amdgpu_synid_gfx10_type_deviation>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1936 v_pk_mad_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1937 v_pk_mad_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>`, :ref:`src2<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1938 v_pk_max_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1939 v_pk_max_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1940 v_pk_max_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1941 v_pk_min_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1942 v_pk_min_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1943 v_pk_min_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1944 v_pk_mul_f16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`src1<amdgpu_synid_gfx10_src_6>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1945 v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` 1946 v_pk_sub_i16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1947 v_pk_sub_u16 :ref:`vdst<amdgpu_synid_gfx10_vdst>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`src1<amdgpu_synid_gfx10_src_8>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>` 1948 1949VOPC 1950----------------------- 1951 1952.. parsed-literal:: 1953 1954 **INSTRUCTION** **DST** **SRC0** **SRC1** 1955 \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---| 1956 v_cmp_class_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1957 v_cmp_class_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1958 v_cmp_class_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 1959 v_cmp_eq_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1960 v_cmp_eq_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1961 v_cmp_eq_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1962 v_cmp_eq_i16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1963 v_cmp_eq_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1964 v_cmp_eq_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1965 v_cmp_eq_u16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1966 v_cmp_eq_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1967 v_cmp_eq_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1968 v_cmp_f_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1969 v_cmp_f_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1970 v_cmp_f_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1971 v_cmp_f_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1972 v_cmp_f_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1973 v_cmp_f_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1974 v_cmp_f_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1975 v_cmp_ge_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1976 v_cmp_ge_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1977 v_cmp_ge_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1978 v_cmp_ge_i16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1979 v_cmp_ge_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1980 v_cmp_ge_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1981 v_cmp_ge_u16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1982 v_cmp_ge_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1983 v_cmp_ge_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1984 v_cmp_gt_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1985 v_cmp_gt_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1986 v_cmp_gt_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1987 v_cmp_gt_i16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1988 v_cmp_gt_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1989 v_cmp_gt_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1990 v_cmp_gt_u16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1991 v_cmp_gt_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1992 v_cmp_gt_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1993 v_cmp_le_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1994 v_cmp_le_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1995 v_cmp_le_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1996 v_cmp_le_i16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1997 v_cmp_le_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 1998 v_cmp_le_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 1999 v_cmp_le_u16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2000 v_cmp_le_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2001 v_cmp_le_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2002 v_cmp_lg_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2003 v_cmp_lg_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2004 v_cmp_lg_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2005 v_cmp_lt_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2006 v_cmp_lt_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2007 v_cmp_lt_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2008 v_cmp_lt_i16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2009 v_cmp_lt_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2010 v_cmp_lt_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2011 v_cmp_lt_u16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2012 v_cmp_lt_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2013 v_cmp_lt_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2014 v_cmp_ne_i16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2015 v_cmp_ne_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2016 v_cmp_ne_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2017 v_cmp_ne_u16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2018 v_cmp_ne_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2019 v_cmp_ne_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2020 v_cmp_neq_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2021 v_cmp_neq_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2022 v_cmp_neq_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2023 v_cmp_nge_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2024 v_cmp_nge_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2025 v_cmp_nge_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2026 v_cmp_ngt_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2027 v_cmp_ngt_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2028 v_cmp_ngt_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2029 v_cmp_nle_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2030 v_cmp_nle_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2031 v_cmp_nle_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2032 v_cmp_nlg_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2033 v_cmp_nlg_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2034 v_cmp_nlg_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2035 v_cmp_nlt_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2036 v_cmp_nlt_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2037 v_cmp_nlt_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2038 v_cmp_o_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2039 v_cmp_o_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2040 v_cmp_o_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2041 v_cmp_t_i32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2042 v_cmp_t_i64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2043 v_cmp_t_u32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2044 v_cmp_t_u64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2045 v_cmp_tru_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2046 v_cmp_tru_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2047 v_cmp_tru_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2048 v_cmp_u_f16 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2049 v_cmp_u_f32 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2050 v_cmp_u_f64 :ref:`vcc<amdgpu_synid_gfx10_vcc>`, :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2051 v_cmpx_class_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 2052 v_cmpx_class_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 2053 v_cmpx_class_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>`::ref:`b32<amdgpu_synid_gfx10_type_deviation>` 2054 v_cmpx_eq_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2055 v_cmpx_eq_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2056 v_cmpx_eq_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2057 v_cmpx_eq_i16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2058 v_cmpx_eq_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2059 v_cmpx_eq_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2060 v_cmpx_eq_u16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2061 v_cmpx_eq_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2062 v_cmpx_eq_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2063 v_cmpx_f_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2064 v_cmpx_f_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2065 v_cmpx_f_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2066 v_cmpx_f_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2067 v_cmpx_f_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2068 v_cmpx_f_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2069 v_cmpx_f_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2070 v_cmpx_ge_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2071 v_cmpx_ge_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2072 v_cmpx_ge_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2073 v_cmpx_ge_i16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2074 v_cmpx_ge_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2075 v_cmpx_ge_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2076 v_cmpx_ge_u16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2077 v_cmpx_ge_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2078 v_cmpx_ge_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2079 v_cmpx_gt_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2080 v_cmpx_gt_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2081 v_cmpx_gt_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2082 v_cmpx_gt_i16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2083 v_cmpx_gt_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2084 v_cmpx_gt_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2085 v_cmpx_gt_u16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2086 v_cmpx_gt_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2087 v_cmpx_gt_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2088 v_cmpx_le_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2089 v_cmpx_le_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2090 v_cmpx_le_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2091 v_cmpx_le_i16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2092 v_cmpx_le_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2093 v_cmpx_le_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2094 v_cmpx_le_u16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2095 v_cmpx_le_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2096 v_cmpx_le_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2097 v_cmpx_lg_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2098 v_cmpx_lg_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2099 v_cmpx_lg_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2100 v_cmpx_lt_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2101 v_cmpx_lt_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2102 v_cmpx_lt_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2103 v_cmpx_lt_i16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2104 v_cmpx_lt_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2105 v_cmpx_lt_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2106 v_cmpx_lt_u16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2107 v_cmpx_lt_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2108 v_cmpx_lt_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2109 v_cmpx_ne_i16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2110 v_cmpx_ne_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2111 v_cmpx_ne_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2112 v_cmpx_ne_u16 :ref:`src0<amdgpu_synid_gfx10_src_4>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2113 v_cmpx_ne_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2114 v_cmpx_ne_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2115 v_cmpx_neq_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2116 v_cmpx_neq_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2117 v_cmpx_neq_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2118 v_cmpx_nge_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2119 v_cmpx_nge_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2120 v_cmpx_nge_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2121 v_cmpx_ngt_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2122 v_cmpx_ngt_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2123 v_cmpx_ngt_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2124 v_cmpx_nle_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2125 v_cmpx_nle_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2126 v_cmpx_nle_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2127 v_cmpx_nlg_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2128 v_cmpx_nlg_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2129 v_cmpx_nlg_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2130 v_cmpx_nlt_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2131 v_cmpx_nlt_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2132 v_cmpx_nlt_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2133 v_cmpx_o_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2134 v_cmpx_o_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2135 v_cmpx_o_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2136 v_cmpx_t_i32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2137 v_cmpx_t_i64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2138 v_cmpx_t_u32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2139 v_cmpx_t_u64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2140 v_cmpx_tru_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2141 v_cmpx_tru_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2142 v_cmpx_tru_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2143 v_cmpx_u_f16 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2144 v_cmpx_u_f32 :ref:`src0<amdgpu_synid_gfx10_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc>` 2145 v_cmpx_u_f64 :ref:`src0<amdgpu_synid_gfx10_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx10_vsrc_3>` 2146 2147.. |---| unicode:: U+02014 .. em dash 2148 2149.. toctree:: 2150 :hidden: 2151 2152 gfx10_attr 2153 gfx10_dst 2154 gfx10_fx_operand 2155 gfx10_hwreg 2156 gfx10_imm16 2157 gfx10_imm16_1 2158 gfx10_imm16_2 2159 gfx10_label 2160 gfx10_m 2161 gfx10_m_1 2162 gfx10_msg 2163 gfx10_opt 2164 gfx10_param 2165 gfx10_probe 2166 gfx10_saddr 2167 gfx10_saddr_1 2168 gfx10_sbase 2169 gfx10_sbase_1 2170 gfx10_sbase_2 2171 gfx10_sdata 2172 gfx10_sdata_1 2173 gfx10_sdata_2 2174 gfx10_sdata_3 2175 gfx10_sdata_4 2176 gfx10_sdata_5 2177 gfx10_sdst 2178 gfx10_sdst_1 2179 gfx10_sdst_2 2180 gfx10_sdst_3 2181 gfx10_sdst_4 2182 gfx10_sdst_5 2183 gfx10_sdst_6 2184 gfx10_sdst_7 2185 gfx10_sdst_8 2186 gfx10_simm32 2187 gfx10_simm32_1 2188 gfx10_simm32_2 2189 gfx10_soffset 2190 gfx10_soffset_1 2191 gfx10_soffset_2 2192 gfx10_src 2193 gfx10_src_1 2194 gfx10_src_2 2195 gfx10_src_3 2196 gfx10_src_4 2197 gfx10_src_5 2198 gfx10_src_6 2199 gfx10_src_7 2200 gfx10_src_8 2201 gfx10_srsrc 2202 gfx10_srsrc_1 2203 gfx10_ssamp 2204 gfx10_ssrc 2205 gfx10_ssrc_1 2206 gfx10_ssrc_2 2207 gfx10_ssrc_3 2208 gfx10_ssrc_4 2209 gfx10_ssrc_5 2210 gfx10_ssrc_6 2211 gfx10_ssrc_7 2212 gfx10_ssrc_8 2213 gfx10_tgt 2214 gfx10_type_deviation 2215 gfx10_vaddr 2216 gfx10_vaddr_1 2217 gfx10_vaddr_2 2218 gfx10_vaddr_3 2219 gfx10_vaddr_4 2220 gfx10_vaddr_5 2221 gfx10_vcc 2222 gfx10_vdata 2223 gfx10_vdata0 2224 gfx10_vdata0_1 2225 gfx10_vdata1 2226 gfx10_vdata1_1 2227 gfx10_vdata_1 2228 gfx10_vdata_10 2229 gfx10_vdata_2 2230 gfx10_vdata_3 2231 gfx10_vdata_4 2232 gfx10_vdata_5 2233 gfx10_vdata_6 2234 gfx10_vdata_7 2235 gfx10_vdata_8 2236 gfx10_vdata_9 2237 gfx10_vdst 2238 gfx10_vdst_1 2239 gfx10_vdst_10 2240 gfx10_vdst_11 2241 gfx10_vdst_12 2242 gfx10_vdst_13 2243 gfx10_vdst_2 2244 gfx10_vdst_3 2245 gfx10_vdst_4 2246 gfx10_vdst_5 2247 gfx10_vdst_6 2248 gfx10_vdst_7 2249 gfx10_vdst_8 2250 gfx10_vdst_9 2251 gfx10_vsrc 2252 gfx10_vsrc_1 2253 gfx10_vsrc_2 2254 gfx10_vsrc_3 2255 gfx10_waitcnt 2256