1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr8 \
3; RUN:   -verify-machineinstrs | FileCheck %s
4; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr7 \
5; RUN:   -verify-machineinstrs | FileCheck %s --check-prefix=NOP8VEC
6define <16 x i8> @getsmaxi8(<16 x i8> %a, <16 x i8> %b) {
7; CHECK-LABEL: getsmaxi8:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    vmaxsb 2, 2, 3
10; CHECK-NEXT:    blr
11;
12; NOP8VEC-LABEL: getsmaxi8:
13; NOP8VEC:       # %bb.0: # %entry
14; NOP8VEC-NEXT:    vmaxsb 2, 2, 3
15; NOP8VEC-NEXT:    blr
16entry:
17  %0 = icmp sgt <16 x i8> %a, %b
18  %1 = select <16 x i1> %0, <16 x i8> %a, <16 x i8> %b
19  ret <16 x i8> %1
20}
21
22define <8 x i16> @getsmaxi16(<8 x i16> %a, <8 x i16> %b) {
23; CHECK-LABEL: getsmaxi16:
24; CHECK:       # %bb.0: # %entry
25; CHECK-NEXT:    vmaxsh 2, 2, 3
26; CHECK-NEXT:    blr
27;
28; NOP8VEC-LABEL: getsmaxi16:
29; NOP8VEC:       # %bb.0: # %entry
30; NOP8VEC-NEXT:    vmaxsh 2, 2, 3
31; NOP8VEC-NEXT:    blr
32entry:
33  %0 = icmp sgt <8 x i16> %a, %b
34  %1 = select <8 x i1> %0, <8 x i16> %a, <8 x i16> %b
35  ret <8 x i16> %1
36}
37
38define <4 x i32> @getsmaxi32(<4 x i32> %a, <4 x i32> %b) {
39; CHECK-LABEL: getsmaxi32:
40; CHECK:       # %bb.0: # %entry
41; CHECK-NEXT:    vmaxsw 2, 2, 3
42; CHECK-NEXT:    blr
43;
44; NOP8VEC-LABEL: getsmaxi32:
45; NOP8VEC:       # %bb.0: # %entry
46; NOP8VEC-NEXT:    vmaxsw 2, 2, 3
47; NOP8VEC-NEXT:    blr
48entry:
49  %0 = icmp sgt <4 x i32> %a, %b
50  %1 = select <4 x i1> %0, <4 x i32> %a, <4 x i32> %b
51  ret <4 x i32> %1
52}
53
54define <2 x i64> @getsmaxi64(<2 x i64> %a, <2 x i64> %b) {
55; CHECK-LABEL: getsmaxi64:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    vmaxsd 2, 2, 3
58; CHECK-NEXT:    blr
59;
60; NOP8VEC-LABEL: getsmaxi64:
61; NOP8VEC:       # %bb.0: # %entry
62; NOP8VEC-NEXT:    xxswapd 0, 35
63; NOP8VEC-NEXT:    addi 3, 1, -32
64; NOP8VEC-NEXT:    addi 4, 1, -48
65; NOP8VEC-NEXT:    xxswapd 1, 34
66; NOP8VEC-NEXT:    stxvd2x 0, 0, 3
67; NOP8VEC-NEXT:    stxvd2x 1, 0, 4
68; NOP8VEC-NEXT:    ld 3, -24(1)
69; NOP8VEC-NEXT:    ld 4, -40(1)
70; NOP8VEC-NEXT:    ld 6, -48(1)
71; NOP8VEC-NEXT:    cmpd 4, 3
72; NOP8VEC-NEXT:    li 3, 0
73; NOP8VEC-NEXT:    li 4, -1
74; NOP8VEC-NEXT:    isel 5, 4, 3, 1
75; NOP8VEC-NEXT:    std 5, -8(1)
76; NOP8VEC-NEXT:    ld 5, -32(1)
77; NOP8VEC-NEXT:    cmpd 6, 5
78; NOP8VEC-NEXT:    isel 3, 4, 3, 1
79; NOP8VEC-NEXT:    std 3, -16(1)
80; NOP8VEC-NEXT:    addi 3, 1, -16
81; NOP8VEC-NEXT:    lxvd2x 0, 0, 3
82; NOP8VEC-NEXT:    xxswapd 36, 0
83; NOP8VEC-NEXT:    xxsel 34, 35, 34, 36
84; NOP8VEC-NEXT:    blr
85entry:
86  %0 = icmp sgt <2 x i64> %a, %b
87  %1 = select <2 x i1> %0, <2 x i64> %a, <2 x i64> %b
88  ret <2 x i64> %1
89}
90
91define <4 x float> @getsmaxf32(<4 x float> %a, <4 x float> %b) {
92; CHECK-LABEL: getsmaxf32:
93; CHECK:       # %bb.0: # %entry
94; CHECK-NEXT:    xvmaxsp 34, 34, 35
95; CHECK-NEXT:    blr
96;
97; NOP8VEC-LABEL: getsmaxf32:
98; NOP8VEC:       # %bb.0: # %entry
99; NOP8VEC-NEXT:    xvmaxsp 34, 34, 35
100; NOP8VEC-NEXT:    blr
101entry:
102  %0 = fcmp fast oge <4 x float> %a, %b
103  %1 = select <4 x i1> %0, <4 x float> %a, <4 x float> %b
104  ret <4 x float> %1
105}
106
107define <2 x double> @getsmaxf64(<2 x double> %a, <2 x double> %b) {
108; CHECK-LABEL: getsmaxf64:
109; CHECK:       # %bb.0: # %entry
110; CHECK-NEXT:    xvmaxdp 34, 34, 35
111; CHECK-NEXT:    blr
112;
113; NOP8VEC-LABEL: getsmaxf64:
114; NOP8VEC:       # %bb.0: # %entry
115; NOP8VEC-NEXT:    xvmaxdp 34, 34, 35
116; NOP8VEC-NEXT:    blr
117entry:
118  %0 = fcmp fast oge <2 x double> %a, %b
119  %1 = select <2 x i1> %0, <2 x double> %a, <2 x double> %b
120  ret <2 x double> %1
121}
122
123define <16 x i8> @getsmini8(<16 x i8> %a, <16 x i8> %b) {
124; CHECK-LABEL: getsmini8:
125; CHECK:       # %bb.0: # %entry
126; CHECK-NEXT:    vminsb 2, 2, 3
127; CHECK-NEXT:    blr
128;
129; NOP8VEC-LABEL: getsmini8:
130; NOP8VEC:       # %bb.0: # %entry
131; NOP8VEC-NEXT:    vminsb 2, 2, 3
132; NOP8VEC-NEXT:    blr
133entry:
134  %0 = icmp slt <16 x i8> %a, %b
135  %1 = select <16 x i1> %0, <16 x i8> %a, <16 x i8> %b
136  ret <16 x i8> %1
137}
138
139define <8 x i16> @getsmini16(<8 x i16> %a, <8 x i16> %b) {
140; CHECK-LABEL: getsmini16:
141; CHECK:       # %bb.0: # %entry
142; CHECK-NEXT:    vminsh 2, 2, 3
143; CHECK-NEXT:    blr
144;
145; NOP8VEC-LABEL: getsmini16:
146; NOP8VEC:       # %bb.0: # %entry
147; NOP8VEC-NEXT:    vminsh 2, 2, 3
148; NOP8VEC-NEXT:    blr
149entry:
150  %0 = icmp slt <8 x i16> %a, %b
151  %1 = select <8 x i1> %0, <8 x i16> %a, <8 x i16> %b
152  ret <8 x i16> %1
153}
154
155define <4 x i32> @getsmini32(<4 x i32> %a, <4 x i32> %b) {
156; CHECK-LABEL: getsmini32:
157; CHECK:       # %bb.0: # %entry
158; CHECK-NEXT:    vminsw 2, 2, 3
159; CHECK-NEXT:    blr
160;
161; NOP8VEC-LABEL: getsmini32:
162; NOP8VEC:       # %bb.0: # %entry
163; NOP8VEC-NEXT:    vminsw 2, 2, 3
164; NOP8VEC-NEXT:    blr
165entry:
166  %0 = icmp slt <4 x i32> %a, %b
167  %1 = select <4 x i1> %0, <4 x i32> %a, <4 x i32> %b
168  ret <4 x i32> %1
169}
170
171define <2 x i64> @getsmini64(<2 x i64> %a, <2 x i64> %b) {
172; CHECK-LABEL: getsmini64:
173; CHECK:       # %bb.0: # %entry
174; CHECK-NEXT:    vminsd 2, 2, 3
175; CHECK-NEXT:    blr
176;
177; NOP8VEC-LABEL: getsmini64:
178; NOP8VEC:       # %bb.0: # %entry
179; NOP8VEC-NEXT:    xxswapd 0, 35
180; NOP8VEC-NEXT:    addi 3, 1, -32
181; NOP8VEC-NEXT:    addi 4, 1, -48
182; NOP8VEC-NEXT:    xxswapd 1, 34
183; NOP8VEC-NEXT:    stxvd2x 0, 0, 3
184; NOP8VEC-NEXT:    stxvd2x 1, 0, 4
185; NOP8VEC-NEXT:    ld 3, -24(1)
186; NOP8VEC-NEXT:    ld 4, -40(1)
187; NOP8VEC-NEXT:    ld 6, -48(1)
188; NOP8VEC-NEXT:    cmpd 4, 3
189; NOP8VEC-NEXT:    li 3, 0
190; NOP8VEC-NEXT:    li 4, -1
191; NOP8VEC-NEXT:    isel 5, 4, 3, 0
192; NOP8VEC-NEXT:    std 5, -8(1)
193; NOP8VEC-NEXT:    ld 5, -32(1)
194; NOP8VEC-NEXT:    cmpd 6, 5
195; NOP8VEC-NEXT:    isel 3, 4, 3, 0
196; NOP8VEC-NEXT:    std 3, -16(1)
197; NOP8VEC-NEXT:    addi 3, 1, -16
198; NOP8VEC-NEXT:    lxvd2x 0, 0, 3
199; NOP8VEC-NEXT:    xxswapd 36, 0
200; NOP8VEC-NEXT:    xxsel 34, 35, 34, 36
201; NOP8VEC-NEXT:    blr
202entry:
203  %0 = icmp slt <2 x i64> %a, %b
204  %1 = select <2 x i1> %0, <2 x i64> %a, <2 x i64> %b
205  ret <2 x i64> %1
206}
207
208define <4 x float> @getsminf32(<4 x float> %a, <4 x float> %b) {
209; CHECK-LABEL: getsminf32:
210; CHECK:       # %bb.0: # %entry
211; CHECK-NEXT:    xvminsp 34, 34, 35
212; CHECK-NEXT:    blr
213;
214; NOP8VEC-LABEL: getsminf32:
215; NOP8VEC:       # %bb.0: # %entry
216; NOP8VEC-NEXT:    xvminsp 34, 34, 35
217; NOP8VEC-NEXT:    blr
218entry:
219  %0 = fcmp fast ole <4 x float> %a, %b
220  %1 = select <4 x i1> %0, <4 x float> %a, <4 x float> %b
221  ret <4 x float> %1
222}
223
224define <2 x double> @getsminf64(<2 x double> %a, <2 x double> %b) {
225; CHECK-LABEL: getsminf64:
226; CHECK:       # %bb.0: # %entry
227; CHECK-NEXT:    xvmindp 34, 34, 35
228; CHECK-NEXT:    blr
229;
230; NOP8VEC-LABEL: getsminf64:
231; NOP8VEC:       # %bb.0: # %entry
232; NOP8VEC-NEXT:    xvmindp 34, 34, 35
233; NOP8VEC-NEXT:    blr
234entry:
235  %0 = fcmp fast ole <2 x double> %a, %b
236  %1 = select <2 x i1> %0, <2 x double> %a, <2 x double> %b
237  ret <2 x double> %1
238}
239
240define i128 @invalidv1i128(<2 x i128> %v1, <2 x i128> %v2) {
241; CHECK-LABEL: invalidv1i128:
242; CHECK:       # %bb.0:
243; CHECK-NEXT:    mfvsrd 3, 36
244; CHECK-NEXT:    xxswapd 0, 36
245; CHECK-NEXT:    mfvsrd 4, 34
246; CHECK-NEXT:    xxswapd 1, 34
247; CHECK-NEXT:    cmpld 4, 3
248; CHECK-NEXT:    cmpd 1, 4, 3
249; CHECK-NEXT:    mfvsrd 3, 0
250; CHECK-NEXT:    crandc 20, 4, 2
251; CHECK-NEXT:    mfvsrd 4, 1
252; CHECK-NEXT:    cmpld 1, 4, 3
253; CHECK-NEXT:    bc 12, 20, .LBB12_3
254; CHECK-NEXT:  # %bb.1:
255; CHECK-NEXT:    crand 20, 2, 4
256; CHECK-NEXT:    bc 12, 20, .LBB12_3
257; CHECK-NEXT:  # %bb.2:
258; CHECK-NEXT:    vmr 2, 4
259; CHECK-NEXT:  .LBB12_3:
260; CHECK-NEXT:    xxswapd 0, 34
261; CHECK-NEXT:    mfvsrd 4, 34
262; CHECK-NEXT:    mfvsrd 3, 0
263; CHECK-NEXT:    blr
264;
265; NOP8VEC-LABEL: invalidv1i128:
266; NOP8VEC:       # %bb.0:
267; NOP8VEC-NEXT:    cmpld 4, 8
268; NOP8VEC-NEXT:    cmpd 1, 4, 8
269; NOP8VEC-NEXT:    addi 5, 1, -32
270; NOP8VEC-NEXT:    crandc 20, 4, 2
271; NOP8VEC-NEXT:    cmpld 1, 3, 7
272; NOP8VEC-NEXT:    crand 21, 2, 4
273; NOP8VEC-NEXT:    cror 20, 21, 20
274; NOP8VEC-NEXT:    isel 3, 3, 7, 20
275; NOP8VEC-NEXT:    isel 4, 4, 8, 20
276; NOP8VEC-NEXT:    std 3, -32(1)
277; NOP8VEC-NEXT:    addi 3, 1, -16
278; NOP8VEC-NEXT:    std 4, -24(1)
279; NOP8VEC-NEXT:    lxvd2x 0, 0, 5
280; NOP8VEC-NEXT:    stxvd2x 0, 0, 3
281; NOP8VEC-NEXT:    ld 3, -16(1)
282; NOP8VEC-NEXT:    ld 4, -8(1)
283; NOP8VEC-NEXT:    blr
284%1 = icmp slt <2 x i128> %v1, %v2
285%2 = select <2 x i1> %1, <2 x i128> %v1, <2 x i128> %v2
286%3 = extractelement <2 x i128> %2, i32 0
287ret i128 %3
288}
289