1 // RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -fallow-half-arguments-and-returns -S -o - -disable-O0-optnone -emit-llvm %s | opt -S -mem2reg | FileCheck %s
2
3 #include <arm_neon.h>
4
5 // vdupq_n_f64 -> dup.2d v0, v0[0]
6 //
7 // CHECK-LABEL: define <2 x double> @test_vdupq_n_f64(double %w) #0 {
8 // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %w, i32 0
9 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %w, i32 1
10 // CHECK: ret <2 x double> [[VECINIT1_I]]
test_vdupq_n_f64(float64_t w)11 float64x2_t test_vdupq_n_f64(float64_t w) {
12 return vdupq_n_f64(w);
13 }
14
15 // might as well test this while we're here
16 // vdupq_n_f32 -> dup.4s v0, v0[0]
17 // CHECK-LABEL: define <4 x float> @test_vdupq_n_f32(float %w) #0 {
18 // CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %w, i32 0
19 // CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %w, i32 1
20 // CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %w, i32 2
21 // CHECK: [[VECINIT3_I:%.*]] = insertelement <4 x float> [[VECINIT2_I]], float %w, i32 3
22 // CHECK: ret <4 x float> [[VECINIT3_I]]
test_vdupq_n_f32(float32_t w)23 float32x4_t test_vdupq_n_f32(float32_t w) {
24 return vdupq_n_f32(w);
25 }
26
27 // vdupq_lane_f64 -> dup.2d v0, v0[0]
28 // this was in <rdar://problem/11778405>, but had already been implemented,
29 // test anyway
30 // CHECK-LABEL: define <2 x double> @test_vdupq_lane_f64(<1 x double> %V) #0 {
31 // CHECK: [[SHUFFLE:%.*]] = shufflevector <1 x double> %V, <1 x double> %V, <2 x i32> zeroinitializer
32 // CHECK: ret <2 x double> [[SHUFFLE]]
test_vdupq_lane_f64(float64x1_t V)33 float64x2_t test_vdupq_lane_f64(float64x1_t V) {
34 return vdupq_lane_f64(V, 0);
35 }
36
37 // vmovq_n_f64 -> dup Vd.2d,X0
38 // this wasn't in <rdar://problem/11778405>, but it was between the vdups
39 // CHECK-LABEL: define <2 x double> @test_vmovq_n_f64(double %w) #0 {
40 // CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %w, i32 0
41 // CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %w, i32 1
42 // CHECK: ret <2 x double> [[VECINIT1_I]]
test_vmovq_n_f64(float64_t w)43 float64x2_t test_vmovq_n_f64(float64_t w) {
44 return vmovq_n_f64(w);
45 }
46
47 // CHECK-LABEL: define <4 x half> @test_vmov_n_f16(half* %a1) #1 {
48 // CHECK: [[TMP0:%.*]] = load half, half* %a1, align 2
49 // CHECK: [[VECINIT:%.*]] = insertelement <4 x half> undef, half [[TMP0]], i32 0
50 // CHECK: [[VECINIT1:%.*]] = insertelement <4 x half> [[VECINIT]], half [[TMP0]], i32 1
51 // CHECK: [[VECINIT2:%.*]] = insertelement <4 x half> [[VECINIT1]], half [[TMP0]], i32 2
52 // CHECK: [[VECINIT3:%.*]] = insertelement <4 x half> [[VECINIT2]], half [[TMP0]], i32 3
53 // CHECK: ret <4 x half> [[VECINIT3]]
test_vmov_n_f16(float16_t * a1)54 float16x4_t test_vmov_n_f16(float16_t *a1) {
55 return vmov_n_f16(*a1);
56 }
57
58 /*
59 float64x1_t test_vmov_n_f64(float64_t a1) {
60 return vmov_n_f64(a1);
61 }
62 */
63
64 // CHECK-LABEL: define <8 x half> @test_vmovq_n_f16(half* %a1) #0 {
65 // CHECK: [[TMP0:%.*]] = load half, half* %a1, align 2
66 // CHECK: [[VECINIT:%.*]] = insertelement <8 x half> undef, half [[TMP0]], i32 0
67 // CHECK: [[VECINIT1:%.*]] = insertelement <8 x half> [[VECINIT]], half [[TMP0]], i32 1
68 // CHECK: [[VECINIT2:%.*]] = insertelement <8 x half> [[VECINIT1]], half [[TMP0]], i32 2
69 // CHECK: [[VECINIT3:%.*]] = insertelement <8 x half> [[VECINIT2]], half [[TMP0]], i32 3
70 // CHECK: [[VECINIT4:%.*]] = insertelement <8 x half> [[VECINIT3]], half [[TMP0]], i32 4
71 // CHECK: [[VECINIT5:%.*]] = insertelement <8 x half> [[VECINIT4]], half [[TMP0]], i32 5
72 // CHECK: [[VECINIT6:%.*]] = insertelement <8 x half> [[VECINIT5]], half [[TMP0]], i32 6
73 // CHECK: [[VECINIT7:%.*]] = insertelement <8 x half> [[VECINIT6]], half [[TMP0]], i32 7
74 // CHECK: ret <8 x half> [[VECINIT7]]
test_vmovq_n_f16(float16_t * a1)75 float16x8_t test_vmovq_n_f16(float16_t *a1) {
76 return vmovq_n_f16(*a1);
77 }
78
79 // CHECK: attributes #0 ={{.*}}"min-legal-vector-width"="128"
80 // CHECK: attributes #1 ={{.*}}"min-legal-vector-width"="64"
81