1; RUN: llc -march=hexagon  < %s | FileCheck %s
2
3; Test that LLVM does not assert and bitcast v64i1 to i64 is lowered
4; without crashing.
5; CHECK: valign
6
7target triple = "hexagon"
8
9define dso_local void @f0() local_unnamed_addr #0 {
10b0:
11  br i1 undef, label %b2, label %b1
12
13b1:                                               ; preds = %b0
14  %v0 = load i8, i8* undef, align 1
15  %v1 = zext i8 %v0 to i32
16  %v2 = add nsw i32 %v1, -1
17  %v3 = insertelement <64 x i32> undef, i32 %v2, i32 0
18  %v4 = shufflevector <64 x i32> %v3, <64 x i32> undef, <64 x i32> zeroinitializer
19  %v5 = icmp ule <64 x i32> undef, %v4
20  %v6 = call <64 x i8> @llvm.masked.load.v64i8.p0v64i8(<64 x i8>* nonnull undef, i32 1, <64 x i1> %v5, <64 x i8> undef)
21  %v7 = lshr <64 x i8> %v6, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
22  %v8 = and <64 x i8> %v7, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
23  %v9 = zext <64 x i8> %v8 to <64 x i32>
24  %v10 = add nsw <64 x i32> undef, %v9
25  %v11 = select <64 x i1> %v5, <64 x i32> %v10, <64 x i32> undef
26  %v12 = add <64 x i32> %v11, undef
27  %v13 = add <64 x i32> %v12, undef
28  %v14 = add <64 x i32> %v13, undef
29  %v15 = add <64 x i32> %v14, undef
30  %v16 = add <64 x i32> %v15, undef
31  %v17 = add <64 x i32> %v16, undef
32  %v18 = add <64 x i32> %v17, undef
33  %v19 = extractelement <64 x i32> %v18, i32 0
34  %v20 = getelementptr inbounds i8, i8* null, i32 2160
35  %v21 = bitcast i8* %v20 to i32*
36  store i32 %v19, i32* %v21, align 4
37  br label %b2
38
39b2:                                               ; preds = %b1, %b0
40  ret void
41}
42
43; Function Attrs: argmemonly nounwind readonly willreturn
44declare <64 x i8> @llvm.masked.load.v64i8.p0v64i8(<64 x i8>*, i32 immarg, <64 x i1>, <64 x i8>) #1
45
46attributes #0 = { "target-features"="+hvx-length64b,+hvxv67,+v67,-long-calls" }
47attributes #1 = { argmemonly nounwind readonly willreturn }
48