1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3; RUN:     -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4; RUN: FileCheck %s --check-prefix=CHECK-P8
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7; RUN: FileCheck %s --check-prefix=CHECK-P9
8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9; RUN:     -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10; RUN: FileCheck %s --check-prefix=CHECK-BE
11
12define i32 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
13; CHECK-P8-LABEL: test2elt:
14; CHECK-P8:       # %bb.0: # %entry
15; CHECK-P8-NEXT:    mtfprd f0, r3
16; CHECK-P8-NEXT:    xxswapd v2, vs0
17; CHECK-P8-NEXT:    xscvspdpn f0, vs0
18; CHECK-P8-NEXT:    xxsldwi vs1, v2, v2, 3
19; CHECK-P8-NEXT:    xscvspdpn f1, vs1
20; CHECK-P8-NEXT:    xscvdpsxws f0, f0
21; CHECK-P8-NEXT:    xscvdpsxws f1, f1
22; CHECK-P8-NEXT:    mffprwz r4, f0
23; CHECK-P8-NEXT:    mtvsrd v3, r4
24; CHECK-P8-NEXT:    mffprwz r3, f1
25; CHECK-P8-NEXT:    mtvsrd v2, r3
26; CHECK-P8-NEXT:    vmrghh v2, v3, v2
27; CHECK-P8-NEXT:    xxswapd vs0, v2
28; CHECK-P8-NEXT:    mffprwz r3, f0
29; CHECK-P8-NEXT:    blr
30;
31; CHECK-P9-LABEL: test2elt:
32; CHECK-P9:       # %bb.0: # %entry
33; CHECK-P9-NEXT:    mtfprd f0, r3
34; CHECK-P9-NEXT:    xxswapd v2, vs0
35; CHECK-P9-NEXT:    xscvspdpn f0, vs0
36; CHECK-P9-NEXT:    xxsldwi vs1, v2, v2, 3
37; CHECK-P9-NEXT:    xscvspdpn f1, vs1
38; CHECK-P9-NEXT:    xscvdpsxws f1, f1
39; CHECK-P9-NEXT:    xscvdpsxws f0, f0
40; CHECK-P9-NEXT:    mffprwz r3, f1
41; CHECK-P9-NEXT:    mtvsrd v2, r3
42; CHECK-P9-NEXT:    mffprwz r3, f0
43; CHECK-P9-NEXT:    mtvsrd v3, r3
44; CHECK-P9-NEXT:    li r3, 0
45; CHECK-P9-NEXT:    vmrghh v2, v3, v2
46; CHECK-P9-NEXT:    vextuwrx r3, r3, v2
47; CHECK-P9-NEXT:    blr
48;
49; CHECK-BE-LABEL: test2elt:
50; CHECK-BE:       # %bb.0: # %entry
51; CHECK-BE-NEXT:    mtfprd f0, r3
52; CHECK-BE-NEXT:    xscvspdpn f1, vs0
53; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
54; CHECK-BE-NEXT:    xscvdpsxws f1, f1
55; CHECK-BE-NEXT:    xscvspdpn f0, vs0
56; CHECK-BE-NEXT:    xscvdpsxws f0, f0
57; CHECK-BE-NEXT:    mffprwz r3, f1
58; CHECK-BE-NEXT:    sldi r3, r3, 48
59; CHECK-BE-NEXT:    mtvsrd v2, r3
60; CHECK-BE-NEXT:    mffprwz r3, f0
61; CHECK-BE-NEXT:    sldi r3, r3, 48
62; CHECK-BE-NEXT:    mtvsrd v3, r3
63; CHECK-BE-NEXT:    li r3, 0
64; CHECK-BE-NEXT:    vmrghh v2, v2, v3
65; CHECK-BE-NEXT:    vextuwlx r3, r3, v2
66; CHECK-BE-NEXT:    blr
67entry:
68  %0 = bitcast i64 %a.coerce to <2 x float>
69  %1 = fptoui <2 x float> %0 to <2 x i16>
70  %2 = bitcast <2 x i16> %1 to i32
71  ret i32 %2
72}
73
74define i64 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
75; CHECK-P8-LABEL: test4elt:
76; CHECK-P8:       # %bb.0: # %entry
77; CHECK-P8-NEXT:    xxsldwi vs0, v2, v2, 3
78; CHECK-P8-NEXT:    xscvspdpn f1, v2
79; CHECK-P8-NEXT:    xxswapd vs2, v2
80; CHECK-P8-NEXT:    xxsldwi vs3, v2, v2, 1
81; CHECK-P8-NEXT:    xscvspdpn f0, vs0
82; CHECK-P8-NEXT:    xscvspdpn f2, vs2
83; CHECK-P8-NEXT:    xscvspdpn f3, vs3
84; CHECK-P8-NEXT:    xscvdpsxws f1, f1
85; CHECK-P8-NEXT:    xscvdpsxws f0, f0
86; CHECK-P8-NEXT:    xscvdpsxws f2, f2
87; CHECK-P8-NEXT:    xscvdpsxws f3, f3
88; CHECK-P8-NEXT:    mffprwz r3, f1
89; CHECK-P8-NEXT:    mtvsrd v2, r3
90; CHECK-P8-NEXT:    mffprwz r3, f0
91; CHECK-P8-NEXT:    mffprwz r4, f2
92; CHECK-P8-NEXT:    mtvsrd v3, r3
93; CHECK-P8-NEXT:    mffprwz r3, f3
94; CHECK-P8-NEXT:    mtvsrd v4, r4
95; CHECK-P8-NEXT:    mtvsrd v5, r3
96; CHECK-P8-NEXT:    vmrghh v3, v4, v3
97; CHECK-P8-NEXT:    vmrghh v2, v2, v5
98; CHECK-P8-NEXT:    vmrglw v2, v2, v3
99; CHECK-P8-NEXT:    xxswapd vs0, v2
100; CHECK-P8-NEXT:    mffprd r3, f0
101; CHECK-P8-NEXT:    blr
102;
103; CHECK-P9-LABEL: test4elt:
104; CHECK-P9:       # %bb.0: # %entry
105; CHECK-P9-NEXT:    xxsldwi vs0, v2, v2, 3
106; CHECK-P9-NEXT:    xscvspdpn f0, vs0
107; CHECK-P9-NEXT:    xscvdpsxws f0, f0
108; CHECK-P9-NEXT:    mffprwz r3, f0
109; CHECK-P9-NEXT:    xxswapd vs0, v2
110; CHECK-P9-NEXT:    mtvsrd v3, r3
111; CHECK-P9-NEXT:    xscvspdpn f0, vs0
112; CHECK-P9-NEXT:    xscvdpsxws f0, f0
113; CHECK-P9-NEXT:    mffprwz r3, f0
114; CHECK-P9-NEXT:    xscvspdpn f0, v2
115; CHECK-P9-NEXT:    mtvsrd v4, r3
116; CHECK-P9-NEXT:    xscvdpsxws f0, f0
117; CHECK-P9-NEXT:    vmrghh v3, v4, v3
118; CHECK-P9-NEXT:    mffprwz r3, f0
119; CHECK-P9-NEXT:    xxsldwi vs0, v2, v2, 1
120; CHECK-P9-NEXT:    mtvsrd v4, r3
121; CHECK-P9-NEXT:    xscvspdpn f0, vs0
122; CHECK-P9-NEXT:    xscvdpsxws f0, f0
123; CHECK-P9-NEXT:    mffprwz r3, f0
124; CHECK-P9-NEXT:    mtvsrd v2, r3
125; CHECK-P9-NEXT:    vmrghh v2, v4, v2
126; CHECK-P9-NEXT:    vmrglw v2, v2, v3
127; CHECK-P9-NEXT:    mfvsrld r3, v2
128; CHECK-P9-NEXT:    blr
129;
130; CHECK-BE-LABEL: test4elt:
131; CHECK-BE:       # %bb.0: # %entry
132; CHECK-BE-NEXT:    xxsldwi vs0, v2, v2, 3
133; CHECK-BE-NEXT:    xscvspdpn f0, vs0
134; CHECK-BE-NEXT:    xscvdpsxws f0, f0
135; CHECK-BE-NEXT:    mffprwz r3, f0
136; CHECK-BE-NEXT:    xxswapd vs0, v2
137; CHECK-BE-NEXT:    sldi r3, r3, 48
138; CHECK-BE-NEXT:    xscvspdpn f0, vs0
139; CHECK-BE-NEXT:    mtvsrd v3, r3
140; CHECK-BE-NEXT:    xscvdpsxws f0, f0
141; CHECK-BE-NEXT:    mffprwz r3, f0
142; CHECK-BE-NEXT:    xscvspdpn f0, v2
143; CHECK-BE-NEXT:    sldi r3, r3, 48
144; CHECK-BE-NEXT:    xscvdpsxws f0, f0
145; CHECK-BE-NEXT:    mtvsrd v4, r3
146; CHECK-BE-NEXT:    vmrghh v3, v4, v3
147; CHECK-BE-NEXT:    mffprwz r3, f0
148; CHECK-BE-NEXT:    xxsldwi vs0, v2, v2, 1
149; CHECK-BE-NEXT:    sldi r3, r3, 48
150; CHECK-BE-NEXT:    xscvspdpn f0, vs0
151; CHECK-BE-NEXT:    mtvsrd v4, r3
152; CHECK-BE-NEXT:    xscvdpsxws f0, f0
153; CHECK-BE-NEXT:    mffprwz r3, f0
154; CHECK-BE-NEXT:    sldi r3, r3, 48
155; CHECK-BE-NEXT:    mtvsrd v2, r3
156; CHECK-BE-NEXT:    vmrghh v2, v4, v2
157; CHECK-BE-NEXT:    vmrghw v2, v2, v3
158; CHECK-BE-NEXT:    mfvsrd r3, v2
159; CHECK-BE-NEXT:    blr
160entry:
161  %0 = fptoui <4 x float> %a to <4 x i16>
162  %1 = bitcast <4 x i16> %0 to i64
163  ret i64 %1
164}
165
166define <8 x i16> @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
167; CHECK-P8-LABEL: test8elt:
168; CHECK-P8:       # %bb.0: # %entry
169; CHECK-P8-NEXT:    lvx v2, 0, r3
170; CHECK-P8-NEXT:    li r4, 16
171; CHECK-P8-NEXT:    lvx v3, r3, r4
172; CHECK-P8-NEXT:    xxsldwi vs0, v2, v2, 3
173; CHECK-P8-NEXT:    xxswapd vs1, v2
174; CHECK-P8-NEXT:    xscvspdpn f2, v2
175; CHECK-P8-NEXT:    xxsldwi vs4, v2, v2, 1
176; CHECK-P8-NEXT:    xxsldwi vs5, v3, v3, 3
177; CHECK-P8-NEXT:    xscvspdpn f3, v3
178; CHECK-P8-NEXT:    xscvspdpn f0, vs0
179; CHECK-P8-NEXT:    xscvspdpn f1, vs1
180; CHECK-P8-NEXT:    xscvspdpn f4, vs4
181; CHECK-P8-NEXT:    xscvspdpn f5, vs5
182; CHECK-P8-NEXT:    xscvdpsxws f2, f2
183; CHECK-P8-NEXT:    xscvdpsxws f3, f3
184; CHECK-P8-NEXT:    xscvdpsxws f0, f0
185; CHECK-P8-NEXT:    xscvdpsxws f1, f1
186; CHECK-P8-NEXT:    mffprwz r3, f0
187; CHECK-P8-NEXT:    xxswapd vs0, v3
188; CHECK-P8-NEXT:    mffprwz r4, f1
189; CHECK-P8-NEXT:    xxsldwi vs1, v3, v3, 1
190; CHECK-P8-NEXT:    mtvsrd v2, r3
191; CHECK-P8-NEXT:    xscvspdpn f0, vs0
192; CHECK-P8-NEXT:    mffprwz r3, f2
193; CHECK-P8-NEXT:    xscvdpsxws f2, f4
194; CHECK-P8-NEXT:    xscvspdpn f1, vs1
195; CHECK-P8-NEXT:    xscvdpsxws f4, f5
196; CHECK-P8-NEXT:    mtvsrd v4, r4
197; CHECK-P8-NEXT:    xscvdpsxws f0, f0
198; CHECK-P8-NEXT:    vmrghh v2, v4, v2
199; CHECK-P8-NEXT:    mffprwz r4, f2
200; CHECK-P8-NEXT:    xscvdpsxws f1, f1
201; CHECK-P8-NEXT:    mtvsrd v3, r3
202; CHECK-P8-NEXT:    mffprwz r3, f3
203; CHECK-P8-NEXT:    mtvsrd v4, r4
204; CHECK-P8-NEXT:    mffprwz r4, f0
205; CHECK-P8-NEXT:    vmrghh v3, v3, v4
206; CHECK-P8-NEXT:    mtvsrd v4, r3
207; CHECK-P8-NEXT:    mffprwz r3, f4
208; CHECK-P8-NEXT:    mtvsrd v0, r4
209; CHECK-P8-NEXT:    mtvsrd v5, r3
210; CHECK-P8-NEXT:    mffprwz r3, f1
211; CHECK-P8-NEXT:    vmrghh v5, v0, v5
212; CHECK-P8-NEXT:    mtvsrd v1, r3
213; CHECK-P8-NEXT:    vmrglw v2, v3, v2
214; CHECK-P8-NEXT:    vmrghh v4, v4, v1
215; CHECK-P8-NEXT:    vmrglw v3, v4, v5
216; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
217; CHECK-P8-NEXT:    blr
218;
219; CHECK-P9-LABEL: test8elt:
220; CHECK-P9:       # %bb.0: # %entry
221; CHECK-P9-NEXT:    lxv vs1, 0(r3)
222; CHECK-P9-NEXT:    xxsldwi vs2, vs1, vs1, 3
223; CHECK-P9-NEXT:    xscvspdpn f2, vs2
224; CHECK-P9-NEXT:    xscvdpsxws f2, f2
225; CHECK-P9-NEXT:    lxv vs0, 16(r3)
226; CHECK-P9-NEXT:    mffprwz r3, f2
227; CHECK-P9-NEXT:    xxswapd vs2, vs1
228; CHECK-P9-NEXT:    mtvsrd v2, r3
229; CHECK-P9-NEXT:    xscvspdpn f2, vs2
230; CHECK-P9-NEXT:    xscvdpsxws f2, f2
231; CHECK-P9-NEXT:    mffprwz r3, f2
232; CHECK-P9-NEXT:    xscvspdpn f2, vs1
233; CHECK-P9-NEXT:    xxsldwi vs1, vs1, vs1, 1
234; CHECK-P9-NEXT:    mtvsrd v3, r3
235; CHECK-P9-NEXT:    xscvspdpn f1, vs1
236; CHECK-P9-NEXT:    xscvdpsxws f2, f2
237; CHECK-P9-NEXT:    vmrghh v2, v3, v2
238; CHECK-P9-NEXT:    xscvdpsxws f1, f1
239; CHECK-P9-NEXT:    mffprwz r3, f2
240; CHECK-P9-NEXT:    mtvsrd v3, r3
241; CHECK-P9-NEXT:    mffprwz r3, f1
242; CHECK-P9-NEXT:    xxsldwi vs1, vs0, vs0, 3
243; CHECK-P9-NEXT:    mtvsrd v4, r3
244; CHECK-P9-NEXT:    xscvspdpn f1, vs1
245; CHECK-P9-NEXT:    vmrghh v3, v3, v4
246; CHECK-P9-NEXT:    xscvdpsxws f1, f1
247; CHECK-P9-NEXT:    vmrglw v2, v3, v2
248; CHECK-P9-NEXT:    mffprwz r3, f1
249; CHECK-P9-NEXT:    xxswapd vs1, vs0
250; CHECK-P9-NEXT:    mtvsrd v3, r3
251; CHECK-P9-NEXT:    xscvspdpn f1, vs1
252; CHECK-P9-NEXT:    xscvdpsxws f1, f1
253; CHECK-P9-NEXT:    mffprwz r3, f1
254; CHECK-P9-NEXT:    xscvspdpn f1, vs0
255; CHECK-P9-NEXT:    xxsldwi vs0, vs0, vs0, 1
256; CHECK-P9-NEXT:    mtvsrd v4, r3
257; CHECK-P9-NEXT:    xscvspdpn f0, vs0
258; CHECK-P9-NEXT:    xscvdpsxws f1, f1
259; CHECK-P9-NEXT:    vmrghh v3, v4, v3
260; CHECK-P9-NEXT:    xscvdpsxws f0, f0
261; CHECK-P9-NEXT:    mffprwz r3, f1
262; CHECK-P9-NEXT:    mtvsrd v4, r3
263; CHECK-P9-NEXT:    mffprwz r3, f0
264; CHECK-P9-NEXT:    mtvsrd v5, r3
265; CHECK-P9-NEXT:    vmrghh v4, v4, v5
266; CHECK-P9-NEXT:    vmrglw v3, v4, v3
267; CHECK-P9-NEXT:    xxmrgld v2, v3, v2
268; CHECK-P9-NEXT:    blr
269;
270; CHECK-BE-LABEL: test8elt:
271; CHECK-BE:       # %bb.0: # %entry
272; CHECK-BE-NEXT:    lxv vs1, 16(r3)
273; CHECK-BE-NEXT:    xxsldwi vs2, vs1, vs1, 3
274; CHECK-BE-NEXT:    xscvspdpn f2, vs2
275; CHECK-BE-NEXT:    xscvdpsxws f2, f2
276; CHECK-BE-NEXT:    lxv vs0, 0(r3)
277; CHECK-BE-NEXT:    mffprwz r3, f2
278; CHECK-BE-NEXT:    xxswapd vs2, vs1
279; CHECK-BE-NEXT:    sldi r3, r3, 48
280; CHECK-BE-NEXT:    xscvspdpn f2, vs2
281; CHECK-BE-NEXT:    mtvsrd v2, r3
282; CHECK-BE-NEXT:    xscvdpsxws f2, f2
283; CHECK-BE-NEXT:    mffprwz r3, f2
284; CHECK-BE-NEXT:    xscvspdpn f2, vs1
285; CHECK-BE-NEXT:    xxsldwi vs1, vs1, vs1, 1
286; CHECK-BE-NEXT:    sldi r3, r3, 48
287; CHECK-BE-NEXT:    xscvdpsxws f2, f2
288; CHECK-BE-NEXT:    xscvspdpn f1, vs1
289; CHECK-BE-NEXT:    mtvsrd v3, r3
290; CHECK-BE-NEXT:    xscvdpsxws f1, f1
291; CHECK-BE-NEXT:    vmrghh v2, v3, v2
292; CHECK-BE-NEXT:    mffprwz r3, f2
293; CHECK-BE-NEXT:    sldi r3, r3, 48
294; CHECK-BE-NEXT:    mtvsrd v3, r3
295; CHECK-BE-NEXT:    mffprwz r3, f1
296; CHECK-BE-NEXT:    xxsldwi vs1, vs0, vs0, 3
297; CHECK-BE-NEXT:    sldi r3, r3, 48
298; CHECK-BE-NEXT:    xscvspdpn f1, vs1
299; CHECK-BE-NEXT:    mtvsrd v4, r3
300; CHECK-BE-NEXT:    xscvdpsxws f1, f1
301; CHECK-BE-NEXT:    mffprwz r3, f1
302; CHECK-BE-NEXT:    xxswapd vs1, vs0
303; CHECK-BE-NEXT:    xscvspdpn f1, vs1
304; CHECK-BE-NEXT:    xscvdpsxws f1, f1
305; CHECK-BE-NEXT:    vmrghh v3, v3, v4
306; CHECK-BE-NEXT:    sldi r3, r3, 48
307; CHECK-BE-NEXT:    vmrghw v2, v3, v2
308; CHECK-BE-NEXT:    mtvsrd v3, r3
309; CHECK-BE-NEXT:    mffprwz r3, f1
310; CHECK-BE-NEXT:    xscvspdpn f1, vs0
311; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
312; CHECK-BE-NEXT:    sldi r3, r3, 48
313; CHECK-BE-NEXT:    xscvdpsxws f1, f1
314; CHECK-BE-NEXT:    xscvspdpn f0, vs0
315; CHECK-BE-NEXT:    mtvsrd v4, r3
316; CHECK-BE-NEXT:    xscvdpsxws f0, f0
317; CHECK-BE-NEXT:    vmrghh v3, v4, v3
318; CHECK-BE-NEXT:    mffprwz r3, f1
319; CHECK-BE-NEXT:    sldi r3, r3, 48
320; CHECK-BE-NEXT:    mtvsrd v4, r3
321; CHECK-BE-NEXT:    mffprwz r3, f0
322; CHECK-BE-NEXT:    sldi r3, r3, 48
323; CHECK-BE-NEXT:    mtvsrd v5, r3
324; CHECK-BE-NEXT:    vmrghh v4, v4, v5
325; CHECK-BE-NEXT:    vmrghw v3, v4, v3
326; CHECK-BE-NEXT:    xxmrghd v2, v3, v2
327; CHECK-BE-NEXT:    blr
328entry:
329  %a = load <8 x float>, <8 x float>* %0, align 32
330  %1 = fptoui <8 x float> %a to <8 x i16>
331  ret <8 x i16> %1
332}
333
334define void @test16elt(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
335; CHECK-P8-LABEL: test16elt:
336; CHECK-P8:       # %bb.0: # %entry
337; CHECK-P8-NEXT:    lvx v5, 0, r4
338; CHECK-P8-NEXT:    li r5, 16
339; CHECK-P8-NEXT:    li r6, 32
340; CHECK-P8-NEXT:    lvx v3, r4, r5
341; CHECK-P8-NEXT:    lvx v2, r4, r6
342; CHECK-P8-NEXT:    li r6, 48
343; CHECK-P8-NEXT:    xxsldwi vs0, v5, v5, 3
344; CHECK-P8-NEXT:    xscvspdpn f1, v5
345; CHECK-P8-NEXT:    lvx v4, r4, r6
346; CHECK-P8-NEXT:    xxswapd vs3, v5
347; CHECK-P8-NEXT:    xxsldwi vs5, v5, v5, 1
348; CHECK-P8-NEXT:    xxsldwi vs7, v3, v3, 3
349; CHECK-P8-NEXT:    xxswapd vs8, v3
350; CHECK-P8-NEXT:    xscvspdpn f0, vs0
351; CHECK-P8-NEXT:    xscvspdpn f3, vs3
352; CHECK-P8-NEXT:    xscvspdpn f5, vs5
353; CHECK-P8-NEXT:    xscvdpsxws f1, f1
354; CHECK-P8-NEXT:    xscvspdpn f7, vs7
355; CHECK-P8-NEXT:    xscvspdpn f8, vs8
356; CHECK-P8-NEXT:    xscvdpsxws f0, f0
357; CHECK-P8-NEXT:    xscvdpsxws f3, f3
358; CHECK-P8-NEXT:    xscvspdpn f2, v3
359; CHECK-P8-NEXT:    mffprwz r4, f1
360; CHECK-P8-NEXT:    xscvdpsxws f1, f5
361; CHECK-P8-NEXT:    mtvsrd v5, r4
362; CHECK-P8-NEXT:    mffprwz r4, f0
363; CHECK-P8-NEXT:    xxsldwi vs0, v3, v3, 1
364; CHECK-P8-NEXT:    xscvspdpn f4, v2
365; CHECK-P8-NEXT:    xscvdpsxws f5, f7
366; CHECK-P8-NEXT:    xxsldwi vs7, v4, v4, 3
367; CHECK-P8-NEXT:    mtvsrd v3, r4
368; CHECK-P8-NEXT:    mffprwz r4, f3
369; CHECK-P8-NEXT:    xxsldwi vs3, v2, v2, 3
370; CHECK-P8-NEXT:    xscvspdpn f6, v4
371; CHECK-P8-NEXT:    mtvsrd v0, r4
372; CHECK-P8-NEXT:    mffprwz r4, f1
373; CHECK-P8-NEXT:    xscvdpsxws f1, f8
374; CHECK-P8-NEXT:    xxswapd vs8, v4
375; CHECK-P8-NEXT:    xscvspdpn f0, vs0
376; CHECK-P8-NEXT:    xscvdpsxws f2, f2
377; CHECK-P8-NEXT:    mtvsrd v1, r4
378; CHECK-P8-NEXT:    mffprwz r4, f5
379; CHECK-P8-NEXT:    xxswapd vs5, v2
380; CHECK-P8-NEXT:    xscvspdpn f3, vs3
381; CHECK-P8-NEXT:    xscvdpsxws f4, f4
382; CHECK-P8-NEXT:    vmrghh v3, v0, v3
383; CHECK-P8-NEXT:    mtvsrd v0, r4
384; CHECK-P8-NEXT:    mffprwz r4, f1
385; CHECK-P8-NEXT:    xscvdpsxws f6, f6
386; CHECK-P8-NEXT:    xscvspdpn f1, vs5
387; CHECK-P8-NEXT:    xxsldwi vs5, v2, v2, 1
388; CHECK-P8-NEXT:    mtvsrd v6, r4
389; CHECK-P8-NEXT:    mffprwz r4, f2
390; CHECK-P8-NEXT:    xscvdpsxws f0, f0
391; CHECK-P8-NEXT:    vmrghh v2, v5, v1
392; CHECK-P8-NEXT:    vmrghh v5, v6, v0
393; CHECK-P8-NEXT:    mtvsrd v0, r4
394; CHECK-P8-NEXT:    mffprwz r4, f4
395; CHECK-P8-NEXT:    xscvdpsxws f2, f3
396; CHECK-P8-NEXT:    xscvspdpn f5, vs5
397; CHECK-P8-NEXT:    mtvsrd v1, r4
398; CHECK-P8-NEXT:    mffprwz r4, f6
399; CHECK-P8-NEXT:    xscvdpsxws f1, f1
400; CHECK-P8-NEXT:    mtvsrd v6, r4
401; CHECK-P8-NEXT:    mffprwz r4, f0
402; CHECK-P8-NEXT:    xscvspdpn f7, vs7
403; CHECK-P8-NEXT:    mtvsrd v7, r4
404; CHECK-P8-NEXT:    mffprwz r4, f2
405; CHECK-P8-NEXT:    xxsldwi vs2, v4, v4, 1
406; CHECK-P8-NEXT:    xscvspdpn f8, vs8
407; CHECK-P8-NEXT:    xscvdpsxws f0, f5
408; CHECK-P8-NEXT:    mtvsrd v4, r4
409; CHECK-P8-NEXT:    mffprwz r4, f1
410; CHECK-P8-NEXT:    xscvspdpn f1, vs2
411; CHECK-P8-NEXT:    xscvdpsxws f3, f7
412; CHECK-P8-NEXT:    mtvsrd v8, r4
413; CHECK-P8-NEXT:    mffprwz r4, f0
414; CHECK-P8-NEXT:    xscvdpsxws f0, f8
415; CHECK-P8-NEXT:    mtvsrd v9, r4
416; CHECK-P8-NEXT:    xscvdpsxws f1, f1
417; CHECK-P8-NEXT:    mffprwz r4, f3
418; CHECK-P8-NEXT:    vmrghh v0, v0, v7
419; CHECK-P8-NEXT:    mtvsrd v7, r4
420; CHECK-P8-NEXT:    mffprwz r4, f0
421; CHECK-P8-NEXT:    vmrghh v4, v8, v4
422; CHECK-P8-NEXT:    mtvsrd v8, r4
423; CHECK-P8-NEXT:    mffprwz r4, f1
424; CHECK-P8-NEXT:    vmrghh v1, v1, v9
425; CHECK-P8-NEXT:    mtvsrd v9, r4
426; CHECK-P8-NEXT:    vmrghh v7, v8, v7
427; CHECK-P8-NEXT:    vmrghh v6, v6, v9
428; CHECK-P8-NEXT:    vmrglw v2, v2, v3
429; CHECK-P8-NEXT:    vmrglw v3, v0, v5
430; CHECK-P8-NEXT:    vmrglw v4, v1, v4
431; CHECK-P8-NEXT:    vmrglw v5, v6, v7
432; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
433; CHECK-P8-NEXT:    stvx v2, 0, r3
434; CHECK-P8-NEXT:    xxmrgld v3, v5, v4
435; CHECK-P8-NEXT:    stvx v3, r3, r5
436; CHECK-P8-NEXT:    blr
437;
438; CHECK-P9-LABEL: test16elt:
439; CHECK-P9:       # %bb.0: # %entry
440; CHECK-P9-NEXT:    lxv vs2, 0(r4)
441; CHECK-P9-NEXT:    xxsldwi vs3, vs2, vs2, 3
442; CHECK-P9-NEXT:    xxswapd vs4, vs2
443; CHECK-P9-NEXT:    xscvspdpn f3, vs3
444; CHECK-P9-NEXT:    xscvspdpn f4, vs4
445; CHECK-P9-NEXT:    xscvdpsxws f3, f3
446; CHECK-P9-NEXT:    xscvdpsxws f4, f4
447; CHECK-P9-NEXT:    xscvspdpn f5, vs2
448; CHECK-P9-NEXT:    xxsldwi vs2, vs2, vs2, 1
449; CHECK-P9-NEXT:    xscvspdpn f2, vs2
450; CHECK-P9-NEXT:    xscvdpsxws f2, f2
451; CHECK-P9-NEXT:    mffprwz r5, f3
452; CHECK-P9-NEXT:    lxv vs1, 16(r4)
453; CHECK-P9-NEXT:    xxsldwi vs6, vs1, vs1, 3
454; CHECK-P9-NEXT:    xxswapd vs3, vs1
455; CHECK-P9-NEXT:    mtvsrd v2, r5
456; CHECK-P9-NEXT:    mffprwz r5, f4
457; CHECK-P9-NEXT:    xscvdpsxws f4, f5
458; CHECK-P9-NEXT:    xscvspdpn f3, vs3
459; CHECK-P9-NEXT:    mtvsrd v3, r5
460; CHECK-P9-NEXT:    vmrghh v2, v3, v2
461; CHECK-P9-NEXT:    mffprwz r5, f4
462; CHECK-P9-NEXT:    xscvspdpn f4, vs6
463; CHECK-P9-NEXT:    mtvsrd v3, r5
464; CHECK-P9-NEXT:    mffprwz r5, f2
465; CHECK-P9-NEXT:    xscvspdpn f2, vs1
466; CHECK-P9-NEXT:    xxsldwi vs1, vs1, vs1, 1
467; CHECK-P9-NEXT:    xscvdpsxws f4, f4
468; CHECK-P9-NEXT:    xscvdpsxws f3, f3
469; CHECK-P9-NEXT:    lxv vs0, 32(r4)
470; CHECK-P9-NEXT:    mtvsrd v4, r5
471; CHECK-P9-NEXT:    xscvdpsxws f2, f2
472; CHECK-P9-NEXT:    vmrghh v3, v3, v4
473; CHECK-P9-NEXT:    vmrglw v2, v3, v2
474; CHECK-P9-NEXT:    mffprwz r5, f4
475; CHECK-P9-NEXT:    xscvspdpn f1, vs1
476; CHECK-P9-NEXT:    xscvdpsxws f1, f1
477; CHECK-P9-NEXT:    mtvsrd v4, r5
478; CHECK-P9-NEXT:    mffprwz r5, f3
479; CHECK-P9-NEXT:    xxsldwi vs3, vs0, vs0, 3
480; CHECK-P9-NEXT:    mtvsrd v5, r5
481; CHECK-P9-NEXT:    mffprwz r5, f2
482; CHECK-P9-NEXT:    xscvspdpn f2, vs3
483; CHECK-P9-NEXT:    vmrghh v4, v5, v4
484; CHECK-P9-NEXT:    mtvsrd v5, r5
485; CHECK-P9-NEXT:    mffprwz r5, f1
486; CHECK-P9-NEXT:    xxswapd vs1, vs0
487; CHECK-P9-NEXT:    xscvdpsxws f2, f2
488; CHECK-P9-NEXT:    mtvsrd v0, r5
489; CHECK-P9-NEXT:    xscvspdpn f1, vs1
490; CHECK-P9-NEXT:    vmrghh v5, v5, v0
491; CHECK-P9-NEXT:    xscvdpsxws f1, f1
492; CHECK-P9-NEXT:    vmrglw v3, v5, v4
493; CHECK-P9-NEXT:    mffprwz r5, f2
494; CHECK-P9-NEXT:    xscvspdpn f2, vs0
495; CHECK-P9-NEXT:    xxsldwi vs0, vs0, vs0, 1
496; CHECK-P9-NEXT:    mtvsrd v0, r5
497; CHECK-P9-NEXT:    xscvspdpn f0, vs0
498; CHECK-P9-NEXT:    xscvdpsxws f2, f2
499; CHECK-P9-NEXT:    mffprwz r5, f1
500; CHECK-P9-NEXT:    lxv vs1, 48(r4)
501; CHECK-P9-NEXT:    xscvdpsxws f0, f0
502; CHECK-P9-NEXT:    mtvsrd v1, r5
503; CHECK-P9-NEXT:    vmrghh v0, v1, v0
504; CHECK-P9-NEXT:    mffprwz r4, f2
505; CHECK-P9-NEXT:    xxmrgld vs2, v3, v2
506; CHECK-P9-NEXT:    mtvsrd v4, r4
507; CHECK-P9-NEXT:    mffprwz r4, f0
508; CHECK-P9-NEXT:    xxsldwi vs0, vs1, vs1, 3
509; CHECK-P9-NEXT:    mtvsrd v2, r4
510; CHECK-P9-NEXT:    xscvspdpn f0, vs0
511; CHECK-P9-NEXT:    vmrghh v2, v4, v2
512; CHECK-P9-NEXT:    xscvdpsxws f0, f0
513; CHECK-P9-NEXT:    vmrglw v2, v2, v0
514; CHECK-P9-NEXT:    mffprwz r4, f0
515; CHECK-P9-NEXT:    xxswapd vs0, vs1
516; CHECK-P9-NEXT:    mtvsrd v3, r4
517; CHECK-P9-NEXT:    xscvspdpn f0, vs0
518; CHECK-P9-NEXT:    xscvdpsxws f0, f0
519; CHECK-P9-NEXT:    mffprwz r4, f0
520; CHECK-P9-NEXT:    xscvspdpn f0, vs1
521; CHECK-P9-NEXT:    mtvsrd v4, r4
522; CHECK-P9-NEXT:    xscvdpsxws f0, f0
523; CHECK-P9-NEXT:    vmrghh v3, v4, v3
524; CHECK-P9-NEXT:    mffprwz r4, f0
525; CHECK-P9-NEXT:    xxsldwi vs0, vs1, vs1, 1
526; CHECK-P9-NEXT:    mtvsrd v4, r4
527; CHECK-P9-NEXT:    xscvspdpn f0, vs0
528; CHECK-P9-NEXT:    xscvdpsxws f0, f0
529; CHECK-P9-NEXT:    mffprwz r4, f0
530; CHECK-P9-NEXT:    mtvsrd v5, r4
531; CHECK-P9-NEXT:    vmrghh v4, v4, v5
532; CHECK-P9-NEXT:    vmrglw v3, v4, v3
533; CHECK-P9-NEXT:    xxmrgld vs0, v3, v2
534; CHECK-P9-NEXT:    stxv vs0, 16(r3)
535; CHECK-P9-NEXT:    stxv vs2, 0(r3)
536; CHECK-P9-NEXT:    blr
537;
538; CHECK-BE-LABEL: test16elt:
539; CHECK-BE:       # %bb.0: # %entry
540; CHECK-BE-NEXT:    lxv vs1, 16(r4)
541; CHECK-BE-NEXT:    xxsldwi vs2, vs1, vs1, 3
542; CHECK-BE-NEXT:    xscvspdpn f2, vs2
543; CHECK-BE-NEXT:    xxswapd vs3, vs1
544; CHECK-BE-NEXT:    xscvspdpn f3, vs3
545; CHECK-BE-NEXT:    xscvdpsxws f2, f2
546; CHECK-BE-NEXT:    xscvdpsxws f3, f3
547; CHECK-BE-NEXT:    mffprwz r5, f2
548; CHECK-BE-NEXT:    xscvspdpn f4, vs1
549; CHECK-BE-NEXT:    xxsldwi vs1, vs1, vs1, 1
550; CHECK-BE-NEXT:    xscvspdpn f1, vs1
551; CHECK-BE-NEXT:    xscvdpsxws f1, f1
552; CHECK-BE-NEXT:    sldi r5, r5, 48
553; CHECK-BE-NEXT:    mtvsrd v2, r5
554; CHECK-BE-NEXT:    mffprwz r5, f3
555; CHECK-BE-NEXT:    xscvdpsxws f3, f4
556; CHECK-BE-NEXT:    lxv vs0, 0(r4)
557; CHECK-BE-NEXT:    xxsldwi vs2, vs0, vs0, 3
558; CHECK-BE-NEXT:    xscvspdpn f2, vs2
559; CHECK-BE-NEXT:    sldi r5, r5, 48
560; CHECK-BE-NEXT:    mtvsrd v3, r5
561; CHECK-BE-NEXT:    vmrghh v2, v3, v2
562; CHECK-BE-NEXT:    mffprwz r5, f3
563; CHECK-BE-NEXT:    sldi r5, r5, 48
564; CHECK-BE-NEXT:    mtvsrd v3, r5
565; CHECK-BE-NEXT:    mffprwz r5, f1
566; CHECK-BE-NEXT:    xxswapd vs1, vs0
567; CHECK-BE-NEXT:    xscvdpsxws f2, f2
568; CHECK-BE-NEXT:    sldi r5, r5, 48
569; CHECK-BE-NEXT:    xscvspdpn f1, vs1
570; CHECK-BE-NEXT:    mtvsrd v4, r5
571; CHECK-BE-NEXT:    mffprwz r5, f2
572; CHECK-BE-NEXT:    xscvdpsxws f1, f1
573; CHECK-BE-NEXT:    sldi r5, r5, 48
574; CHECK-BE-NEXT:    vmrghh v3, v3, v4
575; CHECK-BE-NEXT:    mtvsrd v4, r5
576; CHECK-BE-NEXT:    vmrghw v2, v3, v2
577; CHECK-BE-NEXT:    mffprwz r5, f1
578; CHECK-BE-NEXT:    xscvspdpn f1, vs0
579; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
580; CHECK-BE-NEXT:    sldi r5, r5, 48
581; CHECK-BE-NEXT:    xscvdpsxws f1, f1
582; CHECK-BE-NEXT:    xscvspdpn f0, vs0
583; CHECK-BE-NEXT:    mtvsrd v5, r5
584; CHECK-BE-NEXT:    xscvdpsxws f0, f0
585; CHECK-BE-NEXT:    vmrghh v4, v5, v4
586; CHECK-BE-NEXT:    mffprwz r5, f1
587; CHECK-BE-NEXT:    lxv vs1, 48(r4)
588; CHECK-BE-NEXT:    sldi r5, r5, 48
589; CHECK-BE-NEXT:    mtvsrd v5, r5
590; CHECK-BE-NEXT:    mffprwz r5, f0
591; CHECK-BE-NEXT:    lxv vs0, 32(r4)
592; CHECK-BE-NEXT:    xscvspdpn f5, vs1
593; CHECK-BE-NEXT:    xxsldwi vs2, vs1, vs1, 3
594; CHECK-BE-NEXT:    xscvspdpn f2, vs2
595; CHECK-BE-NEXT:    xscvdpsxws f5, f5
596; CHECK-BE-NEXT:    sldi r5, r5, 48
597; CHECK-BE-NEXT:    xxswapd vs3, vs1
598; CHECK-BE-NEXT:    mtvsrd v0, r5
599; CHECK-BE-NEXT:    vmrghh v5, v5, v0
600; CHECK-BE-NEXT:    xscvspdpn f3, vs3
601; CHECK-BE-NEXT:    xxsldwi vs1, vs1, vs1, 1
602; CHECK-BE-NEXT:    xscvspdpn f1, vs1
603; CHECK-BE-NEXT:    xscvdpsxws f2, f2
604; CHECK-BE-NEXT:    vmrghw v3, v5, v4
605; CHECK-BE-NEXT:    xscvdpsxws f3, f3
606; CHECK-BE-NEXT:    mffprwz r4, f5
607; CHECK-BE-NEXT:    xxmrghd vs4, v3, v2
608; CHECK-BE-NEXT:    sldi r4, r4, 48
609; CHECK-BE-NEXT:    mtvsrd v2, r4
610; CHECK-BE-NEXT:    mffprwz r4, f2
611; CHECK-BE-NEXT:    xscvdpsxws f1, f1
612; CHECK-BE-NEXT:    stxv vs4, 0(r3)
613; CHECK-BE-NEXT:    sldi r4, r4, 48
614; CHECK-BE-NEXT:    mtvsrd v3, r4
615; CHECK-BE-NEXT:    mffprwz r4, f3
616; CHECK-BE-NEXT:    sldi r4, r4, 48
617; CHECK-BE-NEXT:    mtvsrd v4, r4
618; CHECK-BE-NEXT:    mffprwz r4, f1
619; CHECK-BE-NEXT:    xxsldwi vs1, vs0, vs0, 3
620; CHECK-BE-NEXT:    sldi r4, r4, 48
621; CHECK-BE-NEXT:    xscvspdpn f1, vs1
622; CHECK-BE-NEXT:    xscvdpsxws f1, f1
623; CHECK-BE-NEXT:    vmrghh v3, v4, v3
624; CHECK-BE-NEXT:    mtvsrd v4, r4
625; CHECK-BE-NEXT:    mffprwz r4, f1
626; CHECK-BE-NEXT:    xxswapd vs1, vs0
627; CHECK-BE-NEXT:    xscvspdpn f1, vs1
628; CHECK-BE-NEXT:    xscvdpsxws f1, f1
629; CHECK-BE-NEXT:    vmrghh v2, v2, v4
630; CHECK-BE-NEXT:    sldi r4, r4, 48
631; CHECK-BE-NEXT:    vmrghw v2, v2, v3
632; CHECK-BE-NEXT:    mtvsrd v3, r4
633; CHECK-BE-NEXT:    mffprwz r4, f1
634; CHECK-BE-NEXT:    xscvspdpn f1, vs0
635; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
636; CHECK-BE-NEXT:    sldi r4, r4, 48
637; CHECK-BE-NEXT:    xscvdpsxws f1, f1
638; CHECK-BE-NEXT:    xscvspdpn f0, vs0
639; CHECK-BE-NEXT:    mtvsrd v4, r4
640; CHECK-BE-NEXT:    xscvdpsxws f0, f0
641; CHECK-BE-NEXT:    vmrghh v3, v4, v3
642; CHECK-BE-NEXT:    mffprwz r4, f1
643; CHECK-BE-NEXT:    sldi r4, r4, 48
644; CHECK-BE-NEXT:    mtvsrd v4, r4
645; CHECK-BE-NEXT:    mffprwz r4, f0
646; CHECK-BE-NEXT:    sldi r4, r4, 48
647; CHECK-BE-NEXT:    mtvsrd v5, r4
648; CHECK-BE-NEXT:    vmrghh v4, v4, v5
649; CHECK-BE-NEXT:    vmrghw v3, v4, v3
650; CHECK-BE-NEXT:    xxmrghd vs0, v3, v2
651; CHECK-BE-NEXT:    stxv vs0, 16(r3)
652; CHECK-BE-NEXT:    blr
653entry:
654  %a = load <16 x float>, <16 x float>* %0, align 64
655  %1 = fptoui <16 x float> %a to <16 x i16>
656  store <16 x i16> %1, <16 x i16>* %agg.result, align 32
657  ret void
658}
659
660define i32 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
661; CHECK-P8-LABEL: test2elt_signed:
662; CHECK-P8:       # %bb.0: # %entry
663; CHECK-P8-NEXT:    mtfprd f0, r3
664; CHECK-P8-NEXT:    xxswapd v2, vs0
665; CHECK-P8-NEXT:    xscvspdpn f0, vs0
666; CHECK-P8-NEXT:    xxsldwi vs1, v2, v2, 3
667; CHECK-P8-NEXT:    xscvspdpn f1, vs1
668; CHECK-P8-NEXT:    xscvdpsxws f0, f0
669; CHECK-P8-NEXT:    xscvdpsxws f1, f1
670; CHECK-P8-NEXT:    mffprwz r4, f0
671; CHECK-P8-NEXT:    mtvsrd v3, r4
672; CHECK-P8-NEXT:    mffprwz r3, f1
673; CHECK-P8-NEXT:    mtvsrd v2, r3
674; CHECK-P8-NEXT:    vmrghh v2, v3, v2
675; CHECK-P8-NEXT:    xxswapd vs0, v2
676; CHECK-P8-NEXT:    mffprwz r3, f0
677; CHECK-P8-NEXT:    blr
678;
679; CHECK-P9-LABEL: test2elt_signed:
680; CHECK-P9:       # %bb.0: # %entry
681; CHECK-P9-NEXT:    mtfprd f0, r3
682; CHECK-P9-NEXT:    xxswapd v2, vs0
683; CHECK-P9-NEXT:    xscvspdpn f0, vs0
684; CHECK-P9-NEXT:    xxsldwi vs1, v2, v2, 3
685; CHECK-P9-NEXT:    xscvspdpn f1, vs1
686; CHECK-P9-NEXT:    xscvdpsxws f1, f1
687; CHECK-P9-NEXT:    xscvdpsxws f0, f0
688; CHECK-P9-NEXT:    mffprwz r3, f1
689; CHECK-P9-NEXT:    mtvsrd v2, r3
690; CHECK-P9-NEXT:    mffprwz r3, f0
691; CHECK-P9-NEXT:    mtvsrd v3, r3
692; CHECK-P9-NEXT:    li r3, 0
693; CHECK-P9-NEXT:    vmrghh v2, v3, v2
694; CHECK-P9-NEXT:    vextuwrx r3, r3, v2
695; CHECK-P9-NEXT:    blr
696;
697; CHECK-BE-LABEL: test2elt_signed:
698; CHECK-BE:       # %bb.0: # %entry
699; CHECK-BE-NEXT:    mtfprd f0, r3
700; CHECK-BE-NEXT:    xscvspdpn f1, vs0
701; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
702; CHECK-BE-NEXT:    xscvdpsxws f1, f1
703; CHECK-BE-NEXT:    xscvspdpn f0, vs0
704; CHECK-BE-NEXT:    xscvdpsxws f0, f0
705; CHECK-BE-NEXT:    mffprwz r3, f1
706; CHECK-BE-NEXT:    sldi r3, r3, 48
707; CHECK-BE-NEXT:    mtvsrd v2, r3
708; CHECK-BE-NEXT:    mffprwz r3, f0
709; CHECK-BE-NEXT:    sldi r3, r3, 48
710; CHECK-BE-NEXT:    mtvsrd v3, r3
711; CHECK-BE-NEXT:    li r3, 0
712; CHECK-BE-NEXT:    vmrghh v2, v2, v3
713; CHECK-BE-NEXT:    vextuwlx r3, r3, v2
714; CHECK-BE-NEXT:    blr
715entry:
716  %0 = bitcast i64 %a.coerce to <2 x float>
717  %1 = fptosi <2 x float> %0 to <2 x i16>
718  %2 = bitcast <2 x i16> %1 to i32
719  ret i32 %2
720}
721
722define i64 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
723; CHECK-P8-LABEL: test4elt_signed:
724; CHECK-P8:       # %bb.0: # %entry
725; CHECK-P8-NEXT:    xxsldwi vs0, v2, v2, 3
726; CHECK-P8-NEXT:    xscvspdpn f1, v2
727; CHECK-P8-NEXT:    xxswapd vs2, v2
728; CHECK-P8-NEXT:    xxsldwi vs3, v2, v2, 1
729; CHECK-P8-NEXT:    xscvspdpn f0, vs0
730; CHECK-P8-NEXT:    xscvspdpn f2, vs2
731; CHECK-P8-NEXT:    xscvspdpn f3, vs3
732; CHECK-P8-NEXT:    xscvdpsxws f1, f1
733; CHECK-P8-NEXT:    xscvdpsxws f0, f0
734; CHECK-P8-NEXT:    xscvdpsxws f2, f2
735; CHECK-P8-NEXT:    xscvdpsxws f3, f3
736; CHECK-P8-NEXT:    mffprwz r3, f1
737; CHECK-P8-NEXT:    mtvsrd v2, r3
738; CHECK-P8-NEXT:    mffprwz r3, f0
739; CHECK-P8-NEXT:    mffprwz r4, f2
740; CHECK-P8-NEXT:    mtvsrd v3, r3
741; CHECK-P8-NEXT:    mffprwz r3, f3
742; CHECK-P8-NEXT:    mtvsrd v4, r4
743; CHECK-P8-NEXT:    mtvsrd v5, r3
744; CHECK-P8-NEXT:    vmrghh v3, v4, v3
745; CHECK-P8-NEXT:    vmrghh v2, v2, v5
746; CHECK-P8-NEXT:    vmrglw v2, v2, v3
747; CHECK-P8-NEXT:    xxswapd vs0, v2
748; CHECK-P8-NEXT:    mffprd r3, f0
749; CHECK-P8-NEXT:    blr
750;
751; CHECK-P9-LABEL: test4elt_signed:
752; CHECK-P9:       # %bb.0: # %entry
753; CHECK-P9-NEXT:    xxsldwi vs0, v2, v2, 3
754; CHECK-P9-NEXT:    xscvspdpn f0, vs0
755; CHECK-P9-NEXT:    xscvdpsxws f0, f0
756; CHECK-P9-NEXT:    mffprwz r3, f0
757; CHECK-P9-NEXT:    xxswapd vs0, v2
758; CHECK-P9-NEXT:    mtvsrd v3, r3
759; CHECK-P9-NEXT:    xscvspdpn f0, vs0
760; CHECK-P9-NEXT:    xscvdpsxws f0, f0
761; CHECK-P9-NEXT:    mffprwz r3, f0
762; CHECK-P9-NEXT:    xscvspdpn f0, v2
763; CHECK-P9-NEXT:    mtvsrd v4, r3
764; CHECK-P9-NEXT:    xscvdpsxws f0, f0
765; CHECK-P9-NEXT:    vmrghh v3, v4, v3
766; CHECK-P9-NEXT:    mffprwz r3, f0
767; CHECK-P9-NEXT:    xxsldwi vs0, v2, v2, 1
768; CHECK-P9-NEXT:    mtvsrd v4, r3
769; CHECK-P9-NEXT:    xscvspdpn f0, vs0
770; CHECK-P9-NEXT:    xscvdpsxws f0, f0
771; CHECK-P9-NEXT:    mffprwz r3, f0
772; CHECK-P9-NEXT:    mtvsrd v2, r3
773; CHECK-P9-NEXT:    vmrghh v2, v4, v2
774; CHECK-P9-NEXT:    vmrglw v2, v2, v3
775; CHECK-P9-NEXT:    mfvsrld r3, v2
776; CHECK-P9-NEXT:    blr
777;
778; CHECK-BE-LABEL: test4elt_signed:
779; CHECK-BE:       # %bb.0: # %entry
780; CHECK-BE-NEXT:    xxsldwi vs0, v2, v2, 3
781; CHECK-BE-NEXT:    xscvspdpn f0, vs0
782; CHECK-BE-NEXT:    xscvdpsxws f0, f0
783; CHECK-BE-NEXT:    mffprwz r3, f0
784; CHECK-BE-NEXT:    xxswapd vs0, v2
785; CHECK-BE-NEXT:    sldi r3, r3, 48
786; CHECK-BE-NEXT:    xscvspdpn f0, vs0
787; CHECK-BE-NEXT:    mtvsrd v3, r3
788; CHECK-BE-NEXT:    xscvdpsxws f0, f0
789; CHECK-BE-NEXT:    mffprwz r3, f0
790; CHECK-BE-NEXT:    xscvspdpn f0, v2
791; CHECK-BE-NEXT:    sldi r3, r3, 48
792; CHECK-BE-NEXT:    xscvdpsxws f0, f0
793; CHECK-BE-NEXT:    mtvsrd v4, r3
794; CHECK-BE-NEXT:    vmrghh v3, v4, v3
795; CHECK-BE-NEXT:    mffprwz r3, f0
796; CHECK-BE-NEXT:    xxsldwi vs0, v2, v2, 1
797; CHECK-BE-NEXT:    sldi r3, r3, 48
798; CHECK-BE-NEXT:    xscvspdpn f0, vs0
799; CHECK-BE-NEXT:    mtvsrd v4, r3
800; CHECK-BE-NEXT:    xscvdpsxws f0, f0
801; CHECK-BE-NEXT:    mffprwz r3, f0
802; CHECK-BE-NEXT:    sldi r3, r3, 48
803; CHECK-BE-NEXT:    mtvsrd v2, r3
804; CHECK-BE-NEXT:    vmrghh v2, v4, v2
805; CHECK-BE-NEXT:    vmrghw v2, v2, v3
806; CHECK-BE-NEXT:    mfvsrd r3, v2
807; CHECK-BE-NEXT:    blr
808entry:
809  %0 = fptosi <4 x float> %a to <4 x i16>
810  %1 = bitcast <4 x i16> %0 to i64
811  ret i64 %1
812}
813
814define <8 x i16> @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
815; CHECK-P8-LABEL: test8elt_signed:
816; CHECK-P8:       # %bb.0: # %entry
817; CHECK-P8-NEXT:    lvx v2, 0, r3
818; CHECK-P8-NEXT:    li r4, 16
819; CHECK-P8-NEXT:    lvx v3, r3, r4
820; CHECK-P8-NEXT:    xxsldwi vs0, v2, v2, 3
821; CHECK-P8-NEXT:    xxswapd vs1, v2
822; CHECK-P8-NEXT:    xscvspdpn f2, v2
823; CHECK-P8-NEXT:    xxsldwi vs4, v2, v2, 1
824; CHECK-P8-NEXT:    xxsldwi vs5, v3, v3, 3
825; CHECK-P8-NEXT:    xscvspdpn f3, v3
826; CHECK-P8-NEXT:    xscvspdpn f0, vs0
827; CHECK-P8-NEXT:    xscvspdpn f1, vs1
828; CHECK-P8-NEXT:    xscvspdpn f4, vs4
829; CHECK-P8-NEXT:    xscvspdpn f5, vs5
830; CHECK-P8-NEXT:    xscvdpsxws f2, f2
831; CHECK-P8-NEXT:    xscvdpsxws f3, f3
832; CHECK-P8-NEXT:    xscvdpsxws f0, f0
833; CHECK-P8-NEXT:    xscvdpsxws f1, f1
834; CHECK-P8-NEXT:    mffprwz r3, f0
835; CHECK-P8-NEXT:    xxswapd vs0, v3
836; CHECK-P8-NEXT:    mffprwz r4, f1
837; CHECK-P8-NEXT:    xxsldwi vs1, v3, v3, 1
838; CHECK-P8-NEXT:    mtvsrd v2, r3
839; CHECK-P8-NEXT:    xscvspdpn f0, vs0
840; CHECK-P8-NEXT:    mffprwz r3, f2
841; CHECK-P8-NEXT:    xscvdpsxws f2, f4
842; CHECK-P8-NEXT:    xscvspdpn f1, vs1
843; CHECK-P8-NEXT:    xscvdpsxws f4, f5
844; CHECK-P8-NEXT:    mtvsrd v4, r4
845; CHECK-P8-NEXT:    xscvdpsxws f0, f0
846; CHECK-P8-NEXT:    vmrghh v2, v4, v2
847; CHECK-P8-NEXT:    mffprwz r4, f2
848; CHECK-P8-NEXT:    xscvdpsxws f1, f1
849; CHECK-P8-NEXT:    mtvsrd v3, r3
850; CHECK-P8-NEXT:    mffprwz r3, f3
851; CHECK-P8-NEXT:    mtvsrd v4, r4
852; CHECK-P8-NEXT:    mffprwz r4, f0
853; CHECK-P8-NEXT:    vmrghh v3, v3, v4
854; CHECK-P8-NEXT:    mtvsrd v4, r3
855; CHECK-P8-NEXT:    mffprwz r3, f4
856; CHECK-P8-NEXT:    mtvsrd v0, r4
857; CHECK-P8-NEXT:    mtvsrd v5, r3
858; CHECK-P8-NEXT:    mffprwz r3, f1
859; CHECK-P8-NEXT:    vmrghh v5, v0, v5
860; CHECK-P8-NEXT:    mtvsrd v1, r3
861; CHECK-P8-NEXT:    vmrglw v2, v3, v2
862; CHECK-P8-NEXT:    vmrghh v4, v4, v1
863; CHECK-P8-NEXT:    vmrglw v3, v4, v5
864; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
865; CHECK-P8-NEXT:    blr
866;
867; CHECK-P9-LABEL: test8elt_signed:
868; CHECK-P9:       # %bb.0: # %entry
869; CHECK-P9-NEXT:    lxv vs1, 0(r3)
870; CHECK-P9-NEXT:    xxsldwi vs2, vs1, vs1, 3
871; CHECK-P9-NEXT:    xscvspdpn f2, vs2
872; CHECK-P9-NEXT:    xscvdpsxws f2, f2
873; CHECK-P9-NEXT:    lxv vs0, 16(r3)
874; CHECK-P9-NEXT:    mffprwz r3, f2
875; CHECK-P9-NEXT:    xxswapd vs2, vs1
876; CHECK-P9-NEXT:    mtvsrd v2, r3
877; CHECK-P9-NEXT:    xscvspdpn f2, vs2
878; CHECK-P9-NEXT:    xscvdpsxws f2, f2
879; CHECK-P9-NEXT:    mffprwz r3, f2
880; CHECK-P9-NEXT:    xscvspdpn f2, vs1
881; CHECK-P9-NEXT:    xxsldwi vs1, vs1, vs1, 1
882; CHECK-P9-NEXT:    mtvsrd v3, r3
883; CHECK-P9-NEXT:    xscvspdpn f1, vs1
884; CHECK-P9-NEXT:    xscvdpsxws f2, f2
885; CHECK-P9-NEXT:    vmrghh v2, v3, v2
886; CHECK-P9-NEXT:    xscvdpsxws f1, f1
887; CHECK-P9-NEXT:    mffprwz r3, f2
888; CHECK-P9-NEXT:    mtvsrd v3, r3
889; CHECK-P9-NEXT:    mffprwz r3, f1
890; CHECK-P9-NEXT:    xxsldwi vs1, vs0, vs0, 3
891; CHECK-P9-NEXT:    mtvsrd v4, r3
892; CHECK-P9-NEXT:    xscvspdpn f1, vs1
893; CHECK-P9-NEXT:    vmrghh v3, v3, v4
894; CHECK-P9-NEXT:    xscvdpsxws f1, f1
895; CHECK-P9-NEXT:    vmrglw v2, v3, v2
896; CHECK-P9-NEXT:    mffprwz r3, f1
897; CHECK-P9-NEXT:    xxswapd vs1, vs0
898; CHECK-P9-NEXT:    mtvsrd v3, r3
899; CHECK-P9-NEXT:    xscvspdpn f1, vs1
900; CHECK-P9-NEXT:    xscvdpsxws f1, f1
901; CHECK-P9-NEXT:    mffprwz r3, f1
902; CHECK-P9-NEXT:    xscvspdpn f1, vs0
903; CHECK-P9-NEXT:    xxsldwi vs0, vs0, vs0, 1
904; CHECK-P9-NEXT:    mtvsrd v4, r3
905; CHECK-P9-NEXT:    xscvspdpn f0, vs0
906; CHECK-P9-NEXT:    xscvdpsxws f1, f1
907; CHECK-P9-NEXT:    vmrghh v3, v4, v3
908; CHECK-P9-NEXT:    xscvdpsxws f0, f0
909; CHECK-P9-NEXT:    mffprwz r3, f1
910; CHECK-P9-NEXT:    mtvsrd v4, r3
911; CHECK-P9-NEXT:    mffprwz r3, f0
912; CHECK-P9-NEXT:    mtvsrd v5, r3
913; CHECK-P9-NEXT:    vmrghh v4, v4, v5
914; CHECK-P9-NEXT:    vmrglw v3, v4, v3
915; CHECK-P9-NEXT:    xxmrgld v2, v3, v2
916; CHECK-P9-NEXT:    blr
917;
918; CHECK-BE-LABEL: test8elt_signed:
919; CHECK-BE:       # %bb.0: # %entry
920; CHECK-BE-NEXT:    lxv vs1, 16(r3)
921; CHECK-BE-NEXT:    xxsldwi vs2, vs1, vs1, 3
922; CHECK-BE-NEXT:    xscvspdpn f2, vs2
923; CHECK-BE-NEXT:    xscvdpsxws f2, f2
924; CHECK-BE-NEXT:    lxv vs0, 0(r3)
925; CHECK-BE-NEXT:    mffprwz r3, f2
926; CHECK-BE-NEXT:    xxswapd vs2, vs1
927; CHECK-BE-NEXT:    sldi r3, r3, 48
928; CHECK-BE-NEXT:    xscvspdpn f2, vs2
929; CHECK-BE-NEXT:    mtvsrd v2, r3
930; CHECK-BE-NEXT:    xscvdpsxws f2, f2
931; CHECK-BE-NEXT:    mffprwz r3, f2
932; CHECK-BE-NEXT:    xscvspdpn f2, vs1
933; CHECK-BE-NEXT:    xxsldwi vs1, vs1, vs1, 1
934; CHECK-BE-NEXT:    sldi r3, r3, 48
935; CHECK-BE-NEXT:    xscvdpsxws f2, f2
936; CHECK-BE-NEXT:    xscvspdpn f1, vs1
937; CHECK-BE-NEXT:    mtvsrd v3, r3
938; CHECK-BE-NEXT:    xscvdpsxws f1, f1
939; CHECK-BE-NEXT:    vmrghh v2, v3, v2
940; CHECK-BE-NEXT:    mffprwz r3, f2
941; CHECK-BE-NEXT:    sldi r3, r3, 48
942; CHECK-BE-NEXT:    mtvsrd v3, r3
943; CHECK-BE-NEXT:    mffprwz r3, f1
944; CHECK-BE-NEXT:    xxsldwi vs1, vs0, vs0, 3
945; CHECK-BE-NEXT:    sldi r3, r3, 48
946; CHECK-BE-NEXT:    xscvspdpn f1, vs1
947; CHECK-BE-NEXT:    mtvsrd v4, r3
948; CHECK-BE-NEXT:    xscvdpsxws f1, f1
949; CHECK-BE-NEXT:    mffprwz r3, f1
950; CHECK-BE-NEXT:    xxswapd vs1, vs0
951; CHECK-BE-NEXT:    xscvspdpn f1, vs1
952; CHECK-BE-NEXT:    xscvdpsxws f1, f1
953; CHECK-BE-NEXT:    vmrghh v3, v3, v4
954; CHECK-BE-NEXT:    sldi r3, r3, 48
955; CHECK-BE-NEXT:    vmrghw v2, v3, v2
956; CHECK-BE-NEXT:    mtvsrd v3, r3
957; CHECK-BE-NEXT:    mffprwz r3, f1
958; CHECK-BE-NEXT:    xscvspdpn f1, vs0
959; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
960; CHECK-BE-NEXT:    sldi r3, r3, 48
961; CHECK-BE-NEXT:    xscvdpsxws f1, f1
962; CHECK-BE-NEXT:    xscvspdpn f0, vs0
963; CHECK-BE-NEXT:    mtvsrd v4, r3
964; CHECK-BE-NEXT:    xscvdpsxws f0, f0
965; CHECK-BE-NEXT:    vmrghh v3, v4, v3
966; CHECK-BE-NEXT:    mffprwz r3, f1
967; CHECK-BE-NEXT:    sldi r3, r3, 48
968; CHECK-BE-NEXT:    mtvsrd v4, r3
969; CHECK-BE-NEXT:    mffprwz r3, f0
970; CHECK-BE-NEXT:    sldi r3, r3, 48
971; CHECK-BE-NEXT:    mtvsrd v5, r3
972; CHECK-BE-NEXT:    vmrghh v4, v4, v5
973; CHECK-BE-NEXT:    vmrghw v3, v4, v3
974; CHECK-BE-NEXT:    xxmrghd v2, v3, v2
975; CHECK-BE-NEXT:    blr
976entry:
977  %a = load <8 x float>, <8 x float>* %0, align 32
978  %1 = fptosi <8 x float> %a to <8 x i16>
979  ret <8 x i16> %1
980}
981
982define void @test16elt_signed(<16 x i16>* noalias nocapture sret %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
983; CHECK-P8-LABEL: test16elt_signed:
984; CHECK-P8:       # %bb.0: # %entry
985; CHECK-P8-NEXT:    lvx v5, 0, r4
986; CHECK-P8-NEXT:    li r5, 16
987; CHECK-P8-NEXT:    li r6, 32
988; CHECK-P8-NEXT:    lvx v3, r4, r5
989; CHECK-P8-NEXT:    lvx v2, r4, r6
990; CHECK-P8-NEXT:    li r6, 48
991; CHECK-P8-NEXT:    xxsldwi vs0, v5, v5, 3
992; CHECK-P8-NEXT:    xscvspdpn f1, v5
993; CHECK-P8-NEXT:    lvx v4, r4, r6
994; CHECK-P8-NEXT:    xxswapd vs3, v5
995; CHECK-P8-NEXT:    xxsldwi vs5, v5, v5, 1
996; CHECK-P8-NEXT:    xxsldwi vs7, v3, v3, 3
997; CHECK-P8-NEXT:    xxswapd vs8, v3
998; CHECK-P8-NEXT:    xscvspdpn f0, vs0
999; CHECK-P8-NEXT:    xscvspdpn f3, vs3
1000; CHECK-P8-NEXT:    xscvspdpn f5, vs5
1001; CHECK-P8-NEXT:    xscvdpsxws f1, f1
1002; CHECK-P8-NEXT:    xscvspdpn f7, vs7
1003; CHECK-P8-NEXT:    xscvspdpn f8, vs8
1004; CHECK-P8-NEXT:    xscvdpsxws f0, f0
1005; CHECK-P8-NEXT:    xscvdpsxws f3, f3
1006; CHECK-P8-NEXT:    xscvspdpn f2, v3
1007; CHECK-P8-NEXT:    mffprwz r4, f1
1008; CHECK-P8-NEXT:    xscvdpsxws f1, f5
1009; CHECK-P8-NEXT:    mtvsrd v5, r4
1010; CHECK-P8-NEXT:    mffprwz r4, f0
1011; CHECK-P8-NEXT:    xxsldwi vs0, v3, v3, 1
1012; CHECK-P8-NEXT:    xscvspdpn f4, v2
1013; CHECK-P8-NEXT:    xscvdpsxws f5, f7
1014; CHECK-P8-NEXT:    xxsldwi vs7, v4, v4, 3
1015; CHECK-P8-NEXT:    mtvsrd v3, r4
1016; CHECK-P8-NEXT:    mffprwz r4, f3
1017; CHECK-P8-NEXT:    xxsldwi vs3, v2, v2, 3
1018; CHECK-P8-NEXT:    xscvspdpn f6, v4
1019; CHECK-P8-NEXT:    mtvsrd v0, r4
1020; CHECK-P8-NEXT:    mffprwz r4, f1
1021; CHECK-P8-NEXT:    xscvdpsxws f1, f8
1022; CHECK-P8-NEXT:    xxswapd vs8, v4
1023; CHECK-P8-NEXT:    xscvspdpn f0, vs0
1024; CHECK-P8-NEXT:    xscvdpsxws f2, f2
1025; CHECK-P8-NEXT:    mtvsrd v1, r4
1026; CHECK-P8-NEXT:    mffprwz r4, f5
1027; CHECK-P8-NEXT:    xxswapd vs5, v2
1028; CHECK-P8-NEXT:    xscvspdpn f3, vs3
1029; CHECK-P8-NEXT:    xscvdpsxws f4, f4
1030; CHECK-P8-NEXT:    vmrghh v3, v0, v3
1031; CHECK-P8-NEXT:    mtvsrd v0, r4
1032; CHECK-P8-NEXT:    mffprwz r4, f1
1033; CHECK-P8-NEXT:    xscvdpsxws f6, f6
1034; CHECK-P8-NEXT:    xscvspdpn f1, vs5
1035; CHECK-P8-NEXT:    xxsldwi vs5, v2, v2, 1
1036; CHECK-P8-NEXT:    mtvsrd v6, r4
1037; CHECK-P8-NEXT:    mffprwz r4, f2
1038; CHECK-P8-NEXT:    xscvdpsxws f0, f0
1039; CHECK-P8-NEXT:    vmrghh v2, v5, v1
1040; CHECK-P8-NEXT:    vmrghh v5, v6, v0
1041; CHECK-P8-NEXT:    mtvsrd v0, r4
1042; CHECK-P8-NEXT:    mffprwz r4, f4
1043; CHECK-P8-NEXT:    xscvdpsxws f2, f3
1044; CHECK-P8-NEXT:    xscvspdpn f5, vs5
1045; CHECK-P8-NEXT:    mtvsrd v1, r4
1046; CHECK-P8-NEXT:    mffprwz r4, f6
1047; CHECK-P8-NEXT:    xscvdpsxws f1, f1
1048; CHECK-P8-NEXT:    mtvsrd v6, r4
1049; CHECK-P8-NEXT:    mffprwz r4, f0
1050; CHECK-P8-NEXT:    xscvspdpn f7, vs7
1051; CHECK-P8-NEXT:    mtvsrd v7, r4
1052; CHECK-P8-NEXT:    mffprwz r4, f2
1053; CHECK-P8-NEXT:    xxsldwi vs2, v4, v4, 1
1054; CHECK-P8-NEXT:    xscvspdpn f8, vs8
1055; CHECK-P8-NEXT:    xscvdpsxws f0, f5
1056; CHECK-P8-NEXT:    mtvsrd v4, r4
1057; CHECK-P8-NEXT:    mffprwz r4, f1
1058; CHECK-P8-NEXT:    xscvspdpn f1, vs2
1059; CHECK-P8-NEXT:    xscvdpsxws f3, f7
1060; CHECK-P8-NEXT:    mtvsrd v8, r4
1061; CHECK-P8-NEXT:    mffprwz r4, f0
1062; CHECK-P8-NEXT:    xscvdpsxws f0, f8
1063; CHECK-P8-NEXT:    mtvsrd v9, r4
1064; CHECK-P8-NEXT:    xscvdpsxws f1, f1
1065; CHECK-P8-NEXT:    mffprwz r4, f3
1066; CHECK-P8-NEXT:    vmrghh v0, v0, v7
1067; CHECK-P8-NEXT:    mtvsrd v7, r4
1068; CHECK-P8-NEXT:    mffprwz r4, f0
1069; CHECK-P8-NEXT:    vmrghh v4, v8, v4
1070; CHECK-P8-NEXT:    mtvsrd v8, r4
1071; CHECK-P8-NEXT:    mffprwz r4, f1
1072; CHECK-P8-NEXT:    vmrghh v1, v1, v9
1073; CHECK-P8-NEXT:    mtvsrd v9, r4
1074; CHECK-P8-NEXT:    vmrghh v7, v8, v7
1075; CHECK-P8-NEXT:    vmrghh v6, v6, v9
1076; CHECK-P8-NEXT:    vmrglw v2, v2, v3
1077; CHECK-P8-NEXT:    vmrglw v3, v0, v5
1078; CHECK-P8-NEXT:    vmrglw v4, v1, v4
1079; CHECK-P8-NEXT:    vmrglw v5, v6, v7
1080; CHECK-P8-NEXT:    xxmrgld v2, v3, v2
1081; CHECK-P8-NEXT:    stvx v2, 0, r3
1082; CHECK-P8-NEXT:    xxmrgld v3, v5, v4
1083; CHECK-P8-NEXT:    stvx v3, r3, r5
1084; CHECK-P8-NEXT:    blr
1085;
1086; CHECK-P9-LABEL: test16elt_signed:
1087; CHECK-P9:       # %bb.0: # %entry
1088; CHECK-P9-NEXT:    lxv vs2, 0(r4)
1089; CHECK-P9-NEXT:    xxsldwi vs3, vs2, vs2, 3
1090; CHECK-P9-NEXT:    xxswapd vs4, vs2
1091; CHECK-P9-NEXT:    xscvspdpn f3, vs3
1092; CHECK-P9-NEXT:    xscvspdpn f4, vs4
1093; CHECK-P9-NEXT:    xscvdpsxws f3, f3
1094; CHECK-P9-NEXT:    xscvdpsxws f4, f4
1095; CHECK-P9-NEXT:    xscvspdpn f5, vs2
1096; CHECK-P9-NEXT:    xxsldwi vs2, vs2, vs2, 1
1097; CHECK-P9-NEXT:    xscvspdpn f2, vs2
1098; CHECK-P9-NEXT:    xscvdpsxws f2, f2
1099; CHECK-P9-NEXT:    mffprwz r5, f3
1100; CHECK-P9-NEXT:    lxv vs1, 16(r4)
1101; CHECK-P9-NEXT:    xxsldwi vs6, vs1, vs1, 3
1102; CHECK-P9-NEXT:    xxswapd vs3, vs1
1103; CHECK-P9-NEXT:    mtvsrd v2, r5
1104; CHECK-P9-NEXT:    mffprwz r5, f4
1105; CHECK-P9-NEXT:    xscvdpsxws f4, f5
1106; CHECK-P9-NEXT:    xscvspdpn f3, vs3
1107; CHECK-P9-NEXT:    mtvsrd v3, r5
1108; CHECK-P9-NEXT:    vmrghh v2, v3, v2
1109; CHECK-P9-NEXT:    mffprwz r5, f4
1110; CHECK-P9-NEXT:    xscvspdpn f4, vs6
1111; CHECK-P9-NEXT:    mtvsrd v3, r5
1112; CHECK-P9-NEXT:    mffprwz r5, f2
1113; CHECK-P9-NEXT:    xscvspdpn f2, vs1
1114; CHECK-P9-NEXT:    xxsldwi vs1, vs1, vs1, 1
1115; CHECK-P9-NEXT:    xscvdpsxws f4, f4
1116; CHECK-P9-NEXT:    xscvdpsxws f3, f3
1117; CHECK-P9-NEXT:    lxv vs0, 32(r4)
1118; CHECK-P9-NEXT:    mtvsrd v4, r5
1119; CHECK-P9-NEXT:    xscvdpsxws f2, f2
1120; CHECK-P9-NEXT:    vmrghh v3, v3, v4
1121; CHECK-P9-NEXT:    vmrglw v2, v3, v2
1122; CHECK-P9-NEXT:    mffprwz r5, f4
1123; CHECK-P9-NEXT:    xscvspdpn f1, vs1
1124; CHECK-P9-NEXT:    xscvdpsxws f1, f1
1125; CHECK-P9-NEXT:    mtvsrd v4, r5
1126; CHECK-P9-NEXT:    mffprwz r5, f3
1127; CHECK-P9-NEXT:    xxsldwi vs3, vs0, vs0, 3
1128; CHECK-P9-NEXT:    mtvsrd v5, r5
1129; CHECK-P9-NEXT:    mffprwz r5, f2
1130; CHECK-P9-NEXT:    xscvspdpn f2, vs3
1131; CHECK-P9-NEXT:    vmrghh v4, v5, v4
1132; CHECK-P9-NEXT:    mtvsrd v5, r5
1133; CHECK-P9-NEXT:    mffprwz r5, f1
1134; CHECK-P9-NEXT:    xxswapd vs1, vs0
1135; CHECK-P9-NEXT:    xscvdpsxws f2, f2
1136; CHECK-P9-NEXT:    mtvsrd v0, r5
1137; CHECK-P9-NEXT:    xscvspdpn f1, vs1
1138; CHECK-P9-NEXT:    vmrghh v5, v5, v0
1139; CHECK-P9-NEXT:    xscvdpsxws f1, f1
1140; CHECK-P9-NEXT:    vmrglw v3, v5, v4
1141; CHECK-P9-NEXT:    mffprwz r5, f2
1142; CHECK-P9-NEXT:    xscvspdpn f2, vs0
1143; CHECK-P9-NEXT:    xxsldwi vs0, vs0, vs0, 1
1144; CHECK-P9-NEXT:    mtvsrd v0, r5
1145; CHECK-P9-NEXT:    xscvspdpn f0, vs0
1146; CHECK-P9-NEXT:    xscvdpsxws f2, f2
1147; CHECK-P9-NEXT:    mffprwz r5, f1
1148; CHECK-P9-NEXT:    lxv vs1, 48(r4)
1149; CHECK-P9-NEXT:    xscvdpsxws f0, f0
1150; CHECK-P9-NEXT:    mtvsrd v1, r5
1151; CHECK-P9-NEXT:    vmrghh v0, v1, v0
1152; CHECK-P9-NEXT:    mffprwz r4, f2
1153; CHECK-P9-NEXT:    xxmrgld vs2, v3, v2
1154; CHECK-P9-NEXT:    mtvsrd v4, r4
1155; CHECK-P9-NEXT:    mffprwz r4, f0
1156; CHECK-P9-NEXT:    xxsldwi vs0, vs1, vs1, 3
1157; CHECK-P9-NEXT:    mtvsrd v2, r4
1158; CHECK-P9-NEXT:    xscvspdpn f0, vs0
1159; CHECK-P9-NEXT:    vmrghh v2, v4, v2
1160; CHECK-P9-NEXT:    xscvdpsxws f0, f0
1161; CHECK-P9-NEXT:    vmrglw v2, v2, v0
1162; CHECK-P9-NEXT:    mffprwz r4, f0
1163; CHECK-P9-NEXT:    xxswapd vs0, vs1
1164; CHECK-P9-NEXT:    mtvsrd v3, r4
1165; CHECK-P9-NEXT:    xscvspdpn f0, vs0
1166; CHECK-P9-NEXT:    xscvdpsxws f0, f0
1167; CHECK-P9-NEXT:    mffprwz r4, f0
1168; CHECK-P9-NEXT:    xscvspdpn f0, vs1
1169; CHECK-P9-NEXT:    mtvsrd v4, r4
1170; CHECK-P9-NEXT:    xscvdpsxws f0, f0
1171; CHECK-P9-NEXT:    vmrghh v3, v4, v3
1172; CHECK-P9-NEXT:    mffprwz r4, f0
1173; CHECK-P9-NEXT:    xxsldwi vs0, vs1, vs1, 1
1174; CHECK-P9-NEXT:    mtvsrd v4, r4
1175; CHECK-P9-NEXT:    xscvspdpn f0, vs0
1176; CHECK-P9-NEXT:    xscvdpsxws f0, f0
1177; CHECK-P9-NEXT:    mffprwz r4, f0
1178; CHECK-P9-NEXT:    mtvsrd v5, r4
1179; CHECK-P9-NEXT:    vmrghh v4, v4, v5
1180; CHECK-P9-NEXT:    vmrglw v3, v4, v3
1181; CHECK-P9-NEXT:    xxmrgld vs0, v3, v2
1182; CHECK-P9-NEXT:    stxv vs0, 16(r3)
1183; CHECK-P9-NEXT:    stxv vs2, 0(r3)
1184; CHECK-P9-NEXT:    blr
1185;
1186; CHECK-BE-LABEL: test16elt_signed:
1187; CHECK-BE:       # %bb.0: # %entry
1188; CHECK-BE-NEXT:    lxv vs1, 16(r4)
1189; CHECK-BE-NEXT:    xxsldwi vs2, vs1, vs1, 3
1190; CHECK-BE-NEXT:    xscvspdpn f2, vs2
1191; CHECK-BE-NEXT:    xxswapd vs3, vs1
1192; CHECK-BE-NEXT:    xscvspdpn f3, vs3
1193; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1194; CHECK-BE-NEXT:    xscvdpsxws f3, f3
1195; CHECK-BE-NEXT:    mffprwz r5, f2
1196; CHECK-BE-NEXT:    xscvspdpn f4, vs1
1197; CHECK-BE-NEXT:    xxsldwi vs1, vs1, vs1, 1
1198; CHECK-BE-NEXT:    xscvspdpn f1, vs1
1199; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1200; CHECK-BE-NEXT:    sldi r5, r5, 48
1201; CHECK-BE-NEXT:    mtvsrd v2, r5
1202; CHECK-BE-NEXT:    mffprwz r5, f3
1203; CHECK-BE-NEXT:    xscvdpsxws f3, f4
1204; CHECK-BE-NEXT:    lxv vs0, 0(r4)
1205; CHECK-BE-NEXT:    xxsldwi vs2, vs0, vs0, 3
1206; CHECK-BE-NEXT:    xscvspdpn f2, vs2
1207; CHECK-BE-NEXT:    sldi r5, r5, 48
1208; CHECK-BE-NEXT:    mtvsrd v3, r5
1209; CHECK-BE-NEXT:    vmrghh v2, v3, v2
1210; CHECK-BE-NEXT:    mffprwz r5, f3
1211; CHECK-BE-NEXT:    sldi r5, r5, 48
1212; CHECK-BE-NEXT:    mtvsrd v3, r5
1213; CHECK-BE-NEXT:    mffprwz r5, f1
1214; CHECK-BE-NEXT:    xxswapd vs1, vs0
1215; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1216; CHECK-BE-NEXT:    sldi r5, r5, 48
1217; CHECK-BE-NEXT:    xscvspdpn f1, vs1
1218; CHECK-BE-NEXT:    mtvsrd v4, r5
1219; CHECK-BE-NEXT:    mffprwz r5, f2
1220; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1221; CHECK-BE-NEXT:    sldi r5, r5, 48
1222; CHECK-BE-NEXT:    vmrghh v3, v3, v4
1223; CHECK-BE-NEXT:    mtvsrd v4, r5
1224; CHECK-BE-NEXT:    vmrghw v2, v3, v2
1225; CHECK-BE-NEXT:    mffprwz r5, f1
1226; CHECK-BE-NEXT:    xscvspdpn f1, vs0
1227; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
1228; CHECK-BE-NEXT:    sldi r5, r5, 48
1229; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1230; CHECK-BE-NEXT:    xscvspdpn f0, vs0
1231; CHECK-BE-NEXT:    mtvsrd v5, r5
1232; CHECK-BE-NEXT:    xscvdpsxws f0, f0
1233; CHECK-BE-NEXT:    vmrghh v4, v5, v4
1234; CHECK-BE-NEXT:    mffprwz r5, f1
1235; CHECK-BE-NEXT:    lxv vs1, 48(r4)
1236; CHECK-BE-NEXT:    sldi r5, r5, 48
1237; CHECK-BE-NEXT:    mtvsrd v5, r5
1238; CHECK-BE-NEXT:    mffprwz r5, f0
1239; CHECK-BE-NEXT:    lxv vs0, 32(r4)
1240; CHECK-BE-NEXT:    xscvspdpn f5, vs1
1241; CHECK-BE-NEXT:    xxsldwi vs2, vs1, vs1, 3
1242; CHECK-BE-NEXT:    xscvspdpn f2, vs2
1243; CHECK-BE-NEXT:    xscvdpsxws f5, f5
1244; CHECK-BE-NEXT:    sldi r5, r5, 48
1245; CHECK-BE-NEXT:    xxswapd vs3, vs1
1246; CHECK-BE-NEXT:    mtvsrd v0, r5
1247; CHECK-BE-NEXT:    vmrghh v5, v5, v0
1248; CHECK-BE-NEXT:    xscvspdpn f3, vs3
1249; CHECK-BE-NEXT:    xxsldwi vs1, vs1, vs1, 1
1250; CHECK-BE-NEXT:    xscvspdpn f1, vs1
1251; CHECK-BE-NEXT:    xscvdpsxws f2, f2
1252; CHECK-BE-NEXT:    vmrghw v3, v5, v4
1253; CHECK-BE-NEXT:    xscvdpsxws f3, f3
1254; CHECK-BE-NEXT:    mffprwz r4, f5
1255; CHECK-BE-NEXT:    xxmrghd vs4, v3, v2
1256; CHECK-BE-NEXT:    sldi r4, r4, 48
1257; CHECK-BE-NEXT:    mtvsrd v2, r4
1258; CHECK-BE-NEXT:    mffprwz r4, f2
1259; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1260; CHECK-BE-NEXT:    stxv vs4, 0(r3)
1261; CHECK-BE-NEXT:    sldi r4, r4, 48
1262; CHECK-BE-NEXT:    mtvsrd v3, r4
1263; CHECK-BE-NEXT:    mffprwz r4, f3
1264; CHECK-BE-NEXT:    sldi r4, r4, 48
1265; CHECK-BE-NEXT:    mtvsrd v4, r4
1266; CHECK-BE-NEXT:    mffprwz r4, f1
1267; CHECK-BE-NEXT:    xxsldwi vs1, vs0, vs0, 3
1268; CHECK-BE-NEXT:    sldi r4, r4, 48
1269; CHECK-BE-NEXT:    xscvspdpn f1, vs1
1270; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1271; CHECK-BE-NEXT:    vmrghh v3, v4, v3
1272; CHECK-BE-NEXT:    mtvsrd v4, r4
1273; CHECK-BE-NEXT:    mffprwz r4, f1
1274; CHECK-BE-NEXT:    xxswapd vs1, vs0
1275; CHECK-BE-NEXT:    xscvspdpn f1, vs1
1276; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1277; CHECK-BE-NEXT:    vmrghh v2, v2, v4
1278; CHECK-BE-NEXT:    sldi r4, r4, 48
1279; CHECK-BE-NEXT:    vmrghw v2, v2, v3
1280; CHECK-BE-NEXT:    mtvsrd v3, r4
1281; CHECK-BE-NEXT:    mffprwz r4, f1
1282; CHECK-BE-NEXT:    xscvspdpn f1, vs0
1283; CHECK-BE-NEXT:    xxsldwi vs0, vs0, vs0, 1
1284; CHECK-BE-NEXT:    sldi r4, r4, 48
1285; CHECK-BE-NEXT:    xscvdpsxws f1, f1
1286; CHECK-BE-NEXT:    xscvspdpn f0, vs0
1287; CHECK-BE-NEXT:    mtvsrd v4, r4
1288; CHECK-BE-NEXT:    xscvdpsxws f0, f0
1289; CHECK-BE-NEXT:    vmrghh v3, v4, v3
1290; CHECK-BE-NEXT:    mffprwz r4, f1
1291; CHECK-BE-NEXT:    sldi r4, r4, 48
1292; CHECK-BE-NEXT:    mtvsrd v4, r4
1293; CHECK-BE-NEXT:    mffprwz r4, f0
1294; CHECK-BE-NEXT:    sldi r4, r4, 48
1295; CHECK-BE-NEXT:    mtvsrd v5, r4
1296; CHECK-BE-NEXT:    vmrghh v4, v4, v5
1297; CHECK-BE-NEXT:    vmrghw v3, v4, v3
1298; CHECK-BE-NEXT:    xxmrghd vs0, v3, v2
1299; CHECK-BE-NEXT:    stxv vs0, 16(r3)
1300; CHECK-BE-NEXT:    blr
1301entry:
1302  %a = load <16 x float>, <16 x float>* %0, align 64
1303  %1 = fptosi <16 x float> %a to <16 x i16>
1304  store <16 x i16> %1, <16 x i16>* %agg.result, align 32
1305  ret void
1306}
1307