1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple riscv32 -o - %s | FileCheck %s 3; This test has been minimized from GCC Torture Suite's regstack-1.c 4; and checks that RISCVInstrInfo::storeRegToStackSlot works at the basic 5; level. 6 7@U = external local_unnamed_addr global fp128, align 16 8@Y1 = external local_unnamed_addr global fp128, align 16 9@X = external local_unnamed_addr global fp128, align 16 10@Y = external local_unnamed_addr global fp128, align 16 11@T = external local_unnamed_addr global fp128, align 16 12@S = external local_unnamed_addr global fp128, align 16 13 14define void @main() local_unnamed_addr nounwind { 15; CHECK-LABEL: main: 16; CHECK: # %bb.0: 17; CHECK-NEXT: addi sp, sp, -688 18; CHECK-NEXT: sw ra, 684(sp) 19; CHECK-NEXT: sw s0, 680(sp) 20; CHECK-NEXT: sw s1, 676(sp) 21; CHECK-NEXT: sw s2, 672(sp) 22; CHECK-NEXT: sw s3, 668(sp) 23; CHECK-NEXT: sw s4, 664(sp) 24; CHECK-NEXT: sw s5, 660(sp) 25; CHECK-NEXT: sw s6, 656(sp) 26; CHECK-NEXT: sw s7, 652(sp) 27; CHECK-NEXT: sw s8, 648(sp) 28; CHECK-NEXT: sw s9, 644(sp) 29; CHECK-NEXT: sw s10, 640(sp) 30; CHECK-NEXT: sw s11, 636(sp) 31; CHECK-NEXT: lui a0, %hi(U) 32; CHECK-NEXT: lw s6, %lo(U)(a0) 33; CHECK-NEXT: lw s7, %lo(U+4)(a0) 34; CHECK-NEXT: lw s8, %lo(U+8)(a0) 35; CHECK-NEXT: lw s0, %lo(U+12)(a0) 36; CHECK-NEXT: sw zero, 612(sp) 37; CHECK-NEXT: sw zero, 608(sp) 38; CHECK-NEXT: sw zero, 604(sp) 39; CHECK-NEXT: sw zero, 600(sp) 40; CHECK-NEXT: sw s0, 596(sp) 41; CHECK-NEXT: sw s8, 592(sp) 42; CHECK-NEXT: sw s7, 588(sp) 43; CHECK-NEXT: addi a0, sp, 616 44; CHECK-NEXT: addi a1, sp, 600 45; CHECK-NEXT: addi a2, sp, 584 46; CHECK-NEXT: sw s6, 584(sp) 47; CHECK-NEXT: call __subtf3 48; CHECK-NEXT: lw s3, 616(sp) 49; CHECK-NEXT: lw s4, 620(sp) 50; CHECK-NEXT: lw s9, 624(sp) 51; CHECK-NEXT: lw s11, 628(sp) 52; CHECK-NEXT: sw s0, 548(sp) 53; CHECK-NEXT: sw s8, 544(sp) 54; CHECK-NEXT: sw s7, 540(sp) 55; CHECK-NEXT: sw s6, 536(sp) 56; CHECK-NEXT: sw s11, 564(sp) 57; CHECK-NEXT: sw s9, 560(sp) 58; CHECK-NEXT: sw s4, 556(sp) 59; CHECK-NEXT: addi a0, sp, 568 60; CHECK-NEXT: addi a1, sp, 552 61; CHECK-NEXT: addi a2, sp, 536 62; CHECK-NEXT: sw s3, 552(sp) 63; CHECK-NEXT: call __subtf3 64; CHECK-NEXT: lw a0, 568(sp) 65; CHECK-NEXT: sw a0, 40(sp) 66; CHECK-NEXT: lw a0, 572(sp) 67; CHECK-NEXT: sw a0, 32(sp) 68; CHECK-NEXT: lw a0, 576(sp) 69; CHECK-NEXT: sw a0, 24(sp) 70; CHECK-NEXT: lw a0, 580(sp) 71; CHECK-NEXT: sw a0, 16(sp) 72; CHECK-NEXT: sw zero, 500(sp) 73; CHECK-NEXT: sw zero, 496(sp) 74; CHECK-NEXT: sw zero, 492(sp) 75; CHECK-NEXT: sw zero, 488(sp) 76; CHECK-NEXT: sw s0, 516(sp) 77; CHECK-NEXT: sw s8, 512(sp) 78; CHECK-NEXT: sw s7, 508(sp) 79; CHECK-NEXT: addi a0, sp, 520 80; CHECK-NEXT: addi a1, sp, 504 81; CHECK-NEXT: addi a2, sp, 488 82; CHECK-NEXT: sw s6, 504(sp) 83; CHECK-NEXT: call __addtf3 84; CHECK-NEXT: lw s2, 520(sp) 85; CHECK-NEXT: lw s10, 524(sp) 86; CHECK-NEXT: lw s5, 528(sp) 87; CHECK-NEXT: lw s1, 532(sp) 88; CHECK-NEXT: sw s1, 8(sp) 89; CHECK-NEXT: lui a0, %hi(Y1) 90; CHECK-NEXT: lw a1, %lo(Y1)(a0) 91; CHECK-NEXT: sw a1, 48(sp) 92; CHECK-NEXT: lw a2, %lo(Y1+4)(a0) 93; CHECK-NEXT: sw a2, 52(sp) 94; CHECK-NEXT: lw a3, %lo(Y1+8)(a0) 95; CHECK-NEXT: sw a3, 4(sp) 96; CHECK-NEXT: lw a0, %lo(Y1+12)(a0) 97; CHECK-NEXT: sw a0, 0(sp) 98; CHECK-NEXT: sw a0, 308(sp) 99; CHECK-NEXT: sw a3, 304(sp) 100; CHECK-NEXT: sw a2, 300(sp) 101; CHECK-NEXT: sw a1, 296(sp) 102; CHECK-NEXT: sw s11, 324(sp) 103; CHECK-NEXT: sw s9, 320(sp) 104; CHECK-NEXT: sw s4, 316(sp) 105; CHECK-NEXT: addi a0, sp, 328 106; CHECK-NEXT: addi a1, sp, 312 107; CHECK-NEXT: addi a2, sp, 296 108; CHECK-NEXT: sw s3, 312(sp) 109; CHECK-NEXT: call __multf3 110; CHECK-NEXT: lw a0, 328(sp) 111; CHECK-NEXT: sw a0, 44(sp) 112; CHECK-NEXT: lw a0, 332(sp) 113; CHECK-NEXT: sw a0, 36(sp) 114; CHECK-NEXT: lw a0, 336(sp) 115; CHECK-NEXT: sw a0, 28(sp) 116; CHECK-NEXT: lw a0, 340(sp) 117; CHECK-NEXT: sw a0, 20(sp) 118; CHECK-NEXT: sw s0, 468(sp) 119; CHECK-NEXT: sw s8, 464(sp) 120; CHECK-NEXT: sw s7, 460(sp) 121; CHECK-NEXT: sw s6, 456(sp) 122; CHECK-NEXT: sw s1, 452(sp) 123; CHECK-NEXT: sw s5, 448(sp) 124; CHECK-NEXT: sw s10, 444(sp) 125; CHECK-NEXT: addi a0, sp, 472 126; CHECK-NEXT: addi a1, sp, 456 127; CHECK-NEXT: addi a2, sp, 440 128; CHECK-NEXT: sw s2, 440(sp) 129; CHECK-NEXT: call __addtf3 130; CHECK-NEXT: lw a3, 472(sp) 131; CHECK-NEXT: lw a0, 476(sp) 132; CHECK-NEXT: lw a1, 480(sp) 133; CHECK-NEXT: lw a2, 484(sp) 134; CHECK-NEXT: sw zero, 420(sp) 135; CHECK-NEXT: sw zero, 416(sp) 136; CHECK-NEXT: sw zero, 412(sp) 137; CHECK-NEXT: sw zero, 408(sp) 138; CHECK-NEXT: sw a2, 404(sp) 139; CHECK-NEXT: sw a1, 400(sp) 140; CHECK-NEXT: sw a0, 396(sp) 141; CHECK-NEXT: addi a0, sp, 424 142; CHECK-NEXT: addi a1, sp, 408 143; CHECK-NEXT: addi a2, sp, 392 144; CHECK-NEXT: sw a3, 392(sp) 145; CHECK-NEXT: call __subtf3 146; CHECK-NEXT: lw a0, 424(sp) 147; CHECK-NEXT: lw a1, 436(sp) 148; CHECK-NEXT: lw a2, 432(sp) 149; CHECK-NEXT: lw a3, 428(sp) 150; CHECK-NEXT: lui a4, %hi(X) 151; CHECK-NEXT: sw a1, %lo(X+12)(a4) 152; CHECK-NEXT: sw a2, %lo(X+8)(a4) 153; CHECK-NEXT: sw a3, %lo(X+4)(a4) 154; CHECK-NEXT: sw a0, %lo(X)(a4) 155; CHECK-NEXT: lw s8, 0(sp) 156; CHECK-NEXT: sw s8, 212(sp) 157; CHECK-NEXT: lw s7, 4(sp) 158; CHECK-NEXT: sw s7, 208(sp) 159; CHECK-NEXT: lw a0, 52(sp) 160; CHECK-NEXT: sw a0, 204(sp) 161; CHECK-NEXT: lw a0, 48(sp) 162; CHECK-NEXT: sw a0, 200(sp) 163; CHECK-NEXT: lw s6, 16(sp) 164; CHECK-NEXT: sw s6, 228(sp) 165; CHECK-NEXT: lw s4, 24(sp) 166; CHECK-NEXT: sw s4, 224(sp) 167; CHECK-NEXT: lw s0, 32(sp) 168; CHECK-NEXT: sw s0, 220(sp) 169; CHECK-NEXT: addi a0, sp, 232 170; CHECK-NEXT: addi a1, sp, 216 171; CHECK-NEXT: addi a2, sp, 200 172; CHECK-NEXT: lw s1, 40(sp) 173; CHECK-NEXT: sw s1, 216(sp) 174; CHECK-NEXT: call __multf3 175; CHECK-NEXT: lw a0, 232(sp) 176; CHECK-NEXT: sw a0, 12(sp) 177; CHECK-NEXT: lw s3, 236(sp) 178; CHECK-NEXT: lw s9, 240(sp) 179; CHECK-NEXT: lw s11, 244(sp) 180; CHECK-NEXT: sw zero, 356(sp) 181; CHECK-NEXT: sw zero, 352(sp) 182; CHECK-NEXT: sw zero, 348(sp) 183; CHECK-NEXT: sw zero, 344(sp) 184; CHECK-NEXT: lw a0, 8(sp) 185; CHECK-NEXT: sw a0, 372(sp) 186; CHECK-NEXT: sw s5, 368(sp) 187; CHECK-NEXT: sw s10, 364(sp) 188; CHECK-NEXT: addi a0, sp, 376 189; CHECK-NEXT: addi a1, sp, 360 190; CHECK-NEXT: addi a2, sp, 344 191; CHECK-NEXT: sw s2, 360(sp) 192; CHECK-NEXT: call __multf3 193; CHECK-NEXT: lw a0, 376(sp) 194; CHECK-NEXT: lw a1, 388(sp) 195; CHECK-NEXT: lw a2, 384(sp) 196; CHECK-NEXT: lw a3, 380(sp) 197; CHECK-NEXT: lui a4, %hi(S) 198; CHECK-NEXT: sw a1, %lo(S+12)(a4) 199; CHECK-NEXT: sw a2, %lo(S+8)(a4) 200; CHECK-NEXT: sw a3, %lo(S+4)(a4) 201; CHECK-NEXT: sw a0, %lo(S)(a4) 202; CHECK-NEXT: sw s6, 260(sp) 203; CHECK-NEXT: sw s4, 256(sp) 204; CHECK-NEXT: sw s0, 252(sp) 205; CHECK-NEXT: sw s1, 248(sp) 206; CHECK-NEXT: lw a0, 20(sp) 207; CHECK-NEXT: sw a0, 276(sp) 208; CHECK-NEXT: lw a0, 28(sp) 209; CHECK-NEXT: sw a0, 272(sp) 210; CHECK-NEXT: lw a0, 36(sp) 211; CHECK-NEXT: sw a0, 268(sp) 212; CHECK-NEXT: addi a0, sp, 280 213; CHECK-NEXT: addi a1, sp, 264 214; CHECK-NEXT: addi a2, sp, 248 215; CHECK-NEXT: lw a3, 44(sp) 216; CHECK-NEXT: sw a3, 264(sp) 217; CHECK-NEXT: call __subtf3 218; CHECK-NEXT: lw a0, 280(sp) 219; CHECK-NEXT: lw a1, 292(sp) 220; CHECK-NEXT: lw a2, 288(sp) 221; CHECK-NEXT: lw a3, 284(sp) 222; CHECK-NEXT: lui a4, %hi(T) 223; CHECK-NEXT: sw a1, %lo(T+12)(a4) 224; CHECK-NEXT: sw a2, %lo(T+8)(a4) 225; CHECK-NEXT: sw a3, %lo(T+4)(a4) 226; CHECK-NEXT: sw a0, %lo(T)(a4) 227; CHECK-NEXT: sw zero, 164(sp) 228; CHECK-NEXT: sw zero, 160(sp) 229; CHECK-NEXT: sw zero, 156(sp) 230; CHECK-NEXT: sw zero, 152(sp) 231; CHECK-NEXT: sw s11, 180(sp) 232; CHECK-NEXT: sw s9, 176(sp) 233; CHECK-NEXT: sw s3, 172(sp) 234; CHECK-NEXT: addi a0, sp, 184 235; CHECK-NEXT: addi a1, sp, 168 236; CHECK-NEXT: addi a2, sp, 152 237; CHECK-NEXT: lw a3, 12(sp) 238; CHECK-NEXT: sw a3, 168(sp) 239; CHECK-NEXT: call __addtf3 240; CHECK-NEXT: lw a0, 184(sp) 241; CHECK-NEXT: lw a1, 196(sp) 242; CHECK-NEXT: lw a2, 192(sp) 243; CHECK-NEXT: lw a3, 188(sp) 244; CHECK-NEXT: lui a4, %hi(Y) 245; CHECK-NEXT: sw a1, %lo(Y+12)(a4) 246; CHECK-NEXT: sw a2, %lo(Y+8)(a4) 247; CHECK-NEXT: sw a3, %lo(Y+4)(a4) 248; CHECK-NEXT: sw a0, %lo(Y)(a4) 249; CHECK-NEXT: sw zero, 116(sp) 250; CHECK-NEXT: sw zero, 112(sp) 251; CHECK-NEXT: sw zero, 108(sp) 252; CHECK-NEXT: sw zero, 104(sp) 253; CHECK-NEXT: sw s8, 132(sp) 254; CHECK-NEXT: sw s7, 128(sp) 255; CHECK-NEXT: lw a0, 52(sp) 256; CHECK-NEXT: sw a0, 124(sp) 257; CHECK-NEXT: addi a0, sp, 136 258; CHECK-NEXT: addi a1, sp, 120 259; CHECK-NEXT: addi a2, sp, 104 260; CHECK-NEXT: lw a3, 48(sp) 261; CHECK-NEXT: sw a3, 120(sp) 262; CHECK-NEXT: call __multf3 263; CHECK-NEXT: lw a3, 136(sp) 264; CHECK-NEXT: lw a0, 140(sp) 265; CHECK-NEXT: lw a1, 144(sp) 266; CHECK-NEXT: lw a2, 148(sp) 267; CHECK-NEXT: lui a4, 786400 268; CHECK-NEXT: sw a4, 68(sp) 269; CHECK-NEXT: sw zero, 64(sp) 270; CHECK-NEXT: sw zero, 60(sp) 271; CHECK-NEXT: sw zero, 56(sp) 272; CHECK-NEXT: sw a2, 84(sp) 273; CHECK-NEXT: sw a1, 80(sp) 274; CHECK-NEXT: sw a0, 76(sp) 275; CHECK-NEXT: addi a0, sp, 88 276; CHECK-NEXT: addi a1, sp, 72 277; CHECK-NEXT: addi a2, sp, 56 278; CHECK-NEXT: sw a3, 72(sp) 279; CHECK-NEXT: call __addtf3 280; CHECK-NEXT: lw a0, 96(sp) 281; CHECK-NEXT: lw a1, 100(sp) 282; CHECK-NEXT: lw a2, 88(sp) 283; CHECK-NEXT: lw a3, 92(sp) 284; CHECK-NEXT: lui a4, %hi(Y1) 285; CHECK-NEXT: sw a0, %lo(Y1+8)(a4) 286; CHECK-NEXT: sw a1, %lo(Y1+12)(a4) 287; CHECK-NEXT: sw a2, %lo(Y1)(a4) 288; CHECK-NEXT: sw a3, %lo(Y1+4)(a4) 289; CHECK-NEXT: lw s11, 636(sp) 290; CHECK-NEXT: lw s10, 640(sp) 291; CHECK-NEXT: lw s9, 644(sp) 292; CHECK-NEXT: lw s8, 648(sp) 293; CHECK-NEXT: lw s7, 652(sp) 294; CHECK-NEXT: lw s6, 656(sp) 295; CHECK-NEXT: lw s5, 660(sp) 296; CHECK-NEXT: lw s4, 664(sp) 297; CHECK-NEXT: lw s3, 668(sp) 298; CHECK-NEXT: lw s2, 672(sp) 299; CHECK-NEXT: lw s1, 676(sp) 300; CHECK-NEXT: lw s0, 680(sp) 301; CHECK-NEXT: lw ra, 684(sp) 302; CHECK-NEXT: addi sp, sp, 688 303; CHECK-NEXT: ret 304 %1 = load fp128, fp128* @U, align 16 305 %2 = fsub fp128 0xL00000000000000000000000000000000, %1 306 %3 = fsub fp128 %2, %1 307 %4 = fadd fp128 %1, 0xL00000000000000000000000000000000 308 %5 = load fp128, fp128* @Y1, align 16 309 %6 = fmul fp128 %2, %5 310 %7 = fadd fp128 %1, %4 311 %8 = fsub fp128 0xL00000000000000000000000000000000, %7 312 store fp128 %8, fp128* @X, align 16 313 %9 = fmul fp128 %3, %5 314 %10 = fmul fp128 0xL00000000000000000000000000000000, %4 315 store fp128 %10, fp128* @S, align 16 316 %11 = fsub fp128 %6, %3 317 store fp128 %11, fp128* @T, align 16 318 %12 = fadd fp128 0xL00000000000000000000000000000000, %9 319 store fp128 %12, fp128* @Y, align 16 320 %13 = fmul fp128 0xL00000000000000000000000000000000, %5 321 %14 = fadd fp128 %13, 0xL0000000000000000BFFE000000000000 322 store fp128 %14, fp128* @Y1, align 16 323 ret void 324} 325