1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64 4; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX1-X86 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX1-X64 6; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX512-X86 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX512-X64 8; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=CHECK,X87 9 10declare i1 @llvm.experimental.constrained.fptosi.i1.f32(float, metadata) 11declare i8 @llvm.experimental.constrained.fptosi.i8.f32(float, metadata) 12declare i16 @llvm.experimental.constrained.fptosi.i16.f32(float, metadata) 13declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata) 14declare i64 @llvm.experimental.constrained.fptosi.i64.f32(float, metadata) 15declare i1 @llvm.experimental.constrained.fptoui.i1.f32(float, metadata) 16declare i8 @llvm.experimental.constrained.fptoui.i8.f32(float, metadata) 17declare i16 @llvm.experimental.constrained.fptoui.i16.f32(float, metadata) 18declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata) 19declare i64 @llvm.experimental.constrained.fptoui.i64.f32(float, metadata) 20 21declare i1 @llvm.experimental.constrained.fptosi.i1.f64(double, metadata) 22declare i8 @llvm.experimental.constrained.fptosi.i8.f64(double, metadata) 23declare i16 @llvm.experimental.constrained.fptosi.i16.f64(double, metadata) 24declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata) 25declare i64 @llvm.experimental.constrained.fptosi.i64.f64(double, metadata) 26declare i1 @llvm.experimental.constrained.fptoui.i1.f64(double, metadata) 27declare i8 @llvm.experimental.constrained.fptoui.i8.f64(double, metadata) 28declare i16 @llvm.experimental.constrained.fptoui.i16.f64(double, metadata) 29declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata) 30declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata) 31 32define i1 @fptosi_f32toi1(float %x) #0 { 33; SSE-X86-LABEL: fptosi_f32toi1: 34; SSE-X86: # %bb.0: 35; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 36; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 37; SSE-X86-NEXT: retl 38; 39; SSE-X64-LABEL: fptosi_f32toi1: 40; SSE-X64: # %bb.0: 41; SSE-X64-NEXT: cvttss2si %xmm0, %eax 42; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 43; SSE-X64-NEXT: retq 44; 45; AVX-X86-LABEL: fptosi_f32toi1: 46; AVX-X86: # %bb.0: 47; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 48; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 49; AVX-X86-NEXT: retl 50; 51; AVX-X64-LABEL: fptosi_f32toi1: 52; AVX-X64: # %bb.0: 53; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 54; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 55; AVX-X64-NEXT: retq 56; 57; CHECK-LABEL: fptosi_f32toi1: 58; CHECK: # %bb.0: 59; CHECK-NEXT: subl $8, %esp 60; CHECK-NEXT: .cfi_def_cfa_offset 12 61; CHECK-NEXT: flds {{[0-9]+}}(%esp) 62; CHECK-NEXT: wait 63; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 64; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 65; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 66; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 67; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 68; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 69; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 70; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 71; CHECK-NEXT: addl $8, %esp 72; CHECK-NEXT: .cfi_def_cfa_offset 4 73; CHECK-NEXT: retl 74 %result = call i1 @llvm.experimental.constrained.fptosi.i1.f32(float %x, 75 metadata !"fpexcept.strict") #0 76 ret i1 %result 77} 78 79define i8 @fptosi_f32toi8(float %x) #0 { 80; SSE-X86-LABEL: fptosi_f32toi8: 81; SSE-X86: # %bb.0: 82; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 83; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 84; SSE-X86-NEXT: retl 85; 86; SSE-X64-LABEL: fptosi_f32toi8: 87; SSE-X64: # %bb.0: 88; SSE-X64-NEXT: cvttss2si %xmm0, %eax 89; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 90; SSE-X64-NEXT: retq 91; 92; AVX-X86-LABEL: fptosi_f32toi8: 93; AVX-X86: # %bb.0: 94; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 95; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 96; AVX-X86-NEXT: retl 97; 98; AVX-X64-LABEL: fptosi_f32toi8: 99; AVX-X64: # %bb.0: 100; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 101; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 102; AVX-X64-NEXT: retq 103; 104; CHECK-LABEL: fptosi_f32toi8: 105; CHECK: # %bb.0: 106; CHECK-NEXT: subl $8, %esp 107; CHECK-NEXT: .cfi_def_cfa_offset 12 108; CHECK-NEXT: flds {{[0-9]+}}(%esp) 109; CHECK-NEXT: wait 110; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 111; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 112; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 113; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 114; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 115; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 116; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 117; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 118; CHECK-NEXT: addl $8, %esp 119; CHECK-NEXT: .cfi_def_cfa_offset 4 120; CHECK-NEXT: retl 121 %result = call i8 @llvm.experimental.constrained.fptosi.i8.f32(float %x, 122 metadata !"fpexcept.strict") #0 123 ret i8 %result 124} 125 126define i16 @fptosi_f32toi16(float %x) #0 { 127; SSE-X86-LABEL: fptosi_f32toi16: 128; SSE-X86: # %bb.0: 129; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 130; SSE-X86-NEXT: # kill: def $ax killed $ax killed $eax 131; SSE-X86-NEXT: retl 132; 133; SSE-X64-LABEL: fptosi_f32toi16: 134; SSE-X64: # %bb.0: 135; SSE-X64-NEXT: cvttss2si %xmm0, %eax 136; SSE-X64-NEXT: # kill: def $ax killed $ax killed $eax 137; SSE-X64-NEXT: retq 138; 139; AVX-X86-LABEL: fptosi_f32toi16: 140; AVX-X86: # %bb.0: 141; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 142; AVX-X86-NEXT: # kill: def $ax killed $ax killed $eax 143; AVX-X86-NEXT: retl 144; 145; AVX-X64-LABEL: fptosi_f32toi16: 146; AVX-X64: # %bb.0: 147; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 148; AVX-X64-NEXT: # kill: def $ax killed $ax killed $eax 149; AVX-X64-NEXT: retq 150; 151; CHECK-LABEL: fptosi_f32toi16: 152; CHECK: # %bb.0: 153; CHECK-NEXT: subl $8, %esp 154; CHECK-NEXT: .cfi_def_cfa_offset 12 155; CHECK-NEXT: flds {{[0-9]+}}(%esp) 156; CHECK-NEXT: wait 157; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 158; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 159; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 160; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 161; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 162; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 163; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 164; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 165; CHECK-NEXT: addl $8, %esp 166; CHECK-NEXT: .cfi_def_cfa_offset 4 167; CHECK-NEXT: retl 168 %result = call i16 @llvm.experimental.constrained.fptosi.i16.f32(float %x, 169 metadata !"fpexcept.strict") #0 170 ret i16 %result 171} 172 173define i32 @fptosi_f32toi32(float %x) #0 { 174; SSE-X86-LABEL: fptosi_f32toi32: 175; SSE-X86: # %bb.0: 176; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 177; SSE-X86-NEXT: retl 178; 179; SSE-X64-LABEL: fptosi_f32toi32: 180; SSE-X64: # %bb.0: 181; SSE-X64-NEXT: cvttss2si %xmm0, %eax 182; SSE-X64-NEXT: retq 183; 184; AVX-X86-LABEL: fptosi_f32toi32: 185; AVX-X86: # %bb.0: 186; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 187; AVX-X86-NEXT: retl 188; 189; AVX-X64-LABEL: fptosi_f32toi32: 190; AVX-X64: # %bb.0: 191; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 192; AVX-X64-NEXT: retq 193; 194; CHECK-LABEL: fptosi_f32toi32: 195; CHECK: # %bb.0: 196; CHECK-NEXT: subl $8, %esp 197; CHECK-NEXT: .cfi_def_cfa_offset 12 198; CHECK-NEXT: flds {{[0-9]+}}(%esp) 199; CHECK-NEXT: wait 200; CHECK-NEXT: fnstcw (%esp) 201; CHECK-NEXT: movzwl (%esp), %eax 202; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 203; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 204; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 205; CHECK-NEXT: fistpl {{[0-9]+}}(%esp) 206; CHECK-NEXT: fldcw (%esp) 207; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 208; CHECK-NEXT: addl $8, %esp 209; CHECK-NEXT: .cfi_def_cfa_offset 4 210; CHECK-NEXT: retl 211 %result = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %x, 212 metadata !"fpexcept.strict") #0 213 ret i32 %result 214} 215 216define i64 @fptosi_f32toi64(float %x) #0 { 217; SSE-X86-LABEL: fptosi_f32toi64: 218; SSE-X86: # %bb.0: 219; SSE-X86-NEXT: pushl %ebp 220; SSE-X86-NEXT: .cfi_def_cfa_offset 8 221; SSE-X86-NEXT: .cfi_offset %ebp, -8 222; SSE-X86-NEXT: movl %esp, %ebp 223; SSE-X86-NEXT: .cfi_def_cfa_register %ebp 224; SSE-X86-NEXT: andl $-8, %esp 225; SSE-X86-NEXT: subl $16, %esp 226; SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 227; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp) 228; SSE-X86-NEXT: flds {{[0-9]+}}(%esp) 229; SSE-X86-NEXT: wait 230; SSE-X86-NEXT: fnstcw {{[0-9]+}}(%esp) 231; SSE-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 232; SSE-X86-NEXT: orl $3072, %eax # imm = 0xC00 233; SSE-X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 234; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 235; SSE-X86-NEXT: fistpll {{[0-9]+}}(%esp) 236; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 237; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 238; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %edx 239; SSE-X86-NEXT: movl %ebp, %esp 240; SSE-X86-NEXT: popl %ebp 241; SSE-X86-NEXT: .cfi_def_cfa %esp, 4 242; SSE-X86-NEXT: retl 243; 244; SSE-X64-LABEL: fptosi_f32toi64: 245; SSE-X64: # %bb.0: 246; SSE-X64-NEXT: cvttss2si %xmm0, %rax 247; SSE-X64-NEXT: retq 248; 249; AVX-X86-LABEL: fptosi_f32toi64: 250; AVX-X86: # %bb.0: 251; AVX-X86-NEXT: pushl %ebp 252; AVX-X86-NEXT: .cfi_def_cfa_offset 8 253; AVX-X86-NEXT: .cfi_offset %ebp, -8 254; AVX-X86-NEXT: movl %esp, %ebp 255; AVX-X86-NEXT: .cfi_def_cfa_register %ebp 256; AVX-X86-NEXT: andl $-8, %esp 257; AVX-X86-NEXT: subl $8, %esp 258; AVX-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 259; AVX-X86-NEXT: vmovss %xmm0, (%esp) 260; AVX-X86-NEXT: flds (%esp) 261; AVX-X86-NEXT: fisttpll (%esp) 262; AVX-X86-NEXT: wait 263; AVX-X86-NEXT: movl (%esp), %eax 264; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %edx 265; AVX-X86-NEXT: movl %ebp, %esp 266; AVX-X86-NEXT: popl %ebp 267; AVX-X86-NEXT: .cfi_def_cfa %esp, 4 268; AVX-X86-NEXT: retl 269; 270; AVX-X64-LABEL: fptosi_f32toi64: 271; AVX-X64: # %bb.0: 272; AVX-X64-NEXT: vcvttss2si %xmm0, %rax 273; AVX-X64-NEXT: retq 274; 275; CHECK-LABEL: fptosi_f32toi64: 276; CHECK: # %bb.0: 277; CHECK-NEXT: pushl %ebp 278; CHECK-NEXT: .cfi_def_cfa_offset 8 279; CHECK-NEXT: .cfi_offset %ebp, -8 280; CHECK-NEXT: movl %esp, %ebp 281; CHECK-NEXT: .cfi_def_cfa_register %ebp 282; CHECK-NEXT: andl $-8, %esp 283; CHECK-NEXT: subl $16, %esp 284; CHECK-NEXT: flds 8(%ebp) 285; CHECK-NEXT: wait 286; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 287; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 288; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 289; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 290; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 291; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) 292; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 293; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 294; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx 295; CHECK-NEXT: movl %ebp, %esp 296; CHECK-NEXT: popl %ebp 297; CHECK-NEXT: .cfi_def_cfa %esp, 4 298; CHECK-NEXT: retl 299 %result = call i64 @llvm.experimental.constrained.fptosi.i64.f32(float %x, 300 metadata !"fpexcept.strict") #0 301 ret i64 %result 302} 303 304define i1 @fptoui_f32toi1(float %x) #0 { 305; SSE-X86-LABEL: fptoui_f32toi1: 306; SSE-X86: # %bb.0: 307; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 308; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 309; SSE-X86-NEXT: retl 310; 311; SSE-X64-LABEL: fptoui_f32toi1: 312; SSE-X64: # %bb.0: 313; SSE-X64-NEXT: cvttss2si %xmm0, %eax 314; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 315; SSE-X64-NEXT: retq 316; 317; AVX-X86-LABEL: fptoui_f32toi1: 318; AVX-X86: # %bb.0: 319; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 320; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 321; AVX-X86-NEXT: retl 322; 323; AVX-X64-LABEL: fptoui_f32toi1: 324; AVX-X64: # %bb.0: 325; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 326; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 327; AVX-X64-NEXT: retq 328; 329; CHECK-LABEL: fptoui_f32toi1: 330; CHECK: # %bb.0: 331; CHECK-NEXT: subl $8, %esp 332; CHECK-NEXT: .cfi_def_cfa_offset 12 333; CHECK-NEXT: flds {{[0-9]+}}(%esp) 334; CHECK-NEXT: wait 335; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 336; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 337; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 338; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 339; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 340; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 341; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 342; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 343; CHECK-NEXT: addl $8, %esp 344; CHECK-NEXT: .cfi_def_cfa_offset 4 345; CHECK-NEXT: retl 346 %result = call i1 @llvm.experimental.constrained.fptoui.i1.f32(float %x, 347 metadata !"fpexcept.strict") #0 348 ret i1 %result 349} 350 351define i8 @fptoui_f32toi8(float %x) #0 { 352; SSE-X86-LABEL: fptoui_f32toi8: 353; SSE-X86: # %bb.0: 354; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 355; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 356; SSE-X86-NEXT: retl 357; 358; SSE-X64-LABEL: fptoui_f32toi8: 359; SSE-X64: # %bb.0: 360; SSE-X64-NEXT: cvttss2si %xmm0, %eax 361; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 362; SSE-X64-NEXT: retq 363; 364; AVX-X86-LABEL: fptoui_f32toi8: 365; AVX-X86: # %bb.0: 366; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 367; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 368; AVX-X86-NEXT: retl 369; 370; AVX-X64-LABEL: fptoui_f32toi8: 371; AVX-X64: # %bb.0: 372; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 373; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 374; AVX-X64-NEXT: retq 375; 376; CHECK-LABEL: fptoui_f32toi8: 377; CHECK: # %bb.0: 378; CHECK-NEXT: subl $8, %esp 379; CHECK-NEXT: .cfi_def_cfa_offset 12 380; CHECK-NEXT: flds {{[0-9]+}}(%esp) 381; CHECK-NEXT: wait 382; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 383; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 384; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 385; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 386; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 387; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 388; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 389; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 390; CHECK-NEXT: addl $8, %esp 391; CHECK-NEXT: .cfi_def_cfa_offset 4 392; CHECK-NEXT: retl 393 %result = call i8 @llvm.experimental.constrained.fptoui.i8.f32(float %x, 394 metadata !"fpexcept.strict") #0 395 ret i8 %result 396} 397 398define i16 @fptoui_f32toi16(float %x) #0 { 399; SSE-X86-LABEL: fptoui_f32toi16: 400; SSE-X86: # %bb.0: 401; SSE-X86-NEXT: cvttss2si {{[0-9]+}}(%esp), %eax 402; SSE-X86-NEXT: # kill: def $ax killed $ax killed $eax 403; SSE-X86-NEXT: retl 404; 405; SSE-X64-LABEL: fptoui_f32toi16: 406; SSE-X64: # %bb.0: 407; SSE-X64-NEXT: cvttss2si %xmm0, %eax 408; SSE-X64-NEXT: # kill: def $ax killed $ax killed $eax 409; SSE-X64-NEXT: retq 410; 411; AVX-X86-LABEL: fptoui_f32toi16: 412; AVX-X86: # %bb.0: 413; AVX-X86-NEXT: vcvttss2si {{[0-9]+}}(%esp), %eax 414; AVX-X86-NEXT: # kill: def $ax killed $ax killed $eax 415; AVX-X86-NEXT: retl 416; 417; AVX-X64-LABEL: fptoui_f32toi16: 418; AVX-X64: # %bb.0: 419; AVX-X64-NEXT: vcvttss2si %xmm0, %eax 420; AVX-X64-NEXT: # kill: def $ax killed $ax killed $eax 421; AVX-X64-NEXT: retq 422; 423; CHECK-LABEL: fptoui_f32toi16: 424; CHECK: # %bb.0: 425; CHECK-NEXT: subl $8, %esp 426; CHECK-NEXT: .cfi_def_cfa_offset 12 427; CHECK-NEXT: flds {{[0-9]+}}(%esp) 428; CHECK-NEXT: wait 429; CHECK-NEXT: fnstcw (%esp) 430; CHECK-NEXT: movzwl (%esp), %eax 431; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 432; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 433; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 434; CHECK-NEXT: fistpl {{[0-9]+}}(%esp) 435; CHECK-NEXT: fldcw (%esp) 436; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 437; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 438; CHECK-NEXT: addl $8, %esp 439; CHECK-NEXT: .cfi_def_cfa_offset 4 440; CHECK-NEXT: retl 441 %result = call i16 @llvm.experimental.constrained.fptoui.i16.f32(float %x, 442 metadata !"fpexcept.strict") #0 443 ret i16 %result 444} 445 446define i32 @fptoui_f32toi32(float %x) #0 { 447; SSE-X86-LABEL: fptoui_f32toi32: 448; SSE-X86: # %bb.0: 449; SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 450; SSE-X86-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero 451; SSE-X86-NEXT: comiss %xmm0, %xmm2 452; SSE-X86-NEXT: xorps %xmm1, %xmm1 453; SSE-X86-NEXT: ja .LBB8_2 454; SSE-X86-NEXT: # %bb.1: 455; SSE-X86-NEXT: movaps %xmm2, %xmm1 456; SSE-X86-NEXT: .LBB8_2: 457; SSE-X86-NEXT: setbe %al 458; SSE-X86-NEXT: movzbl %al, %ecx 459; SSE-X86-NEXT: shll $31, %ecx 460; SSE-X86-NEXT: subss %xmm1, %xmm0 461; SSE-X86-NEXT: cvttss2si %xmm0, %eax 462; SSE-X86-NEXT: xorl %ecx, %eax 463; SSE-X86-NEXT: retl 464; 465; SSE-X64-LABEL: fptoui_f32toi32: 466; SSE-X64: # %bb.0: 467; SSE-X64-NEXT: cvttss2si %xmm0, %rax 468; SSE-X64-NEXT: # kill: def $eax killed $eax killed $rax 469; SSE-X64-NEXT: retq 470; 471; AVX1-X86-LABEL: fptoui_f32toi32: 472; AVX1-X86: # %bb.0: 473; AVX1-X86-NEXT: pushl %ebp 474; AVX1-X86-NEXT: .cfi_def_cfa_offset 8 475; AVX1-X86-NEXT: .cfi_offset %ebp, -8 476; AVX1-X86-NEXT: movl %esp, %ebp 477; AVX1-X86-NEXT: .cfi_def_cfa_register %ebp 478; AVX1-X86-NEXT: andl $-8, %esp 479; AVX1-X86-NEXT: subl $8, %esp 480; AVX1-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 481; AVX1-X86-NEXT: vmovss %xmm0, (%esp) 482; AVX1-X86-NEXT: flds (%esp) 483; AVX1-X86-NEXT: fisttpll (%esp) 484; AVX1-X86-NEXT: wait 485; AVX1-X86-NEXT: movl (%esp), %eax 486; AVX1-X86-NEXT: movl %ebp, %esp 487; AVX1-X86-NEXT: popl %ebp 488; AVX1-X86-NEXT: .cfi_def_cfa %esp, 4 489; AVX1-X86-NEXT: retl 490; 491; AVX1-X64-LABEL: fptoui_f32toi32: 492; AVX1-X64: # %bb.0: 493; AVX1-X64-NEXT: vcvttss2si %xmm0, %rax 494; AVX1-X64-NEXT: # kill: def $eax killed $eax killed $rax 495; AVX1-X64-NEXT: retq 496; 497; AVX512-X86-LABEL: fptoui_f32toi32: 498; AVX512-X86: # %bb.0: 499; AVX512-X86-NEXT: vcvttss2usi {{[0-9]+}}(%esp), %eax 500; AVX512-X86-NEXT: retl 501; 502; AVX512-X64-LABEL: fptoui_f32toi32: 503; AVX512-X64: # %bb.0: 504; AVX512-X64-NEXT: vcvttss2usi %xmm0, %eax 505; AVX512-X64-NEXT: retq 506; 507; CHECK-LABEL: fptoui_f32toi32: 508; CHECK: # %bb.0: 509; CHECK-NEXT: pushl %ebp 510; CHECK-NEXT: .cfi_def_cfa_offset 8 511; CHECK-NEXT: .cfi_offset %ebp, -8 512; CHECK-NEXT: movl %esp, %ebp 513; CHECK-NEXT: .cfi_def_cfa_register %ebp 514; CHECK-NEXT: andl $-8, %esp 515; CHECK-NEXT: subl $16, %esp 516; CHECK-NEXT: flds 8(%ebp) 517; CHECK-NEXT: wait 518; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 519; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 520; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 521; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 522; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 523; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) 524; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 525; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 526; CHECK-NEXT: movl %ebp, %esp 527; CHECK-NEXT: popl %ebp 528; CHECK-NEXT: .cfi_def_cfa %esp, 4 529; CHECK-NEXT: retl 530 %result = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %x, 531 metadata !"fpexcept.strict") #0 532 ret i32 %result 533} 534 535define i64 @fptoui_f32toi64(float %x) #0 { 536; SSE-X86-LABEL: fptoui_f32toi64: 537; SSE-X86: # %bb.0: 538; SSE-X86-NEXT: pushl %ebp 539; SSE-X86-NEXT: .cfi_def_cfa_offset 8 540; SSE-X86-NEXT: .cfi_offset %ebp, -8 541; SSE-X86-NEXT: movl %esp, %ebp 542; SSE-X86-NEXT: .cfi_def_cfa_register %ebp 543; SSE-X86-NEXT: andl $-8, %esp 544; SSE-X86-NEXT: subl $16, %esp 545; SSE-X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 546; SSE-X86-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero 547; SSE-X86-NEXT: comiss %xmm0, %xmm2 548; SSE-X86-NEXT: xorps %xmm1, %xmm1 549; SSE-X86-NEXT: ja .LBB9_2 550; SSE-X86-NEXT: # %bb.1: 551; SSE-X86-NEXT: movaps %xmm2, %xmm1 552; SSE-X86-NEXT: .LBB9_2: 553; SSE-X86-NEXT: subss %xmm1, %xmm0 554; SSE-X86-NEXT: movss %xmm0, {{[0-9]+}}(%esp) 555; SSE-X86-NEXT: setbe %al 556; SSE-X86-NEXT: flds {{[0-9]+}}(%esp) 557; SSE-X86-NEXT: wait 558; SSE-X86-NEXT: fnstcw {{[0-9]+}}(%esp) 559; SSE-X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 560; SSE-X86-NEXT: orl $3072, %ecx # imm = 0xC00 561; SSE-X86-NEXT: movw %cx, {{[0-9]+}}(%esp) 562; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 563; SSE-X86-NEXT: fistpll {{[0-9]+}}(%esp) 564; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 565; SSE-X86-NEXT: movzbl %al, %edx 566; SSE-X86-NEXT: shll $31, %edx 567; SSE-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx 568; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 569; SSE-X86-NEXT: movl %ebp, %esp 570; SSE-X86-NEXT: popl %ebp 571; SSE-X86-NEXT: .cfi_def_cfa %esp, 4 572; SSE-X86-NEXT: retl 573; 574; SSE-X64-LABEL: fptoui_f32toi64: 575; SSE-X64: # %bb.0: 576; SSE-X64-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero 577; SSE-X64-NEXT: comiss %xmm2, %xmm0 578; SSE-X64-NEXT: xorps %xmm1, %xmm1 579; SSE-X64-NEXT: jb .LBB9_2 580; SSE-X64-NEXT: # %bb.1: 581; SSE-X64-NEXT: movaps %xmm2, %xmm1 582; SSE-X64-NEXT: .LBB9_2: 583; SSE-X64-NEXT: subss %xmm1, %xmm0 584; SSE-X64-NEXT: cvttss2si %xmm0, %rcx 585; SSE-X64-NEXT: setae %al 586; SSE-X64-NEXT: movzbl %al, %eax 587; SSE-X64-NEXT: shlq $63, %rax 588; SSE-X64-NEXT: xorq %rcx, %rax 589; SSE-X64-NEXT: retq 590; 591; AVX1-X86-LABEL: fptoui_f32toi64: 592; AVX1-X86: # %bb.0: 593; AVX1-X86-NEXT: pushl %ebp 594; AVX1-X86-NEXT: .cfi_def_cfa_offset 8 595; AVX1-X86-NEXT: .cfi_offset %ebp, -8 596; AVX1-X86-NEXT: movl %esp, %ebp 597; AVX1-X86-NEXT: .cfi_def_cfa_register %ebp 598; AVX1-X86-NEXT: andl $-8, %esp 599; AVX1-X86-NEXT: subl $8, %esp 600; AVX1-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 601; AVX1-X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero 602; AVX1-X86-NEXT: vcomiss %xmm0, %xmm1 603; AVX1-X86-NEXT: vxorps %xmm2, %xmm2, %xmm2 604; AVX1-X86-NEXT: ja .LBB9_2 605; AVX1-X86-NEXT: # %bb.1: 606; AVX1-X86-NEXT: vmovaps %xmm1, %xmm2 607; AVX1-X86-NEXT: .LBB9_2: 608; AVX1-X86-NEXT: vsubss %xmm2, %xmm0, %xmm0 609; AVX1-X86-NEXT: vmovss %xmm0, (%esp) 610; AVX1-X86-NEXT: flds (%esp) 611; AVX1-X86-NEXT: fisttpll (%esp) 612; AVX1-X86-NEXT: wait 613; AVX1-X86-NEXT: setbe %al 614; AVX1-X86-NEXT: movzbl %al, %edx 615; AVX1-X86-NEXT: shll $31, %edx 616; AVX1-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx 617; AVX1-X86-NEXT: movl (%esp), %eax 618; AVX1-X86-NEXT: movl %ebp, %esp 619; AVX1-X86-NEXT: popl %ebp 620; AVX1-X86-NEXT: .cfi_def_cfa %esp, 4 621; AVX1-X86-NEXT: retl 622; 623; AVX1-X64-LABEL: fptoui_f32toi64: 624; AVX1-X64: # %bb.0: 625; AVX1-X64-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero 626; AVX1-X64-NEXT: vcomiss %xmm1, %xmm0 627; AVX1-X64-NEXT: vxorps %xmm2, %xmm2, %xmm2 628; AVX1-X64-NEXT: jb .LBB9_2 629; AVX1-X64-NEXT: # %bb.1: 630; AVX1-X64-NEXT: vmovaps %xmm1, %xmm2 631; AVX1-X64-NEXT: .LBB9_2: 632; AVX1-X64-NEXT: vsubss %xmm2, %xmm0, %xmm0 633; AVX1-X64-NEXT: vcvttss2si %xmm0, %rcx 634; AVX1-X64-NEXT: setae %al 635; AVX1-X64-NEXT: movzbl %al, %eax 636; AVX1-X64-NEXT: shlq $63, %rax 637; AVX1-X64-NEXT: xorq %rcx, %rax 638; AVX1-X64-NEXT: retq 639; 640; AVX512-X86-LABEL: fptoui_f32toi64: 641; AVX512-X86: # %bb.0: 642; AVX512-X86-NEXT: pushl %ebp 643; AVX512-X86-NEXT: .cfi_def_cfa_offset 8 644; AVX512-X86-NEXT: .cfi_offset %ebp, -8 645; AVX512-X86-NEXT: movl %esp, %ebp 646; AVX512-X86-NEXT: .cfi_def_cfa_register %ebp 647; AVX512-X86-NEXT: andl $-8, %esp 648; AVX512-X86-NEXT: subl $8, %esp 649; AVX512-X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 650; AVX512-X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero 651; AVX512-X86-NEXT: xorl %edx, %edx 652; AVX512-X86-NEXT: vcomiss %xmm0, %xmm1 653; AVX512-X86-NEXT: seta %al 654; AVX512-X86-NEXT: kmovw %eax, %k1 655; AVX512-X86-NEXT: vxorps %xmm2, %xmm2, %xmm2 656; AVX512-X86-NEXT: vmovss %xmm2, %xmm1, %xmm1 {%k1} 657; AVX512-X86-NEXT: vsubss %xmm1, %xmm0, %xmm0 658; AVX512-X86-NEXT: vmovss %xmm0, (%esp) 659; AVX512-X86-NEXT: flds (%esp) 660; AVX512-X86-NEXT: fisttpll (%esp) 661; AVX512-X86-NEXT: wait 662; AVX512-X86-NEXT: setbe %dl 663; AVX512-X86-NEXT: shll $31, %edx 664; AVX512-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx 665; AVX512-X86-NEXT: movl (%esp), %eax 666; AVX512-X86-NEXT: movl %ebp, %esp 667; AVX512-X86-NEXT: popl %ebp 668; AVX512-X86-NEXT: .cfi_def_cfa %esp, 4 669; AVX512-X86-NEXT: retl 670; 671; AVX512-X64-LABEL: fptoui_f32toi64: 672; AVX512-X64: # %bb.0: 673; AVX512-X64-NEXT: vcvttss2usi %xmm0, %rax 674; AVX512-X64-NEXT: retq 675; 676; CHECK-LABEL: fptoui_f32toi64: 677; CHECK: # %bb.0: 678; CHECK-NEXT: pushl %ebp 679; CHECK-NEXT: .cfi_def_cfa_offset 8 680; CHECK-NEXT: .cfi_offset %ebp, -8 681; CHECK-NEXT: movl %esp, %ebp 682; CHECK-NEXT: .cfi_def_cfa_register %ebp 683; CHECK-NEXT: andl $-8, %esp 684; CHECK-NEXT: subl $16, %esp 685; CHECK-NEXT: flds 8(%ebp) 686; CHECK-NEXT: flds {{\.LCPI.*}} 687; CHECK-NEXT: fcom %st(1) 688; CHECK-NEXT: wait 689; CHECK-NEXT: fnstsw %ax 690; CHECK-NEXT: xorl %edx, %edx 691; CHECK-NEXT: # kill: def $ah killed $ah killed $ax 692; CHECK-NEXT: sahf 693; CHECK-NEXT: setbe %al 694; CHECK-NEXT: fldz 695; CHECK-NEXT: ja .LBB9_2 696; CHECK-NEXT: # %bb.1: 697; CHECK-NEXT: fstp %st(0) 698; CHECK-NEXT: fldz 699; CHECK-NEXT: fxch %st(1) 700; CHECK-NEXT: .LBB9_2: 701; CHECK-NEXT: fstp %st(1) 702; CHECK-NEXT: fsubrp %st, %st(1) 703; CHECK-NEXT: wait 704; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 705; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 706; CHECK-NEXT: orl $3072, %ecx # imm = 0xC00 707; CHECK-NEXT: movw %cx, {{[0-9]+}}(%esp) 708; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 709; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) 710; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 711; CHECK-NEXT: movb %al, %dl 712; CHECK-NEXT: shll $31, %edx 713; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %edx 714; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 715; CHECK-NEXT: movl %ebp, %esp 716; CHECK-NEXT: popl %ebp 717; CHECK-NEXT: .cfi_def_cfa %esp, 4 718; CHECK-NEXT: retl 719 %result = call i64 @llvm.experimental.constrained.fptoui.i64.f32(float %x, 720 metadata !"fpexcept.strict") #0 721 ret i64 %result 722} 723 724define i8 @fptosi_f64toi8(double %x) #0 { 725; SSE-X86-LABEL: fptosi_f64toi8: 726; SSE-X86: # %bb.0: 727; SSE-X86-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax 728; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 729; SSE-X86-NEXT: retl 730; 731; SSE-X64-LABEL: fptosi_f64toi8: 732; SSE-X64: # %bb.0: 733; SSE-X64-NEXT: cvttsd2si %xmm0, %eax 734; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 735; SSE-X64-NEXT: retq 736; 737; AVX-X86-LABEL: fptosi_f64toi8: 738; AVX-X86: # %bb.0: 739; AVX-X86-NEXT: vcvttsd2si {{[0-9]+}}(%esp), %eax 740; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 741; AVX-X86-NEXT: retl 742; 743; AVX-X64-LABEL: fptosi_f64toi8: 744; AVX-X64: # %bb.0: 745; AVX-X64-NEXT: vcvttsd2si %xmm0, %eax 746; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 747; AVX-X64-NEXT: retq 748; 749; CHECK-LABEL: fptosi_f64toi8: 750; CHECK: # %bb.0: 751; CHECK-NEXT: subl $8, %esp 752; CHECK-NEXT: .cfi_def_cfa_offset 12 753; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 754; CHECK-NEXT: wait 755; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 756; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 757; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 758; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 759; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 760; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 761; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 762; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 763; CHECK-NEXT: addl $8, %esp 764; CHECK-NEXT: .cfi_def_cfa_offset 4 765; CHECK-NEXT: retl 766 %result = call i8 @llvm.experimental.constrained.fptosi.i8.f64(double %x, 767 metadata !"fpexcept.strict") #0 768 ret i8 %result 769} 770 771define i16 @fptosi_f64toi16(double %x) #0 { 772; SSE-X86-LABEL: fptosi_f64toi16: 773; SSE-X86: # %bb.0: 774; SSE-X86-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax 775; SSE-X86-NEXT: # kill: def $ax killed $ax killed $eax 776; SSE-X86-NEXT: retl 777; 778; SSE-X64-LABEL: fptosi_f64toi16: 779; SSE-X64: # %bb.0: 780; SSE-X64-NEXT: cvttsd2si %xmm0, %eax 781; SSE-X64-NEXT: # kill: def $ax killed $ax killed $eax 782; SSE-X64-NEXT: retq 783; 784; AVX-X86-LABEL: fptosi_f64toi16: 785; AVX-X86: # %bb.0: 786; AVX-X86-NEXT: vcvttsd2si {{[0-9]+}}(%esp), %eax 787; AVX-X86-NEXT: # kill: def $ax killed $ax killed $eax 788; AVX-X86-NEXT: retl 789; 790; AVX-X64-LABEL: fptosi_f64toi16: 791; AVX-X64: # %bb.0: 792; AVX-X64-NEXT: vcvttsd2si %xmm0, %eax 793; AVX-X64-NEXT: # kill: def $ax killed $ax killed $eax 794; AVX-X64-NEXT: retq 795; 796; CHECK-LABEL: fptosi_f64toi16: 797; CHECK: # %bb.0: 798; CHECK-NEXT: subl $8, %esp 799; CHECK-NEXT: .cfi_def_cfa_offset 12 800; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 801; CHECK-NEXT: wait 802; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 803; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 804; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 805; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 806; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 807; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 808; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 809; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 810; CHECK-NEXT: addl $8, %esp 811; CHECK-NEXT: .cfi_def_cfa_offset 4 812; CHECK-NEXT: retl 813 %result = call i16 @llvm.experimental.constrained.fptosi.i16.f64(double %x, 814 metadata !"fpexcept.strict") #0 815 ret i16 %result 816} 817 818define i32 @fptosi_f64toi32(double %x) #0 { 819; SSE-X86-LABEL: fptosi_f64toi32: 820; SSE-X86: # %bb.0: 821; SSE-X86-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax 822; SSE-X86-NEXT: retl 823; 824; SSE-X64-LABEL: fptosi_f64toi32: 825; SSE-X64: # %bb.0: 826; SSE-X64-NEXT: cvttsd2si %xmm0, %eax 827; SSE-X64-NEXT: retq 828; 829; AVX-X86-LABEL: fptosi_f64toi32: 830; AVX-X86: # %bb.0: 831; AVX-X86-NEXT: vcvttsd2si {{[0-9]+}}(%esp), %eax 832; AVX-X86-NEXT: retl 833; 834; AVX-X64-LABEL: fptosi_f64toi32: 835; AVX-X64: # %bb.0: 836; AVX-X64-NEXT: vcvttsd2si %xmm0, %eax 837; AVX-X64-NEXT: retq 838; 839; CHECK-LABEL: fptosi_f64toi32: 840; CHECK: # %bb.0: 841; CHECK-NEXT: subl $8, %esp 842; CHECK-NEXT: .cfi_def_cfa_offset 12 843; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 844; CHECK-NEXT: wait 845; CHECK-NEXT: fnstcw (%esp) 846; CHECK-NEXT: movzwl (%esp), %eax 847; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 848; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 849; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 850; CHECK-NEXT: fistpl {{[0-9]+}}(%esp) 851; CHECK-NEXT: fldcw (%esp) 852; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 853; CHECK-NEXT: addl $8, %esp 854; CHECK-NEXT: .cfi_def_cfa_offset 4 855; CHECK-NEXT: retl 856 %result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double %x, 857 metadata !"fpexcept.strict") #0 858 ret i32 %result 859} 860 861define i64 @fptosi_f64toi64(double %x) #0 { 862; SSE-X86-LABEL: fptosi_f64toi64: 863; SSE-X86: # %bb.0: 864; SSE-X86-NEXT: pushl %ebp 865; SSE-X86-NEXT: .cfi_def_cfa_offset 8 866; SSE-X86-NEXT: .cfi_offset %ebp, -8 867; SSE-X86-NEXT: movl %esp, %ebp 868; SSE-X86-NEXT: .cfi_def_cfa_register %ebp 869; SSE-X86-NEXT: andl $-8, %esp 870; SSE-X86-NEXT: subl $16, %esp 871; SSE-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 872; SSE-X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) 873; SSE-X86-NEXT: fldl {{[0-9]+}}(%esp) 874; SSE-X86-NEXT: wait 875; SSE-X86-NEXT: fnstcw {{[0-9]+}}(%esp) 876; SSE-X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax 877; SSE-X86-NEXT: orl $3072, %eax # imm = 0xC00 878; SSE-X86-NEXT: movw %ax, {{[0-9]+}}(%esp) 879; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 880; SSE-X86-NEXT: fistpll {{[0-9]+}}(%esp) 881; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 882; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 883; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %edx 884; SSE-X86-NEXT: movl %ebp, %esp 885; SSE-X86-NEXT: popl %ebp 886; SSE-X86-NEXT: .cfi_def_cfa %esp, 4 887; SSE-X86-NEXT: retl 888; 889; SSE-X64-LABEL: fptosi_f64toi64: 890; SSE-X64: # %bb.0: 891; SSE-X64-NEXT: cvttsd2si %xmm0, %rax 892; SSE-X64-NEXT: retq 893; 894; AVX-X86-LABEL: fptosi_f64toi64: 895; AVX-X86: # %bb.0: 896; AVX-X86-NEXT: pushl %ebp 897; AVX-X86-NEXT: .cfi_def_cfa_offset 8 898; AVX-X86-NEXT: .cfi_offset %ebp, -8 899; AVX-X86-NEXT: movl %esp, %ebp 900; AVX-X86-NEXT: .cfi_def_cfa_register %ebp 901; AVX-X86-NEXT: andl $-8, %esp 902; AVX-X86-NEXT: subl $8, %esp 903; AVX-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 904; AVX-X86-NEXT: vmovsd %xmm0, (%esp) 905; AVX-X86-NEXT: fldl (%esp) 906; AVX-X86-NEXT: fisttpll (%esp) 907; AVX-X86-NEXT: wait 908; AVX-X86-NEXT: movl (%esp), %eax 909; AVX-X86-NEXT: movl {{[0-9]+}}(%esp), %edx 910; AVX-X86-NEXT: movl %ebp, %esp 911; AVX-X86-NEXT: popl %ebp 912; AVX-X86-NEXT: .cfi_def_cfa %esp, 4 913; AVX-X86-NEXT: retl 914; 915; AVX-X64-LABEL: fptosi_f64toi64: 916; AVX-X64: # %bb.0: 917; AVX-X64-NEXT: vcvttsd2si %xmm0, %rax 918; AVX-X64-NEXT: retq 919; 920; CHECK-LABEL: fptosi_f64toi64: 921; CHECK: # %bb.0: 922; CHECK-NEXT: pushl %ebp 923; CHECK-NEXT: .cfi_def_cfa_offset 8 924; CHECK-NEXT: .cfi_offset %ebp, -8 925; CHECK-NEXT: movl %esp, %ebp 926; CHECK-NEXT: .cfi_def_cfa_register %ebp 927; CHECK-NEXT: andl $-8, %esp 928; CHECK-NEXT: subl $16, %esp 929; CHECK-NEXT: fldl 8(%ebp) 930; CHECK-NEXT: wait 931; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 932; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 933; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 934; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 935; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 936; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) 937; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 938; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 939; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx 940; CHECK-NEXT: movl %ebp, %esp 941; CHECK-NEXT: popl %ebp 942; CHECK-NEXT: .cfi_def_cfa %esp, 4 943; CHECK-NEXT: retl 944 %result = call i64 @llvm.experimental.constrained.fptosi.i64.f64(double %x, 945 metadata !"fpexcept.strict") #0 946 ret i64 %result 947} 948 949define i1 @fptoui_f64toi1(double %x) #0 { 950; SSE-X86-LABEL: fptoui_f64toi1: 951; SSE-X86: # %bb.0: 952; SSE-X86-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax 953; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 954; SSE-X86-NEXT: retl 955; 956; SSE-X64-LABEL: fptoui_f64toi1: 957; SSE-X64: # %bb.0: 958; SSE-X64-NEXT: cvttsd2si %xmm0, %eax 959; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 960; SSE-X64-NEXT: retq 961; 962; AVX-X86-LABEL: fptoui_f64toi1: 963; AVX-X86: # %bb.0: 964; AVX-X86-NEXT: vcvttsd2si {{[0-9]+}}(%esp), %eax 965; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 966; AVX-X86-NEXT: retl 967; 968; AVX-X64-LABEL: fptoui_f64toi1: 969; AVX-X64: # %bb.0: 970; AVX-X64-NEXT: vcvttsd2si %xmm0, %eax 971; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 972; AVX-X64-NEXT: retq 973; 974; CHECK-LABEL: fptoui_f64toi1: 975; CHECK: # %bb.0: 976; CHECK-NEXT: subl $8, %esp 977; CHECK-NEXT: .cfi_def_cfa_offset 12 978; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 979; CHECK-NEXT: wait 980; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 981; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 982; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 983; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 984; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 985; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 986; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 987; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 988; CHECK-NEXT: addl $8, %esp 989; CHECK-NEXT: .cfi_def_cfa_offset 4 990; CHECK-NEXT: retl 991 %result = call i1 @llvm.experimental.constrained.fptoui.i1.f64(double %x, 992 metadata !"fpexcept.strict") #0 993 ret i1 %result 994} 995 996define i8 @fptoui_f64toi8(double %x) #0 { 997; SSE-X86-LABEL: fptoui_f64toi8: 998; SSE-X86: # %bb.0: 999; SSE-X86-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax 1000; SSE-X86-NEXT: # kill: def $al killed $al killed $eax 1001; SSE-X86-NEXT: retl 1002; 1003; SSE-X64-LABEL: fptoui_f64toi8: 1004; SSE-X64: # %bb.0: 1005; SSE-X64-NEXT: cvttsd2si %xmm0, %eax 1006; SSE-X64-NEXT: # kill: def $al killed $al killed $eax 1007; SSE-X64-NEXT: retq 1008; 1009; AVX-X86-LABEL: fptoui_f64toi8: 1010; AVX-X86: # %bb.0: 1011; AVX-X86-NEXT: vcvttsd2si {{[0-9]+}}(%esp), %eax 1012; AVX-X86-NEXT: # kill: def $al killed $al killed $eax 1013; AVX-X86-NEXT: retl 1014; 1015; AVX-X64-LABEL: fptoui_f64toi8: 1016; AVX-X64: # %bb.0: 1017; AVX-X64-NEXT: vcvttsd2si %xmm0, %eax 1018; AVX-X64-NEXT: # kill: def $al killed $al killed $eax 1019; AVX-X64-NEXT: retq 1020; 1021; CHECK-LABEL: fptoui_f64toi8: 1022; CHECK: # %bb.0: 1023; CHECK-NEXT: subl $8, %esp 1024; CHECK-NEXT: .cfi_def_cfa_offset 12 1025; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 1026; CHECK-NEXT: wait 1027; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 1028; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 1029; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 1030; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 1031; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1032; CHECK-NEXT: fistps {{[0-9]+}}(%esp) 1033; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1034; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 1035; CHECK-NEXT: addl $8, %esp 1036; CHECK-NEXT: .cfi_def_cfa_offset 4 1037; CHECK-NEXT: retl 1038 %result = call i8 @llvm.experimental.constrained.fptoui.i8.f64(double %x, 1039 metadata !"fpexcept.strict") #0 1040 ret i8 %result 1041} 1042 1043define i16 @fptoui_f64toi16(double %x) #0 { 1044; SSE-X86-LABEL: fptoui_f64toi16: 1045; SSE-X86: # %bb.0: 1046; SSE-X86-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax 1047; SSE-X86-NEXT: # kill: def $ax killed $ax killed $eax 1048; SSE-X86-NEXT: retl 1049; 1050; SSE-X64-LABEL: fptoui_f64toi16: 1051; SSE-X64: # %bb.0: 1052; SSE-X64-NEXT: cvttsd2si %xmm0, %eax 1053; SSE-X64-NEXT: # kill: def $ax killed $ax killed $eax 1054; SSE-X64-NEXT: retq 1055; 1056; AVX-X86-LABEL: fptoui_f64toi16: 1057; AVX-X86: # %bb.0: 1058; AVX-X86-NEXT: vcvttsd2si {{[0-9]+}}(%esp), %eax 1059; AVX-X86-NEXT: # kill: def $ax killed $ax killed $eax 1060; AVX-X86-NEXT: retl 1061; 1062; AVX-X64-LABEL: fptoui_f64toi16: 1063; AVX-X64: # %bb.0: 1064; AVX-X64-NEXT: vcvttsd2si %xmm0, %eax 1065; AVX-X64-NEXT: # kill: def $ax killed $ax killed $eax 1066; AVX-X64-NEXT: retq 1067; 1068; CHECK-LABEL: fptoui_f64toi16: 1069; CHECK: # %bb.0: 1070; CHECK-NEXT: subl $8, %esp 1071; CHECK-NEXT: .cfi_def_cfa_offset 12 1072; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 1073; CHECK-NEXT: wait 1074; CHECK-NEXT: fnstcw (%esp) 1075; CHECK-NEXT: movzwl (%esp), %eax 1076; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 1077; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 1078; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1079; CHECK-NEXT: fistpl {{[0-9]+}}(%esp) 1080; CHECK-NEXT: fldcw (%esp) 1081; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 1082; CHECK-NEXT: # kill: def $ax killed $ax killed $eax 1083; CHECK-NEXT: addl $8, %esp 1084; CHECK-NEXT: .cfi_def_cfa_offset 4 1085; CHECK-NEXT: retl 1086 %result = call i16 @llvm.experimental.constrained.fptoui.i16.f64(double %x, 1087 metadata !"fpexcept.strict") #0 1088 ret i16 %result 1089} 1090 1091define i32 @fptoui_f64toi32(double %x) #0 { 1092; SSE-X86-LABEL: fptoui_f64toi32: 1093; SSE-X86: # %bb.0: 1094; SSE-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1095; SSE-X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero 1096; SSE-X86-NEXT: comisd %xmm0, %xmm2 1097; SSE-X86-NEXT: xorpd %xmm1, %xmm1 1098; SSE-X86-NEXT: ja .LBB17_2 1099; SSE-X86-NEXT: # %bb.1: 1100; SSE-X86-NEXT: movapd %xmm2, %xmm1 1101; SSE-X86-NEXT: .LBB17_2: 1102; SSE-X86-NEXT: setbe %al 1103; SSE-X86-NEXT: movzbl %al, %ecx 1104; SSE-X86-NEXT: shll $31, %ecx 1105; SSE-X86-NEXT: subsd %xmm1, %xmm0 1106; SSE-X86-NEXT: cvttsd2si %xmm0, %eax 1107; SSE-X86-NEXT: xorl %ecx, %eax 1108; SSE-X86-NEXT: retl 1109; 1110; SSE-X64-LABEL: fptoui_f64toi32: 1111; SSE-X64: # %bb.0: 1112; SSE-X64-NEXT: cvttsd2si %xmm0, %rax 1113; SSE-X64-NEXT: # kill: def $eax killed $eax killed $rax 1114; SSE-X64-NEXT: retq 1115; 1116; AVX1-X86-LABEL: fptoui_f64toi32: 1117; AVX1-X86: # %bb.0: 1118; AVX1-X86-NEXT: pushl %ebp 1119; AVX1-X86-NEXT: .cfi_def_cfa_offset 8 1120; AVX1-X86-NEXT: .cfi_offset %ebp, -8 1121; AVX1-X86-NEXT: movl %esp, %ebp 1122; AVX1-X86-NEXT: .cfi_def_cfa_register %ebp 1123; AVX1-X86-NEXT: andl $-8, %esp 1124; AVX1-X86-NEXT: subl $8, %esp 1125; AVX1-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1126; AVX1-X86-NEXT: vmovsd %xmm0, (%esp) 1127; AVX1-X86-NEXT: fldl (%esp) 1128; AVX1-X86-NEXT: fisttpll (%esp) 1129; AVX1-X86-NEXT: wait 1130; AVX1-X86-NEXT: movl (%esp), %eax 1131; AVX1-X86-NEXT: movl %ebp, %esp 1132; AVX1-X86-NEXT: popl %ebp 1133; AVX1-X86-NEXT: .cfi_def_cfa %esp, 4 1134; AVX1-X86-NEXT: retl 1135; 1136; AVX1-X64-LABEL: fptoui_f64toi32: 1137; AVX1-X64: # %bb.0: 1138; AVX1-X64-NEXT: vcvttsd2si %xmm0, %rax 1139; AVX1-X64-NEXT: # kill: def $eax killed $eax killed $rax 1140; AVX1-X64-NEXT: retq 1141; 1142; AVX512-X86-LABEL: fptoui_f64toi32: 1143; AVX512-X86: # %bb.0: 1144; AVX512-X86-NEXT: vcvttsd2usi {{[0-9]+}}(%esp), %eax 1145; AVX512-X86-NEXT: retl 1146; 1147; AVX512-X64-LABEL: fptoui_f64toi32: 1148; AVX512-X64: # %bb.0: 1149; AVX512-X64-NEXT: vcvttsd2usi %xmm0, %eax 1150; AVX512-X64-NEXT: retq 1151; 1152; CHECK-LABEL: fptoui_f64toi32: 1153; CHECK: # %bb.0: 1154; CHECK-NEXT: pushl %ebp 1155; CHECK-NEXT: .cfi_def_cfa_offset 8 1156; CHECK-NEXT: .cfi_offset %ebp, -8 1157; CHECK-NEXT: movl %esp, %ebp 1158; CHECK-NEXT: .cfi_def_cfa_register %ebp 1159; CHECK-NEXT: andl $-8, %esp 1160; CHECK-NEXT: subl $16, %esp 1161; CHECK-NEXT: fldl 8(%ebp) 1162; CHECK-NEXT: wait 1163; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 1164; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 1165; CHECK-NEXT: orl $3072, %eax # imm = 0xC00 1166; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 1167; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1168; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) 1169; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1170; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 1171; CHECK-NEXT: movl %ebp, %esp 1172; CHECK-NEXT: popl %ebp 1173; CHECK-NEXT: .cfi_def_cfa %esp, 4 1174; CHECK-NEXT: retl 1175 %result = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %x, 1176 metadata !"fpexcept.strict") #0 1177 ret i32 %result 1178} 1179 1180define i64 @fptoui_f64toi64(double %x) #0 { 1181; SSE-X86-LABEL: fptoui_f64toi64: 1182; SSE-X86: # %bb.0: 1183; SSE-X86-NEXT: pushl %ebp 1184; SSE-X86-NEXT: .cfi_def_cfa_offset 8 1185; SSE-X86-NEXT: .cfi_offset %ebp, -8 1186; SSE-X86-NEXT: movl %esp, %ebp 1187; SSE-X86-NEXT: .cfi_def_cfa_register %ebp 1188; SSE-X86-NEXT: andl $-8, %esp 1189; SSE-X86-NEXT: subl $16, %esp 1190; SSE-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero 1191; SSE-X86-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero 1192; SSE-X86-NEXT: comisd %xmm0, %xmm2 1193; SSE-X86-NEXT: xorpd %xmm1, %xmm1 1194; SSE-X86-NEXT: ja .LBB18_2 1195; SSE-X86-NEXT: # %bb.1: 1196; SSE-X86-NEXT: movapd %xmm2, %xmm1 1197; SSE-X86-NEXT: .LBB18_2: 1198; SSE-X86-NEXT: subsd %xmm1, %xmm0 1199; SSE-X86-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) 1200; SSE-X86-NEXT: setbe %al 1201; SSE-X86-NEXT: fldl {{[0-9]+}}(%esp) 1202; SSE-X86-NEXT: wait 1203; SSE-X86-NEXT: fnstcw {{[0-9]+}}(%esp) 1204; SSE-X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 1205; SSE-X86-NEXT: orl $3072, %ecx # imm = 0xC00 1206; SSE-X86-NEXT: movw %cx, {{[0-9]+}}(%esp) 1207; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 1208; SSE-X86-NEXT: fistpll {{[0-9]+}}(%esp) 1209; SSE-X86-NEXT: fldcw {{[0-9]+}}(%esp) 1210; SSE-X86-NEXT: movzbl %al, %edx 1211; SSE-X86-NEXT: shll $31, %edx 1212; SSE-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx 1213; SSE-X86-NEXT: movl {{[0-9]+}}(%esp), %eax 1214; SSE-X86-NEXT: movl %ebp, %esp 1215; SSE-X86-NEXT: popl %ebp 1216; SSE-X86-NEXT: .cfi_def_cfa %esp, 4 1217; SSE-X86-NEXT: retl 1218; 1219; SSE-X64-LABEL: fptoui_f64toi64: 1220; SSE-X64: # %bb.0: 1221; SSE-X64-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero 1222; SSE-X64-NEXT: comisd %xmm2, %xmm0 1223; SSE-X64-NEXT: xorpd %xmm1, %xmm1 1224; SSE-X64-NEXT: jb .LBB18_2 1225; SSE-X64-NEXT: # %bb.1: 1226; SSE-X64-NEXT: movapd %xmm2, %xmm1 1227; SSE-X64-NEXT: .LBB18_2: 1228; SSE-X64-NEXT: subsd %xmm1, %xmm0 1229; SSE-X64-NEXT: cvttsd2si %xmm0, %rcx 1230; SSE-X64-NEXT: setae %al 1231; SSE-X64-NEXT: movzbl %al, %eax 1232; SSE-X64-NEXT: shlq $63, %rax 1233; SSE-X64-NEXT: xorq %rcx, %rax 1234; SSE-X64-NEXT: retq 1235; 1236; AVX1-X86-LABEL: fptoui_f64toi64: 1237; AVX1-X86: # %bb.0: 1238; AVX1-X86-NEXT: pushl %ebp 1239; AVX1-X86-NEXT: .cfi_def_cfa_offset 8 1240; AVX1-X86-NEXT: .cfi_offset %ebp, -8 1241; AVX1-X86-NEXT: movl %esp, %ebp 1242; AVX1-X86-NEXT: .cfi_def_cfa_register %ebp 1243; AVX1-X86-NEXT: andl $-8, %esp 1244; AVX1-X86-NEXT: subl $8, %esp 1245; AVX1-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1246; AVX1-X86-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero 1247; AVX1-X86-NEXT: vcomisd %xmm0, %xmm1 1248; AVX1-X86-NEXT: vxorpd %xmm2, %xmm2, %xmm2 1249; AVX1-X86-NEXT: ja .LBB18_2 1250; AVX1-X86-NEXT: # %bb.1: 1251; AVX1-X86-NEXT: vmovapd %xmm1, %xmm2 1252; AVX1-X86-NEXT: .LBB18_2: 1253; AVX1-X86-NEXT: vsubsd %xmm2, %xmm0, %xmm0 1254; AVX1-X86-NEXT: vmovsd %xmm0, (%esp) 1255; AVX1-X86-NEXT: fldl (%esp) 1256; AVX1-X86-NEXT: fisttpll (%esp) 1257; AVX1-X86-NEXT: wait 1258; AVX1-X86-NEXT: setbe %al 1259; AVX1-X86-NEXT: movzbl %al, %edx 1260; AVX1-X86-NEXT: shll $31, %edx 1261; AVX1-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx 1262; AVX1-X86-NEXT: movl (%esp), %eax 1263; AVX1-X86-NEXT: movl %ebp, %esp 1264; AVX1-X86-NEXT: popl %ebp 1265; AVX1-X86-NEXT: .cfi_def_cfa %esp, 4 1266; AVX1-X86-NEXT: retl 1267; 1268; AVX1-X64-LABEL: fptoui_f64toi64: 1269; AVX1-X64: # %bb.0: 1270; AVX1-X64-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero 1271; AVX1-X64-NEXT: vcomisd %xmm1, %xmm0 1272; AVX1-X64-NEXT: vxorpd %xmm2, %xmm2, %xmm2 1273; AVX1-X64-NEXT: jb .LBB18_2 1274; AVX1-X64-NEXT: # %bb.1: 1275; AVX1-X64-NEXT: vmovapd %xmm1, %xmm2 1276; AVX1-X64-NEXT: .LBB18_2: 1277; AVX1-X64-NEXT: vsubsd %xmm2, %xmm0, %xmm0 1278; AVX1-X64-NEXT: vcvttsd2si %xmm0, %rcx 1279; AVX1-X64-NEXT: setae %al 1280; AVX1-X64-NEXT: movzbl %al, %eax 1281; AVX1-X64-NEXT: shlq $63, %rax 1282; AVX1-X64-NEXT: xorq %rcx, %rax 1283; AVX1-X64-NEXT: retq 1284; 1285; AVX512-X86-LABEL: fptoui_f64toi64: 1286; AVX512-X86: # %bb.0: 1287; AVX512-X86-NEXT: pushl %ebp 1288; AVX512-X86-NEXT: .cfi_def_cfa_offset 8 1289; AVX512-X86-NEXT: .cfi_offset %ebp, -8 1290; AVX512-X86-NEXT: movl %esp, %ebp 1291; AVX512-X86-NEXT: .cfi_def_cfa_register %ebp 1292; AVX512-X86-NEXT: andl $-8, %esp 1293; AVX512-X86-NEXT: subl $8, %esp 1294; AVX512-X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero 1295; AVX512-X86-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero 1296; AVX512-X86-NEXT: xorl %edx, %edx 1297; AVX512-X86-NEXT: vcomisd %xmm0, %xmm1 1298; AVX512-X86-NEXT: seta %al 1299; AVX512-X86-NEXT: kmovw %eax, %k1 1300; AVX512-X86-NEXT: vxorpd %xmm2, %xmm2, %xmm2 1301; AVX512-X86-NEXT: vmovsd %xmm2, %xmm1, %xmm1 {%k1} 1302; AVX512-X86-NEXT: vsubsd %xmm1, %xmm0, %xmm0 1303; AVX512-X86-NEXT: vmovsd %xmm0, (%esp) 1304; AVX512-X86-NEXT: fldl (%esp) 1305; AVX512-X86-NEXT: fisttpll (%esp) 1306; AVX512-X86-NEXT: wait 1307; AVX512-X86-NEXT: setbe %dl 1308; AVX512-X86-NEXT: shll $31, %edx 1309; AVX512-X86-NEXT: xorl {{[0-9]+}}(%esp), %edx 1310; AVX512-X86-NEXT: movl (%esp), %eax 1311; AVX512-X86-NEXT: movl %ebp, %esp 1312; AVX512-X86-NEXT: popl %ebp 1313; AVX512-X86-NEXT: .cfi_def_cfa %esp, 4 1314; AVX512-X86-NEXT: retl 1315; 1316; AVX512-X64-LABEL: fptoui_f64toi64: 1317; AVX512-X64: # %bb.0: 1318; AVX512-X64-NEXT: vcvttsd2usi %xmm0, %rax 1319; AVX512-X64-NEXT: retq 1320; 1321; CHECK-LABEL: fptoui_f64toi64: 1322; CHECK: # %bb.0: 1323; CHECK-NEXT: pushl %ebp 1324; CHECK-NEXT: .cfi_def_cfa_offset 8 1325; CHECK-NEXT: .cfi_offset %ebp, -8 1326; CHECK-NEXT: movl %esp, %ebp 1327; CHECK-NEXT: .cfi_def_cfa_register %ebp 1328; CHECK-NEXT: andl $-8, %esp 1329; CHECK-NEXT: subl $16, %esp 1330; CHECK-NEXT: fldl 8(%ebp) 1331; CHECK-NEXT: flds {{\.LCPI.*}} 1332; CHECK-NEXT: fcom %st(1) 1333; CHECK-NEXT: wait 1334; CHECK-NEXT: fnstsw %ax 1335; CHECK-NEXT: xorl %edx, %edx 1336; CHECK-NEXT: # kill: def $ah killed $ah killed $ax 1337; CHECK-NEXT: sahf 1338; CHECK-NEXT: setbe %al 1339; CHECK-NEXT: fldz 1340; CHECK-NEXT: ja .LBB18_2 1341; CHECK-NEXT: # %bb.1: 1342; CHECK-NEXT: fstp %st(0) 1343; CHECK-NEXT: fldz 1344; CHECK-NEXT: fxch %st(1) 1345; CHECK-NEXT: .LBB18_2: 1346; CHECK-NEXT: fstp %st(1) 1347; CHECK-NEXT: fsubrp %st, %st(1) 1348; CHECK-NEXT: wait 1349; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 1350; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 1351; CHECK-NEXT: orl $3072, %ecx # imm = 0xC00 1352; CHECK-NEXT: movw %cx, {{[0-9]+}}(%esp) 1353; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1354; CHECK-NEXT: fistpll {{[0-9]+}}(%esp) 1355; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 1356; CHECK-NEXT: movb %al, %dl 1357; CHECK-NEXT: shll $31, %edx 1358; CHECK-NEXT: xorl {{[0-9]+}}(%esp), %edx 1359; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 1360; CHECK-NEXT: movl %ebp, %esp 1361; CHECK-NEXT: popl %ebp 1362; CHECK-NEXT: .cfi_def_cfa %esp, 4 1363; CHECK-NEXT: retl 1364 %result = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %x, 1365 metadata !"fpexcept.strict") #0 1366 ret i64 %result 1367} 1368 1369attributes #0 = { strictfp } 1370