1; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu \
2; RUN:   -verify-machineinstrs < %s | FileCheck %s
3
4define <4 x float> @check_vcfsx(<4 x i32> %a) {
5entry:
6  %0 = tail call <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32> %a, i32 1)
7  ret  <4 x float> %0
8; CHECK-LABEL: check_vcfsx
9; CHECK: vcfsx {{[0-9]+}}, {{[0-9]+}}, 1
10}
11
12define <4 x float> @check_vcfux(<4 x i32> %a) {
13entry:
14  %0 = tail call <4 x float> @llvm.ppc.altivec.vcfux(<4 x i32> %a, i32 1)
15  ret  <4 x float> %0
16; CHECK-LABEL: check_vcfux
17; CHECK: vcfux {{[0-9]+}}, {{[0-9]+}}, 1
18}
19
20define <4 x i32> @check_vctsxs(<4 x float> %a) {
21entry:
22  %0 = tail call <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float> %a, i32 1)
23  ret  <4 x i32> %0
24; CHECK-LABEL: check_vctsxs
25; CHECK: vctsxs {{[0-9]+}}, {{[0-9]+}}, 1
26}
27
28define <4 x i32> @check_vctuxs(<4 x float> %a) {
29entry:
30  %0 = tail call <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float> %a, i32 1)
31  ret  <4 x i32> %0
32; CHECK-LABEL: check_vctuxs
33; CHECK: vctuxs {{[0-9]+}}, {{[0-9]+}}, 1
34}
35
36declare <4 x float> @llvm.ppc.altivec.vcfsx(<4 x i32>, i32 immarg)
37declare <4 x float> @llvm.ppc.altivec.vcfux(<4 x i32>, i32 immarg)
38declare <4 x i32> @llvm.ppc.altivec.vctsxs(<4 x float>, i32 immarg)
39declare <4 x i32> @llvm.ppc.altivec.vctuxs(<4 x float>, i32 immarg)
40
41