1# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stress-regalloc=3 -run-pass=greedy,virtregrewriter,stack-slot-coloring -o - %s | FileCheck -check-prefixes=SHARE,GCN %s 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stress-regalloc=3 -run-pass=greedy,virtregrewriter,stack-slot-coloring -no-stack-slot-sharing -o - %s | FileCheck -check-prefixes=NOSHARE,GCN %s 3 4# -run-pass is used to artifically avoid using split register allocation, which would avoid stressing StackSlotColoring. 5 6 7# Make sure that stack slot coloring doesn't try to merge frame 8# indexes used for SGPR spilling with those that aren't. 9# Even when stack slot sharing was disabled, it was still moving the 10# FI ID used for an SGPR spill to a normal frame index. 11 12--- | 13 14 define void @sgpr_spill_wrong_stack_id(float addrspace(1)* nocapture readnone %arg, float addrspace(1)* noalias %arg1) { 15 bb: 16 %tmp = load i32, i32 addrspace(1)* null, align 4 17 call void @func(i32 undef) 18 call void @func(i32 %tmp) 19 unreachable 20 } 21 22 declare void @func(i32) 23 24... 25--- 26 27# GCN-LABEL: name: sgpr_spill_wrong_stack_id 28# SHARE: stack: 29# SHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, 30# SHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true, 31# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 32# SHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, 33# SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true, 34# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 35# SHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, 36# SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true, 37# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 38 39# SHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.2, addrspace 5) 40# SHARE: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5) 41# SHARE: SI_SPILL_S64_SAVE killed renamable $sgpr4_sgpr5, %stack.1, implicit $exec, implicit $sgpr32 :: (store (s64) into %stack.1, align 4, addrspace 5) 42# SHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5) 43# SHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu_highregs, implicit undef $vgpr0 44# SHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.2, addrspace 5) 45# SHARE: $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5) 46# SHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5) 47# SHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu_highregs, implicit $vgpr0 48# SHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.2, addrspace 5) 49 50# NOSHARE: stack: 51# NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, 52# NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true, 53# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 54# NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, 55# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true, 56# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 57# NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, 58# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true, 59# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 60# NOSHARE: - { id: 3, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4, 61# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true, 62# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 63 64# NOSHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.2, addrspace 5) 65# NOSHARE: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5) 66# NOSHARE: SI_SPILL_S64_SAVE killed renamable $sgpr4_sgpr5, %stack.1, implicit $exec, implicit $sgpr32 :: (store (s64) into %stack.1, align 4, addrspace 5) 67# NOSHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5) 68# NOSHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu_highregs, implicit undef $vgpr0 69# NOSHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.2, addrspace 5) 70# NOSHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.3, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.3, addrspace 5) 71# NOSHARE: $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5) 72# NOSHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5) 73# NOSHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu_highregs, implicit $vgpr0 74# NOSHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.3, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.3, addrspace 5) 75 76... 77 78name: sgpr_spill_wrong_stack_id 79tracksRegLiveness: true 80frameInfo: 81 hasCalls: true 82machineFunctionInfo: 83 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 84 frameOffsetReg: $sgpr32 85 stackPtrOffsetReg: $sgpr32 86body: | 87 bb.0: 88 %0:sreg_32_xm0 = COPY $sgpr32 89 %1:vreg_64 = IMPLICIT_DEF 90 %2:vgpr_32 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr 91 %3:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @func + 4, target-flags(amdgpu-rel32-hi) @func + 4, implicit-def dead $scc 92 ADJCALLSTACKUP 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr32 93 dead $sgpr30_sgpr31 = SI_CALL %3, @func, csr_amdgpu_highregs, implicit undef $vgpr0 94 $sgpr32 = COPY %0 95 %4:sreg_32_xm0 = COPY $sgpr32 96 ADJCALLSTACKDOWN 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr32 97 ADJCALLSTACKUP 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr32 98 $vgpr0 = COPY %2 99 dead $sgpr30_sgpr31 = SI_CALL %3, @func, csr_amdgpu_highregs, implicit killed $vgpr0 100 $sgpr32 = COPY %4 101 ADJCALLSTACKDOWN 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr32 102 103... 104