1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600 3--- | 4 5 define void @fabs_v4f32(<4 x float>* %a, <4 x float>* %c) { entry: ret void } 6 define void @fabs_v2f64(<2 x double>* %a, <2 x double>* %c) { entry: ret void } 7 8... 9--- 10name: fabs_v4f32 11alignment: 4 12tracksRegLiveness: true 13body: | 14 bb.1.entry: 15 liveins: $a0, $a1 16 17 ; P5600-LABEL: name: fabs_v4f32 18 ; P5600: liveins: $a0, $a1 19 ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 20 ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 21 ; P5600: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load (<4 x s32>) from %ir.a) 22 ; P5600: [[FABS:%[0-9]+]]:_(<4 x s32>) = G_FABS [[LOAD]] 23 ; P5600: G_STORE [[FABS]](<4 x s32>), [[COPY1]](p0) :: (store (<4 x s32>) into %ir.c) 24 ; P5600: RetRA 25 %0:_(p0) = COPY $a0 26 %1:_(p0) = COPY $a1 27 %2:_(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.a) 28 %3:_(<4 x s32>) = G_FABS %2 29 G_STORE %3(<4 x s32>), %1(p0) :: (store (<4 x s32>) into %ir.c) 30 RetRA 31 32... 33--- 34name: fabs_v2f64 35alignment: 4 36tracksRegLiveness: true 37body: | 38 bb.1.entry: 39 liveins: $a0, $a1 40 41 ; P5600-LABEL: name: fabs_v2f64 42 ; P5600: liveins: $a0, $a1 43 ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0 44 ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1 45 ; P5600: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>) from %ir.a) 46 ; P5600: [[FABS:%[0-9]+]]:_(<2 x s64>) = G_FABS [[LOAD]] 47 ; P5600: G_STORE [[FABS]](<2 x s64>), [[COPY1]](p0) :: (store (<2 x s64>) into %ir.c) 48 ; P5600: RetRA 49 %0:_(p0) = COPY $a0 50 %1:_(p0) = COPY $a1 51 %2:_(<2 x s64>) = G_LOAD %0(p0) :: (load (<2 x s64>) from %ir.a) 52 %3:_(<2 x s64>) = G_FABS %2 53 G_STORE %3(<2 x s64>), %1(p0) :: (store (<2 x s64>) into %ir.c) 54 RetRA 55 56... 57