1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600
3--- |
4
5  define void @sub_v16i8(<16 x i8>* %a, <16 x i8>* %b, <16 x i8>* %c) { entry: ret void }
6  define void @sub_v8i16(<8 x i16>* %a, <8 x i16>* %b, <8 x i16>* %c) { entry: ret void }
7  define void @sub_v4i32(<4 x i32>* %a, <4 x i32>* %b, <4 x i32>* %c) { entry: ret void }
8  define void @sub_v2i64(<2 x i64>* %a, <2 x i64>* %b, <2 x i64>* %c) { entry: ret void }
9
10...
11---
12name:            sub_v16i8
13alignment:       4
14tracksRegLiveness: true
15body:             |
16  bb.1.entry:
17    liveins: $a0, $a1, $a2
18
19    ; P5600-LABEL: name: sub_v16i8
20    ; P5600: liveins: $a0, $a1, $a2
21    ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
22    ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
23    ; P5600: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
24    ; P5600: [[LOAD:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[COPY]](p0) :: (load (<16 x s8>) from %ir.a)
25    ; P5600: [[LOAD1:%[0-9]+]]:_(<16 x s8>) = G_LOAD [[COPY1]](p0) :: (load (<16 x s8>) from %ir.b)
26    ; P5600: [[SUB:%[0-9]+]]:_(<16 x s8>) = G_SUB [[LOAD1]], [[LOAD]]
27    ; P5600: G_STORE [[SUB]](<16 x s8>), [[COPY2]](p0) :: (store (<16 x s8>) into %ir.c)
28    ; P5600: RetRA
29    %0:_(p0) = COPY $a0
30    %1:_(p0) = COPY $a1
31    %2:_(p0) = COPY $a2
32    %3:_(<16 x s8>) = G_LOAD %0(p0) :: (load (<16 x s8>) from %ir.a)
33    %4:_(<16 x s8>) = G_LOAD %1(p0) :: (load (<16 x s8>) from %ir.b)
34    %5:_(<16 x s8>) = G_SUB %4, %3
35    G_STORE %5(<16 x s8>), %2(p0) :: (store (<16 x s8>) into %ir.c)
36    RetRA
37
38...
39---
40name:            sub_v8i16
41alignment:       4
42tracksRegLiveness: true
43body:             |
44  bb.1.entry:
45    liveins: $a0, $a1, $a2
46
47    ; P5600-LABEL: name: sub_v8i16
48    ; P5600: liveins: $a0, $a1, $a2
49    ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
50    ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
51    ; P5600: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
52    ; P5600: [[LOAD:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[COPY]](p0) :: (load (<8 x s16>) from %ir.a)
53    ; P5600: [[LOAD1:%[0-9]+]]:_(<8 x s16>) = G_LOAD [[COPY1]](p0) :: (load (<8 x s16>) from %ir.b)
54    ; P5600: [[SUB:%[0-9]+]]:_(<8 x s16>) = G_SUB [[LOAD1]], [[LOAD]]
55    ; P5600: G_STORE [[SUB]](<8 x s16>), [[COPY2]](p0) :: (store (<8 x s16>) into %ir.c)
56    ; P5600: RetRA
57    %0:_(p0) = COPY $a0
58    %1:_(p0) = COPY $a1
59    %2:_(p0) = COPY $a2
60    %3:_(<8 x s16>) = G_LOAD %0(p0) :: (load (<8 x s16>) from %ir.a)
61    %4:_(<8 x s16>) = G_LOAD %1(p0) :: (load (<8 x s16>) from %ir.b)
62    %5:_(<8 x s16>) = G_SUB %4, %3
63    G_STORE %5(<8 x s16>), %2(p0) :: (store (<8 x s16>) into %ir.c)
64    RetRA
65
66...
67---
68name:            sub_v4i32
69alignment:       4
70tracksRegLiveness: true
71body:             |
72  bb.1.entry:
73    liveins: $a0, $a1, $a2
74
75    ; P5600-LABEL: name: sub_v4i32
76    ; P5600: liveins: $a0, $a1, $a2
77    ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
78    ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
79    ; P5600: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
80    ; P5600: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load (<4 x s32>) from %ir.a)
81    ; P5600: [[LOAD1:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY1]](p0) :: (load (<4 x s32>) from %ir.b)
82    ; P5600: [[SUB:%[0-9]+]]:_(<4 x s32>) = G_SUB [[LOAD1]], [[LOAD]]
83    ; P5600: G_STORE [[SUB]](<4 x s32>), [[COPY2]](p0) :: (store (<4 x s32>) into %ir.c)
84    ; P5600: RetRA
85    %0:_(p0) = COPY $a0
86    %1:_(p0) = COPY $a1
87    %2:_(p0) = COPY $a2
88    %3:_(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.a)
89    %4:_(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>) from %ir.b)
90    %5:_(<4 x s32>) = G_SUB %4, %3
91    G_STORE %5(<4 x s32>), %2(p0) :: (store (<4 x s32>) into %ir.c)
92    RetRA
93
94...
95---
96name:            sub_v2i64
97alignment:       4
98tracksRegLiveness: true
99body:             |
100  bb.1.entry:
101    liveins: $a0, $a1, $a2
102
103    ; P5600-LABEL: name: sub_v2i64
104    ; P5600: liveins: $a0, $a1, $a2
105    ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a0
106    ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a1
107    ; P5600: [[COPY2:%[0-9]+]]:_(p0) = COPY $a2
108    ; P5600: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>) from %ir.a)
109    ; P5600: [[LOAD1:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY1]](p0) :: (load (<2 x s64>) from %ir.b)
110    ; P5600: [[SUB:%[0-9]+]]:_(<2 x s64>) = G_SUB [[LOAD1]], [[LOAD]]
111    ; P5600: G_STORE [[SUB]](<2 x s64>), [[COPY2]](p0) :: (store (<2 x s64>) into %ir.c)
112    ; P5600: RetRA
113    %0:_(p0) = COPY $a0
114    %1:_(p0) = COPY $a1
115    %2:_(p0) = COPY $a2
116    %3:_(<2 x s64>) = G_LOAD %0(p0) :: (load (<2 x s64>) from %ir.a)
117    %4:_(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>) from %ir.b)
118    %5:_(<2 x s64>) = G_SUB %4, %3
119    G_STORE %5(<2 x s64>), %2(p0) :: (store (<2 x s64>) into %ir.c)
120    RetRA
121
122...
123